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TTT.shstrtab.debug_abbrev.debug_aranges.debug_frame.debug_info.debug_line.debug_loc.debug_macinfo.debug_pubnames.debug_overlay.strtab.symtabferret.relaferretferretWRAM.relaWRAMWRAMbinary.AUTOLOAD_INFObinary.STATIC_FOOTERferret_defsFcheck.WORKRAMbinary.LTDAUTOLOAD_TOPRSVWRAM.relaRSVWRAMRSVWRAMLTDMAIN.relaLTDMAINLTDMAINbinary.LTDAUTOLOAD_INFOferret_defsLcheck.LTDMAINcheck.RSVWRAM$m$a$dINITi_CopySysConfigINITi_ShelterLtdBinaryINITi_Fill32INITi_IsRunOnTwlmicrocode_GotoMain.rodata$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$dmicrocode_ShakeHandINITi_DetectMainMemorySizeINITi_DoAutoloadINITi_Copy32IsValidConfigExOS_HaltGX_VBlankIntrVBlankIntrPrintDebugInfoOS_EnableIrqMI_CpuClear32MI_CpuFill32ReadUserInfoGetRomValidLanguage$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dMI_CpuCopy32InitializeAllocateSystemOS_GetSubPrivArenaHiOS_GetWramSubPrivArenaLoOS_GetSubPrivArenaLoInitializeAllocateSystemCoreOS_GetWramSubPrivArenaHiMI_CpuClear8CheckCorrectNCDExInitializeFatfs.text$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$t$t$a$a$d$d$Ven$lb$$SVCi_CalcSHA1Core.syscall_twl.o $t$t$t.text.text$a$a.text$a.text$abreakCtx$a$a$a$d$d$d.bss.data$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_IrqCallbackInfoIndexOS_DisableIrq$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_IsTerminateOccurred$a$a$a$a$a$d$d$d$dOSi_IsResetOccurred.bssOSi_AllocateCardBusOSi_DoUnlockByWordOSi_FreeCardBus$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$dOSi_DoTryLockByWord.bssisInitialized$6430$aOSi_ThreadIdCountOSi_ExitThread_ArgSpecifiedOSi_RemoveSpecifiedLinkFromQueue$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aOSi_InsertLinkToQueueOSi_InsertThreadToListOSi_IdleThreadProcOSi_RemoveThreadFromListOSi_RescheduleThread$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_ExitThreadOSi_SystemStackBuffer.bssOSi_ExitThread_DestroyOSi_SleepAlarmCallback$a$a$aOSi_RunningConsoleTypeCache.data.rodata$a$a$a$a$a$aOSi_Emulator$6389$dOSi_ConsoleTypeCache$6369OSi_IsDetectedEmulator$6388$d$d$d$dtable$6384OSi_DetectPlatform$t.bssOSi_IsDetectedPlatform$6395OSi_Platform$6396$a$a$a$a$a$a$a$a$a$a$a$a$a$aOS_IncreaseMutexCount$d$d$d$dOS_DecreaseMutexCount$aOSi_Initialized$a$a$a$a$a$a$a$d$d$d.bssOS_InitArenaHiAndLo$a$a$a$a$d$d$d$d.bssOSi_UserExceptionHandlerArgOSi_ExceptionHandler$a$a$a$a$aOSi_UserExceptionHandler$d$d$d$dOSi_DisplayExContextOSi_SetExContextOSi_GetAndDisplayContext.bssOSi_ExContextOSi_DebuggerHandler$aOSi_TimerReserved$d.bssOSi_UseTick$a$a$a$a$a$d$d$d$d$dOSi_CountUpTick.bssOSi_AlarmHandlerOSi_InsertAlarmOSi_ArrangeTimer$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$dOSi_UseAlarmOSi_AlarmQueue.bssOSi_SetTimerOSi_DetachVAlarmOSi_PreviousVCountOSi_InsertVAlarmOSi_VAlarmQueueOSi_GetVFrame$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$dOSi_VFrameCountOSi_VAlarmHandlerOSi_SetNextVAlarm.bssOSi_UseVAlarm$a$a$a$a$a$a$a$dretval$6375initialized$6376$a$a$d$d.bssOSi_ReloadTwlRomData.rodata$a$a$a$a$aOSi_DoBootOSi_IsInitReset$d$d$d$d.bss$a$dOS_EnableIrq$a$a$a$a$d$d$dsent$6956$t.bssterminated$6953$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aMIi_GetControlData$d$d$d$d$d$d$d$d$d$d$d$d$dsInitialized$6639resultPtrMIi_DoUnlockWramSlotslock$a$a$a$a$d$d$d$dMIi_CallbackForPxifinishPtrMIi_DoLockWramSlots.bss$a$a$a$d$d$a$a$a$a$a$a$a$a$a$a$aPADi_XYButton_CallbackPADi_XYButtonAlarm$a$a$d$d.bss$a$dPXIi_SetToFifoFifoRecvCallbackTable$a$a$a$a$a$a$d$d$d$d$dFifoCtrlInit.bss$a$a$a$a$a$a$a$a$dSTD_Unicode2SjisArray.dataSTD_Sjis2UnicodeArray$a$d$a$a$d$d$a$a$a$a$d$d$d$d$a$a$a$a$a$a$d$d$d$d$d$d.data$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d.bss.data$a$a$a$au$6434$d$d$d$dSinTablesndMesgBuffersndAlarmSndAlarmCallback$a$a$a$a$a$a$a$ainitialized$6372$d$d$d$d$d$dsndThreadsndMesgQueue.bsssndStackSndThread$a$asWeakLockChannelStartExChannelchannel_order$6582shift$6758CalcReleasesLockChannel$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dattack_table$6543.bssSetTrackMuteseqCacheReadArgInitTrackChannelCallbackReadByteInitCacheRead24GetVariablePtrFreeTrackChannelAllReleaseTrackChannelAll$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aFinishPlayer$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dUpdateTrackChannelGetPlayerTrackStartTrackPlayerSeqMainClosePlayerTrackAllocTrack.bsssMmlPrintEnable$a$a$a$a$a$a$d$d$d.bssAlarmHandler$a$a$a$a$a$d$d$d$d$dsCommandMesgQueue$a$a$a$d$d$dPxiFifoCallback.bsssCommandMesgBufferSpiPxiCallback$a$a$a$a$a$a$a$a$a$a$aSpiCommonThread$d$d$d$d$d$d$d$d$dspiWork.bssspiInitializedPMi_ReturnResult$a$a$a$a$d$d$d.bss$aSPI_SendWait$a$a$a$a$a$d$d$d.data.rodata$a$a$a$a$a$a$d$dMCU_WriteRegisterMCU_ReadRegisterPMi_AmpGainLevelTable$a$a$d$dPMi_PreDmaCnt.bssPMi_BlinkCounter$a$a$a$d$d$d.bssPMi_MCUShutdownCallbackPMi_MCUResetCallbackMCU_GetBatteryLevelPMiMCUBatteryEmptyCallbackCalledPMiInTerminatePMiMCUPwswCallbackCalled$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$dPMi_MCUBatteryEmptyCallbackPMi_MCUBatteryLowCallbackPMi_MCUPwswCallbackSCFGi_ExecSCFGi_CommonCallback$a$a$a$a$d$d$dSCFGi_MessageQueueSCFGi_MessageBufferSCFGi_SendPxiData.bssSCFGi_StackSCFGi_ThreadSPI_DummyWaittpw$a$a$a$a$a$avalid_cnt$6516$d$d$d$d$d$dTpVAlarmHandlerinvalid_cnt$6515.bssTPi_DetectTouchTPi_DetectPosSPI_DummyWait$a$a$a$a$d$d$d$dlast_touch_flg.bssmicw$a$a$a$a$a$a$aMIC_TimerHandler$d$d$d$d$d$d$dMicTimerHandler.bssMicSetTimerValuecounter12sam12counter8offset12sam8$a$a$a$d$d$d.bssSPI_DummyWaitReceiveoffset8$a$a$a$d$d$d$a$dCARDi_EnableFlag$a$a$a$a$d$d$d$d.bss$a$a$d$d$a$a$a$a$a$d$dbuf$6514CARDi_CommVerifyCorearg$6561CARDi_SendSpiAddressingCommandCARDi_WriteEnable.rodataCARDi_WaitPrevCommandCARDi_CommWriteCorecardi_param$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aCARDi_CommReadCoreCARDi_CommandEndCARDi_CommArray$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$darg$6696.bssstatus_checked$6580CARDi_SetRomOp$a$a$a$a$aCARDiReadRomFunctionCARDi_IsNormalMode$d$d$d$d.bssCARDi_DoneTaskFromARM9$a$a$a$d$dCARDi_DoTaskFromARM9isFirstCheck$6496CARDi_CallbackForPulledOutskipCheck$6488.datanextCount$6487isInitialized$6441$a$a$a$a$a$aisCardPullOut$d$d$d$d$dCARDiSlotResetCount.bssdetectPullOutmutexI2Ci_SendMiddleI2Ci_StopExI2Ci_SendStartI2Ci_GetResultI2CiDeviceAddrTableslowRateisInitializedI2Ci_WaitEx.rodata$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$dI2Ci_ReceiveStartI2Ci_GetDataCDC_PowerUpDACCDCi_InitializeIirFilterBuffersMicBiasBkisUnmuteSpBkmute_wait_append_time_max$6971CDC_WaitPowerDownDACCDC_SetIirFilterCoreCDCi_IsIirFilterInitializedsCdcSysClockBk.rodataisDACOnBksIirFilterAddressHalfHpf10HzSamplingrate48k$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aDefaultIirParamHpf10HzSamplingrate32k$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsIirFilterAddressmute_wait_append_time_max$6986@6842isUnmuteHpBkCDCi_EndForceOutSoundCDC_PowerUpDAC_WaitWithSpinsIirFilterBackupCDC_WaitPowerDownADCisAudioADCOnBkCDCi_StartForceOutSoundCDC_SetIirFilterHalfCore.bssisSARADCOnBkSPI_SendWaitcdcMutex$a$a$a$a$a$a$a$a$a$a$a$a$a$a$acdcCurrentPage$d$d$d$d$d$d$d$d$d.bssSPI_DummyWaitReceivesndexLockReplyResultsndexIirTargetsndexSetAlarmPxiCallbackMCU_SetVolumeSetVolumeHandlerRequestThreadMCUVolumeSwtichCallbacksndexReqMsgQsndexIirParam$a$a$a$a$a$a$a$a$a$asndexVolAlarmsndexReqInitialized$d$d$d$d$d$d$dsndexReqMsgQArrayMCU_ReadRegistersndexReqThreadsndexReqThreadStacksndexSpiLockId.bsssndexVolsndexTempDSPMixRate$a$a$d$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$dMicexUpdateStatusOnBufferFullMicexConvSamplingSpanMicexIntrHandler$a$a$a$a$a$a$d$d$d$d$d$a$a$amicexIntrPrio$d$d$d.bssmicexIntrInfoMCUiThreadMCUiEnableHeartBeatMCUiMessageMCUiIrqTableMCUiStackMCUi_HandlerMCUi_ThreadMCUi_GetIrqReasonMCUiMessageQ$a$a$a$a$a$a$a$a$a$a$aMCUiPwswStatus$d$d$d$d$d$d$d$d$dMCUiIsInitializedMCUi_HeartBeatHandlerMCUi_UpdatePwswStatusverInfo$a$dnvramwNvramCheckReadyToRead$a$a$a$a$a$aNvramIsAvailableMemAddr$d$d$dNvramCheckReadyToWrite.bssSPI_DummyWaitSPI_SendWait$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dRtcReturnResultRtcBCD2HEXrtcWork$a$a$a$a$a$a$a$a$a$d$d$d$d$drtcInitializedRtcAlarmIntrRtcThreadrtcMutexRtcPxiCallback.bss$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aRtcGpioTransferRtcChangeAlarmFormat12to24RtcChangeAlarmFormat24to12$a$a$a$a$a$a$a$a$d$d$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d@8118$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$a$a$a$a$a$d$d$d$d$a$a$d$dFATFSi_rtfs_cfg_core.bss@7140@7147$a$a$a$a$a$d$a$a$a$a$a$a$d$a$a$a$a$a$a$a$a$a$aFATFSi_pc_freefile$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$dFATFSi_check_media_ioFATFSi_card_failed_handler$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$dFATFSi_check_media_entryFATFSi_check_media$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$dFATFSi_pc_allspace$a$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$a$a$a$a$a$a$d$d$d$d$d@6998@7001@7002@7003@7004@7005@7006@7007@7008@7009.data@7010$a$a$dFATFSi_rtfs_strtab_string$a$a$d$d@7484$a$a$a$a$a$a$a$a$a$a$a$a$a$d$a$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$dFATFSi_init_fat.bss$a$a$a$d$d$a$a$a$d.bssRtcBCD2HEX$a$a$a$a$a$a$a$d$d$d$d$a$d$a$a$a$d$dFATFSi_pc_add_blkFATFSi_pc_allocate_blkFATFSi_pc_commit_fat_blk$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$dFATFSi_pc_release_blk.rodata$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$dFATFSi_i_no_print@7070@7071@7052$a$a$a@7073@7053@7074@7076@7077$d$d@7078$a$a$a@7254$d$d$d.bss.data@7333$a$a$d$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$a.datafirst_select$7378$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d.bssSdmcCache$a$a$a$a$a$a$d$d$d$d$d$dSDCARDi_WriteAesFifoi_sdmcIniti_sdmcEnableFATFSi_aesCounterDefaultSDCARD_Thread.dataSDCARDi_WriteFifoSDCARD_LayerInitsdmcRandEnableSDCARDi_ReadCoreSDCARDi_ReadOS_DisableIrq$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$asdmc_srand$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dtimeout_ms$7650sdmcCheckPortContextFATFSi_i_sdmcErrProcessFATFSi_sdmc_tsk_createdSDCARDi_WriteSDCARDi_ReadFifoSDCARDi_ReadAesFifo.bssFATFSi_ulSDCARD_SizeSDCARDi_WriteCoreSDCARDi_FPGA_irqSDCARDi_CpuRecvFastOS_EnableIrqOS_DisableIrq$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$ai$7404$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dSDCARDi_CpuSendFastSYSFPGA_irqSDCARD_ReadyToEnd.bss$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d.bssFATFSi_sdmc_drive_noinitialize_flag$7181$a$a$a$a$a$a$d$d$d$d$d@7894i_sdmcIdleCard.bssFATFSi_nand_drive_noFATFSi_nand_calculated_fat_params$a$dNandFatSpec.bsssdmc_nand_flag_baki_sdmcSetParitysdmc_nand_flagsdmc_nvram_adr$a$a$a$a$a$a$a$a$asdmc_spi_lockidi_sdmcCheckReadyNvramsdmc_log_initialized$d$d$d$d$d$d$d$di_sdmcGetNvramAdri_sdmcCheckParityi_sdmcGetNvram.bss@7209FATFSi_nandaes_drive_no@7212@7210$a$a@7211$d$d.bssFATFSiHandleManager$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$dFATFSi_SDInsertCallbackFATFSiNowOnHeavyCommandFATFSi_CheckHeavyCommandEnd.data@12353@11828table$8075@12455@12051@11829@12496@12456@11145FATFSi_CopyLUnicodeString@11540work$9526FATFSi_NormalizePathFATFSi_GetValidDirectoryHandle@12359.rodataFATFSi_IsValidDriveFATFSi_SDRemoveCallbackFATFSiLetterToHandle$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aFATFSi_GetValidFileHandleindex$8258$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dtable_max$8076FATFSi_RegisterDriveFileofs$7856@9399FATFSiSpecialDrivesFATFSi_IsMediaProtected@11535FATFSi_IsMediaFatalFATFSi_CheckHeavyCommandBegin@12362@11534@12361@11537@12360@11536@11531@11256FATFSi_GetLauncherInfoTable@11175@12366FATFSi_UnregisterDriveFile@12365@11533@12364@11532.bssFATFSi_CompareUnicodeStringFATFSiOnceAccessedSDCard@11539FATFSi_VerifyCommandResult@11538FATFSi_UnpackAsciiToUnicodeFATFSiUnicodePathBufferFATFSi_IsShareArchiveNametable$7852FATFSiCommandBufferDefault.dataFATFSiLastError$a$a$a$a$a$a$a$d$d$d$d$d$dFATFSiResultBufferList.bssFATFSiRequestFATFSi_AppendRequestFATFSiThread$a$a$a$a$aFATFSi_CommandThread$d$d$d$d$dFATFSi_CopyUnicodeString$a$a$a$dspCallback.rodataDMA_CONFIG$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsCallbackParamsSrcSizespDstCtrRun@7268CallbackSendMessageSetupDefaultFractionPxiCallbacksNextSlotsThreadStackExclusiveOrAesBlocksRandCountersFractionsMutex$a$a$a$a$a$a$a$a$a$a$a$a$a$aspSrcAesThreadIsValidAddresssMacSize$d$d$d$d$d$d$d$d$d$dsThreadsThreadQsDstSizeStepSubKeyAesRunsFractionSizesCountersThreadQBuffer$a$a$a$a$d$a$a$d$a$dpc_upstat_exMI_InitNDmaConfigSTD_TSNPrintfOS_SetPeriodicAlarmMIi_CpuClear32SDCARD_SetAbortSDCARDi_CpuWriteFifoAessdmcCacheReadFifoAES_SetKeyCOS_TryLockCardFATFSi_NTLowerStringSDK_AUTOLOAD_LIST_ENDsdmcFillFifoFATFSi_fat_devio_writeSDK_LTDAUTOLOAD.LTDMAIN.DATA_ENDSND_StartExChannelNoiseFATFSi_sdmc_almOSi_SendToPxiFATFSi_pc_flush_all_filSVC_CalcSHA1SDK_AUTOLOAD_SIZEFATFSi_pc_get_cwd_start_AutoloadDoneCallbackFATFSi_pc_fd2fileFATFSi_rtfs_pc_cluster_sizeSDCARDi_DmaReadFifoAesFATFSi__synch_file_ptrsFATFSi_pSDCARD_BufferAddrFATFSi_rtfs_port_alloc_mutexSND_StartAlarmSDK_AUTOLOAD_WRAM_STARTFATFSi_CommandFormatDriveFATFSi_pc_path_to_drivenoMCU_DisableHeartBeatFATFSi_fatxx_pfaxxSDK_LTDAUTOLOAD_TOP_STARTSDK_WRAM_ARENA_LOSDCARDi_RemoveProcSDPort1ContextMIC_ExecSampling8FATFSi_fileRtfsAttachSDPort0ContextPADi_XYButtonAvailableMICEX_DisableMultipleInterruptFATFSi_sdmcRtfsIoCARDi_ReceiveTaskSND_GetChannelControlAES_ResetOSi_ThreadInfoTP_AnalyzeCommandSDK_LTDAUTOLOAD_LIST_ENDSND_SetChannelPanSDK_LTDAUTOLOAD.RSVWRAM.BSS_SIZESD_SelectCardFATFSi_rtfs_pc_format_mediaFATFSi_CommandCheckDiskOS_GetProcModeFATFSi_AbortHeavyCommandFATFSi_pc_firstblockNVRAM_ReadStatusRegisterFATFSi_rtfs_cs_strcpyNVRAM_Init_ull_modRTCi_GpioEndSND_CommandInitFATFSi_nandAesRtfsAttachOS_RestoreInterruptsFATFSi_GetCurrentDirectoryHandlesFATFSi_unicode_cmp_to_ascii_charSD_SetPullUpOS_InitThreadSTD_GetStringLengthFATFSi_CommandReadFile_u32_div_fFATFSi_file_secptrackFATFSi_CommandDeleteFileRTC_ReadFreeMICEX_IrqHandlerSND_SetChannelVolumeSDK_LTDAUTOLOAD.LTDMAIN.SIZEFATFSi_process_crossed_fileFATFSi_fatxx_get_chainRTC_ReadDateTimeFATFSi_check_drive_number_presentSD_ClrErrFATFSi_rtfs_pc_get_media_parmsRTC_WriteFoutOSi_TerminateCoreFATFSi_pc_fndnodeFATFSi_CommandCloseFileSVC_GetCRC16CDC_ChangePageFATFSi_crossed_file_coreCARD_InitFATFSi_copybuffFATFSi_NotifyRequestCompletionFATFSi_pc_free_all_iOSi_IrqTimer2OSi_IrqTimer3OSi_IrqTimer0OSi_DetectDebuggerOSi_IrqTimer1OSi_EnterNDmaCallbackFATFSi_pc_patcmp_vfatSDCARD_UseAesFlagSDK_SYS_STACKSIZE_SIGNOS_SetVAlarmTagCDC_WriteSpiRegisterAES_LockOS_GetBootTypecardi_rom_baseFATFSi_rtfs_my_alloc_mutexNVRAM_AnalyzeCommandSND_AllocExChannel$Ven$$SVC_WaitByLoopSVC_WaitIntrFATFSi_current_pdrOS_SetIrqFunctionExRTC_ReadAdjustFATFSi_allocate_chkdsk_coreSND_EnableSVC_UnpackBitsFATFSi_get_bitOS_IrqDummyOSi_IdleThreadSNDi_SharedWorkSND_ExChannelInitFATFSi_fatxx_pfswapSCFG_InitFATFSi_twfs_pc_set_propertiesMCU_InitIrqSD_StopTransmissionFATFSi_unicode_assign_ascii_charFS_InitAES_CoreOS_EnableSchedulerTPEX_EnableNewBufferModeFATFSi_CommandCloseDirectory__sinit__FATFSi_EnumPublicArchivesOS_SetThreadPrioritySD_SendIfCondNAND_FAT_PARTITION_COUNTFATFSi_text2lfiSDK_STATIC_ETABLE_ENDFATFSi_rtfs_port_release_mutexCDC_StartShutterSoundSDK_STATIC_BSS_STARTSDK_AUTOLOAD_WRAM_IDNVRAM_SectorEraseTP_ExecuteProcessSD_SendStatusCDC_WriteSpiRegistersExOSi_IsThreadInitializedSND_CalcRandomMIi_CpuPipe32WMSP_GetAllowedChannelSND_EndSleepFATFSi_CommandFormatSpecialFATFS_OpenFileWCDC_InitCurrentPageMI_CpuCopy8FATFSi_pc_get_lfn_filename$Ven$$SVC_ResetSoundBiasI2CiSlowRateTableCARDi_ReadRomIDFATFSi_rtfs_po_flushCARDi_WriteBackupCoreFATFSi_pc_sec2indexSDK_AUTOLOAD_LISTFATFSi_AllocateCommandBufferFATFSi_pc_getsysdatePMi_SendPxiCommandMIi_Aes_NDmaSendINIT_InitializeScfgcardi_commonFATFSi_pc_init_inodeFATFSi_sd_stackRTC_InitFATFSi_FreeDirectorySDK_STATIC_SIZEFATFSi_pc_ascii_strn2upperSPIi_ReturnResultFATFSi_CommandRenameFileFATFSi___fat_hash_table_0FATFSi___fat_hash_table_1FATFSi___fat_hash_table_2FATFSi___fat_hash_table_3FATFSi___mem_block_hash_tableFATFSi___fat_hash_table_4FATFSi___fat_hash_table_5FATFSi___fat_hash_table_6FATFSi___fat_hash_table_7FATFSi___fat_hash_table_8TPEX_SetTouchPanelDataDepthFATFSi___fat_hash_table_9SND_IsExChannelActiveFATFSi_to_WORDFATFSi_sdmcGetErrCodeSDK_IRQ_STACKSIZE__exception_table_end__FATFSi_rtfs_memsetFATFSi_InitHandleManagerFATFSi_rtfs_port_get_taskidSDCARDi_TransferNVRAM_WriteDisableFATFSi_CommandCreateDirectoryPMi_SetLEDSD_SendRelativeAddrSVC_SoftResetMI_SetNDmaBlockWordSND_CommandProcFATFSi_pc_fat_sizeFATFSi_lfn_chr_to_unicodeOS_InitIrqTableSND_InvalidateBankFATFSi_rtfs_port_putsMIi_Aes_NDmaRecvSDK_STATIC_DATA_STARTFATFSi_fatxx_clnextFATFSi___mem_finode_poolOSi_DoResetSystemSTDi_AttachUnicodeConversionTableFATFSi_prtfs_cfgFATFSi_devio_writeFATFSi_pc_free_all_blkFATFSi_pc_calculate_chsCDC_ReadSpiRegisterFATFSi_add_cluster_to_crossedSDK_LTDAUTOLOAD.RSVWRAM.DATA_ENDOS_ReceiveMessageSDCARD_SectorSizeOSiHeapInfoFATFSi_pc_mkfs32SD_INFO_ERROR_VALUEsMasterPanPXIi_HandlerRecvFifoNotEmptyFATFSi_sdmcGoIdleSDK_LTDAUTOLOAD.LTDMAIN.TEXT_STARTSND_InvalidateWaveFATFSi_rtfs_cs_strcmpNVRAM_ExecuteProcessFATFSi_chain_sizeMI_InitNDmaRTC_ResetCARDi_EraseBackupSubSectorCoreFATFSi_pc_mkfs16FATFS_MountDriveNAND_RAW_SECTORSOSi_UnlockMutexCoreNVRAM_ReadDataBytesAtHigherSpeedCDC_ReadSpiRegistersFATFSi_pc_rmnodePM_SelfBlinkProcFATFSi_print_chkdsk_crossed_filesSDCARDi_CpuReadBufSingleOS_UnlockCardOSi_TickCounterSDK_LTDAUTOLOAD.LTDMAIN.BSS_SIZERTCi_UnlockTPEX_ExecuteProcessSND_SeqMainFATFSi_pc_finode_statFATFSi_scan_for_bad_lfnsOS_ReadMessageSDCARDi_CpuWriteBufTPEX_SetNewBufferModeOSi_LtdMainParamsFATFSi_pc_free_all_filFATFSi_rtfs_pc_unlinkNVRAM_WriteEnableCDC_UnmuteAudioADCFATFSi_fatxx_freechainOS_LoadContextFATFSi_FreeFileFATFSi_fatxx_fwordSND_SinIdxSD_SetIpBlockLengthFATFSi_get_format_parameters_ll_modFATFSi_pc_nibbleparseSDK_STATIC_SINIT_STARTSDK_LTDAUTOLOAD.LTDMAIN.IDSDK_LTDAUTOLOAD.LTDMAIN.DATA_STARTFATFSi_pc_commit_fat_tableSD_INFO2_VALUEFATFSi_pc_isdotFATFSi_pc_free_all_usersSPI_InitSDK_STATIC_TEXT_STARTFATFSi_pc_reduceseglistPXI_Init$Ven$$SVC_HaltFATFSi_pc_dskfreeSDK_LTDAUTOLOAD_STARTSVC_UncompressRL8MI_CpuFill8FATFSi_devio_write_formatFATFSi_fileDescListSDK_LTDAUTOLOAD_LTDMAIN_BSS_END_start_ModuleParamsCDCi_IsDACOnSND_SetTrackMuteSPIi_GetExceptionsdmc_slpqTPEX_SetIntervalFATFSi_rtfs_first_stat_flagFATFSi_validate_filenameAES_InitSD_SDSTATUSSDK_LTDAUTOLOAD_LTDMAIN_STARTFATFSi_WaitForRequestCARD_IsPulledOutFATFSi_pc_isadirSDK_LTDAUTOLOAD_LTDMAIN_SIZERTCi_GpioSendDataCARD_InitPulledOutCallbackFATFSi_pc_release_bufFATFSi_rtfs_strcpy$Ven$$OSi_IsRunOnTwlSD_SDStatusSDK_AUTOLOAD.WRAM.DATA_STARTFATFSi_scan_all_files$Ven$$OS_TerminateRTCi_LockOS_LockByWordSND_InitLfoParamSDK_AUTOLOAD.WRAM.TEXT_STARTFATFSi_pc_read_partition_tableFATFSi___mem_drobj_poolFATFSi_critical_error_handlerSND_SetPlayerLocalVariableSVCi_CalcSHA1CoreOSi_SystemCallbackInSwitchThreadSND_BeginSleepOSi_CommonCallbackMCU_GetPwswStatusSND_FreeExChannelFATFSi_unicode_make_printableOSi_IrqCallbackInfoNVRAM_DeepPowerDownSDCARDi_CpuReadFifoFATFSi_pc_seglist2textFATFSi_CommandRenameDirectoryFATFSi_pc_load_file_bufferSTD_CopyLStringPMi_SetControlfat16_check_freespaceOSi_UnlockAllMutexSDK_AUTOLOAD.WRAM.TEXT_SIZESDK_LTDAUTOLOAD.LTDMAIN.SINIT_ENDMI_WaitDmaOS_InitVAlarmOSi_IrqCallbackAES_AddToCounterFATFSi_sdmcWriteAesFifoSD_DisableClockMI_InitWramManagerSD_TransEndFPGAOS_SleepsdmcFillAesFifoFATFSi_pc_gblk0_32CARDi_ProgramBackupCoreOS_DisableInterrupts_IrqAndFiqSND_StopUnlockedChannelFATFSi_sdmc_dma2_noFATFSi_pc_mpathFATFSi_rtfs_print_one_stringFATFSi_pc_log_base_2FATFSi_pc_find_fat_blkPMi_InitShutdownControlSND_SetExChannelSustainFATFSi_pc_ascii_mfileFATFSi_fatxx_pfgdwordSDCARDi_CpuWriteFifoOS_SpinWaitSysCyclesMCU_CheckIrqI2Ci_WriteRegisterCARDi_InitStatusRegistersdmcIsProtectedSTD_CompareNStringOS_IrqHandlerSDK_AUTOLOAD_WRAM_BSS_ENDblock_devio_fillFATFSi_pc_strchrSND_SetExChannelAttackFATFSi_sdmcSetLatencyEmulationFATFSi_sdmcSetInsertCallbackSDK_LTDAUTOLOAD.LTDMAIN.TEXT_ENDOS_EnableIrqMaskExFATFSi_process_used_mapFATFSi_pc_i_dskopenSDK_AUTOLOAD_NUMBERFATFSi_write_lost_chainsSND_StartSeqTPEX_SetPrechargeTimeFATFSi_fileRtfsIoOS_WakeupThreadDirectSND_SetupChannelNoiseCDC_WriteSpiRegistersFATFSi_rtfs_resource_initFATFSi_pc_next_blockMIi_CpuSend16sdmcInvalidateCacheAESi_PxiSendFirstFATFSi___fat_buffer_8FATFSi_fatxx_find_free_clusterFATFSi___fat_buffer_9FATFSi_pc_update_inodeSDK_LTDAUTOLOAD.LTDMAIN.DATA_SIZESDK_AUTOLOAD.WRAM.ENDFATFSi_pc_test_all_filFATFSi___fat_buffer_0FATFSi_pc_validate_drivenoFATFSi___fat_buffer_1FATFSi_rtfs_pc_format_volumeFATFSi___fat_buffer_2FATFSi___fat_buffer_3FATFSi___fat_buffer_4FATFSi___fat_buffer_5FATFSi___fat_buffer_6FATFSi___fat_buffer_7FATFSi_rtfs_po_writeFATFSi_pc_allociTPEX_ReadBufferFATFSi_sdmcSetRemoveCallbackSDK_AUTOLOAD.WRAM.IDSDCARDi_CpuFillFifoFATFSi_CommandFlushAllCoreFATFSi_fatxx_cl_truncate_dirMI_NDmaPipeAsync_SetUpFATFSi_defaultRtfsIofat32_check_freespaceSNDi_SetSurroundDecaySND_PauseSeq_ull_divSDCARDi_DmaWriteFifoAesSDK_LTDAUTOLOAD.RSVWRAM.SINIT_STARTNVRAM_SoftwareResetTPEX_InitializeRTC_WritePulseOS_CancelAlarmSDK_STATIC_ETABLE_STARTSND_StartIntervalTimerFATFSi_rtfs_pc_rmdirFATFSi_CommandGetDriveResourceSD_MultiReadBlockCARDi_CommandReadStatusSDK_LTDAUTOLOAD.RSVWRAM.TEXT_ENDFATFSi_sdmcWriteFifoFATFSi_pc_memory_finodeFATFSi_file_cylindersOS_InitSDK_LTDAUTOLOAD.RSVWRAM.ENDSPI_Lock__exception_table_start__FATFSi_rtfs_pc_get_attributesSVC_HaltOS_GetRunningConsoleTypeFATFSi_sdmc_result_dtqMIC_EnableMultipleInterruptSVC_DivRemMI_NDmaSendAsync_DevSDK_LTDAUTOLOAD_LTDMAIN_ENDSDK_LTDAUTOLOAD.RSVWRAM.BSS_STARTSDK_AUTOLOAD_STARTSDK_AUTOLOAD.WRAM.DATA_SIZEFATFSi_pc_search_cslFATFSi_CommandMountDriveTPEX_SetSenseTimeFATFSi_CommandCreateFileMIC_InitMIC_DisableMultipleInterruptFATFSi_pc_truncate_dirSDCARDi_CpuReadBufRTC_WriteAlarm2RTC_WriteAlarm1SND_IsCaptureActivePMi_InitializedCDC_InitMutexSND_ReadInstDataFATFSi_fatxx_flushfatFATFSi_pc_drno2drSND_SetupCapturepc_findin_exOS_IsVAlarmAvailableSVC_SqrtFATFSi_ConvertHandleToFileFATFSi_drno_to_stringSND_StopAlarmFATFSi_sdmcIsAbortErrsdmcPostSleepi_sdmcRemovedIntrCoreFATFSi_pc_getdfltdrvnoFATFSi_CommandReadDirectorysSurroundDecaySVC_CpuSetOS_ResetRequestIrqMaskExFATFSi_rtfs_print_string_1SPIi_CheckEntryFATFSi_rtfs_print_string_2FATFSi__illegal_alias_charSDK_LTDAUTOLOAD_LTDMAIN_IDFATFSi_map_unicode_to_asciiTP_AutoAdjustRangeFATFSi_pc_l_next_blockFATFSi_pc_find_blkFATFSi_pc_sort_committed_blocksFATFSi__po_lseekMI_NDmaRestartsdmcInitContextFATFSi_release_drive_mount$Ven$$SVC_GetVolumeTableFATFSi_sdmcIsFatalErrCARDi_ProcessTasksdmcFlushNandLogFATFSi_i_sdmcCalcSizeCDC_WriteSpiRegisterExFATFSi_pc_flush_fat_blocksSD_CheckStatusFATFSi_rtfs_pc_set_default_drive_u32_div_not_0_fSDCARDi_InsertProcMIC_ExecSampling12AES_LoadKeyFATFSi_sdmcResetSDK_AUTOLOAD.WRAM.SINIT_END_ll_divSDK_LTDAUTOLOAD.LTDMAIN.TEXT_SIZENVRAM_PageErase_start_LtdModuleParamsFATFSi_rtfs_po_extend_fileSD_ClockDivSetWVR_ShutdownOS_InitTickOS_GetThreadPriority_s32_div_fNVRAM_ReadDataBytesOS_GetLockIDFATFSi_rtfs_pc_mv_exFATFSi_fat_flushinfoRTC_ReadFoutFATFSi_rtfs_pc_fstatMI_CpuComp8PMi_WorkFATFSi_pc_freeobjFATFSi_sdmc_dtqRTC_WriteFreeOSi_LauncherThreadCARD_GetRomHeaderFATFSi_rtfs_pc_cache_clustersOS_ExitThreadSDK_LTDAUTOLOAD_TOP_SIZEFATFSi_unicode_ascii_indexOS_InitMessageQueueFATFSi_pc_read_blkPXI_IsCallbackReadyFATFSi_pc_ino2dosSD_SetErrOS_IsTickAvailableSD_ClrFPGAFATFSi_pc_cksumTP_ExecSamplingSND_StopSeqFATFSi_CommandSetSeekCacheFATFSi_rtfs_port_claim_mutexSDK_AUTOLOAD.WRAM.BSS_ENDFATFSi_sdmc_tskFATFSi_pc_free_scratch_blkFATFSi_pc_ascii_fileparsesdmcInitNandLogOSi_SyncWithOtherProcSD_EnableAutoClockFATFSi_fileRtfsCtrlFATFSi_pc_seglist2diskOS_LockMutexSDCARD_ResetAbortRTC_WriteAlarmEx2RTC_WriteAlarmEx1SND_AlarmInitSND_GetLfoValueFATFSi_fatxx_pfpdwordFATFSi_pc_cs_mfileMICi_GetSysWorkSNDi_SetPlayerParamSD_AndFPGAFATFSi_check_drive_name_mountRTC_WriteTimeSD_InitIPFATFSi_pc_mkchildFATFSi_defaultRtfsCtrlMCU_GetVerInfoSD_SelectBitWidthFATFSi_fatxx_clrelease_dirFATFSi_pc_nuserfilesSTD_CompareStringFATFSi_rtfs_detachMIi_CpuCopy32CDC_EnableInternalDischargePathOS_SleepThreadFATFSi_sdmc_dtq_arrayMI_SetNDmaIntervalAES_IsVerificationSuccessFATFSi_CommandGetFileLengthCARDi_InitTaskQueueSDK_LTDOVERLAY_NUMBERSND_IsChannelActiveSDCARD_TimerStopFATFSi_pc_ascii_maliasSND_ReleaseExChannelSDK_STATIC_TEXT_SIZERTC_ReadPulseOS_GetArenaLoFATFSi_pc_get_root_ll_sdivCARDi_SetWriteProtectCoreNAND_FAT0_SECTORSOSi_IdleThreadStackFATFSi_pc_parsepathPM_SetMcuForTerminateFATFSi_pc_maliasFATFSi_InitThreadFATFSi_CommandFlushFileOSi_IrqThreadQueuePMi_ResetControlCDC_SetSpiParamsExSDPortCurrentContextSDK_AUTOLOAD_WRAM_SIZESND_UnlockChannelRTC_WriteAdjustFATFSi_pc_mknodeEXI2i_GetBitGpio2CntHMI_IsNDmaBusyFATFSi_rtfs_initOSi_StackForDestructorFATFSi___fat_primary_cache_9FATFSi___fat_primary_cache_8FATFSi_AllocDirectoryFATFSi_sdmcStartAesRTC_WriteStatus2FATFSi___fat_primary_cache_1FATFSi___fat_primary_cache_0FATFSi___fat_primary_cache_3RTC_WriteStatus1FATFSi_rtfs_pc_statFATFSiCommandBufferFATFSi_block_devio_writeFATFSi___fat_primary_cache_2_ll_udivFATFSi___fat_primary_cache_5FATFSi___fat_primary_cache_4FATFSi___fat_primary_cache_7FATFSi___fat_primary_cache_6RTC_WriteDateTimeSND_SetMasterVolumeOS_GetLowEntropyDataOS_CreateVAlarmAES_WaitKeyFATFSi_pc_alloc_dirSVC_UncompressRL16FromDeviceOS_SetArenaLoPMi_PreSleepForDmaFATFSi_to_DWORDCDC_EndSleepFATFSi_CommandGetFileInfoSND_SetOutputSelectorSD_CheckFPGARegpc_fill_blkFATFSi_CommandUnmountAllSNDi_WorkAESi_PxiSendResultOS_GetArenaHiOSi_IrqDma2sdmc_slpq_arrayOSi_IrqDma3FATFSi_check_drive_number_mountOSi_IrqDma0OSi_IrqDma1FATFSi___fat_primary_index_1FATFSi___fat_primary_index_0FATFSi_sdmcSelectFATFSi___fat_primary_index_3FATFSi___fat_primary_index_2FATFSi___fat_primary_index_5FATFSi_rtfs_get_system_userFATFSi___fat_primary_index_4FATFSi___fat_primary_index_7FATFSi___fat_primary_index_6FATFSi___fat_primary_index_9SDK_STATIC_BSS_SIZEFATFSi___fat_primary_index_8TPEX_SetDebounceTimeAES_DmaSendSND_CalcChannelVolumeRTCi_GpioReceiveDataMICEX_EnableMultipleInterruptSND_SendWakeupMessageFATFSi_twfs_po_openFATFSi_pc_gblk0CDC_EndShutterSoundOSi_IsRunOnTwlMIC_ExecuteProcessFATFSi_pc_validate_partition_typeFATFSi_pc_addtoseglistFATFSi_SendToPXISND_StopIntervalTimerSDCARD_TimerStartFATFSi_file_headsSVC_UncompressLZ8FATFSi_pc_discard_bufOSi_EnqueueTailFATFSi_pc_markiFATFSi_sdmc_dma_nosd_last_info1OS_InitMutexSDK_LTDAUTOLOAD.RSVWRAM.STARTOS_SetSwitchThreadCallbackSDK_LTDAUTOLOAD.LTDMAIN.SINIT_STARTFATFSi_count_lost_clustersOS_SetAlarmsdmcSetNandLogFatalOS_DisableInterruptsI2Ci_ReadRegisterSDCurrentAccessFATFSi_rtfs_pc_check_diskOS_InitExceptionEXI2i_RecvBitGpio2CntLFATFSi_pc_init_drv_fat_info16RtfsMyMutexBufAES_DmaRecvFATFSi_fr_WORDFATFSi_pc_memory_drobjMI_StopAllNDmaNAND_FAT1_SECTORSFATFSi_med_stFATFSi_CommandSetLatencyEmulationSND_LockChannelCDC_ReadSpiRegisterExSND_GetWaveDataAddressSND_GetLockedChannelSND_UpdateExChannelEnvelopepc_mknode_exFATFSi_print_chkdsk_statisticssdmc_abort_requestCDC_SwitchOutputDeviceCDC_StopFATFSi_SyncInitializationRTCi_GpioSendCommandFATFSi_ResolveIPLPathFATFS_InitFATFSi_AllocFileOSi_IsTerminatePxiOccurredFATFSi_pc_chain_lengthFATFSi_build_chk_filePM_FlipHeartBeat$Ven$$SVC_SetSoundBiasPM_Initrtfs_get_next_cluster_cacheSVC_WaitVBlankIntrOS_SetIrqMaskExSDK_AUTOLOAD.WRAM.DATA_ENDFATFSi_pc_map_fat_blockCDC_SetIirFilterPM_AnalyzeCommandFATFSi_pc_write_blkFATFSi_pc_dos2inodeOS_SetIrqFunctionPAD_InitXYButtonFATFSi_PostRequestSPI_UnlockNVRAM_ReadSiliconIdFATFSi_unicode_compare_ncFATFSi_add_cluster_to_lost_listFATFSi__illegal_lfn_charOS_SelectThreadFATFSi_CommandDeleteDirectoryFATFSi_rtfs_set_errno$Ven$$SVC_CalcSHA1AES_RecvSDK_AUTOLOAD.WRAM.BSS_SIZESDCARD_V2FlagFATFSi_scan_crossed_filesMCU_CallIrqFunctionFATFSi_pc_memory_initRTC_ReadCounterOS_DisableIrqMaskExFATFSi_sdmc_intrq_arrayFATFSi_rtfs_po_openFATFSi_PXICallbackFATFSi_func_SDCARD_OutFATFSi_pc_zero_lfn_infoAESi_PxiHandlerOS_SetPeriodicVAlarmFATFSi_pc_init_blkFATFSi_fatxx_pfaxxtermFATFSi_pc_cppadOS_CancelVAlarmsSND_Init_start_LtdMainParamsOS_ResetRequestIrqMaskNitroSpStartUpFATFSi_auto_format_diskFATFSi_pc_finode_clusterSD_TransReadyFPGAI2C_InitFATFSi_pc_scratch_blkOS_RestoreInterrupts_IrqAndFiqFATFSi_pc_deleteseglistTP_InitSNDi_UnlockMutexMI_SwapWordSDK_LTDAUTOLOAD.RSVWRAM.BSS_ENDNAND_FAT2_SECTORSOSi_SetTerminatePxiOccurredSD_MultiWriteBlockFATFSi_pc_zeroseglistSNDi_DecibelSquareTableSND_StopChannelSDK_LTDAUTOLOAD.LTDMAIN.STARTFATFSi_CommandUnmountDriveFATFSi_rtfs_first_attachFATFSi_pc_freeiFATFSi_check_lost_clustersSDK_SYS_STACKSIZESDK_LTDAUTOLOAD_NUMBERSD_DeSelectCardSDK_AUTOLOAD_WRAM_ENDOS_BreakIrqHandlerCDC_PowerDownAudioADCPM_GetLEDPatternSND_UpdateExChannelSDCARD_AbortFATFSi_pc_delete_lfn_infoSD_EnableSeccntSD_AppOpCondOSi_DetectEmulatorCARDi_EraseChipCoreMI_NDmaRecvAsync_DevCARD_IsCardIreqLoFATFSi_pc_patcmp_vfat_8_3SDK_STATIC_DATA_SIZEOS_CheckHeapFATFSi_pc_isrootFATFSi_CommandMountSpecialFATFSi_InitRequestFATFSi_sd_intr_stackSD_SendOpCondFATFSi_GetCurrentFileHandlesFATFSi_pc_get_parent_clusterFATFSi_pc_parsedriveCDC_SetMicBiasFATFSi_sdmc_current_specSPIi_SetEntryFATFSi_pc_get_inodeAES_SetMacTPEX_SetConversionModeOS_SetCurrentHeapAESi_ReceiveDataSVC_SetSoundBiasMI_NDmaPipeAsync_DevFATFSi_file_adjusted_capacityRTCi_GpioStartFATFSi_pc_enum_fileOS_InitResetCDC_SetSpiParams$Ven$$SVC_GetCRC16SDK_SUBPRIV_ARENA_LOSDK_STATIC_DATA_ENDOS_IsResetOccurredFATFSi_ulSDCARD_RestSectorCountOS_CreateAlarmFATFSi_rtfs_pc_gfirst_exOS_InitAllocMI_StopNDma_startsdmc_total_sectorsCARD_GetOwnRomHeaderTWLOS_IRQTableAES_SetCounterFATFSi_CommandSetNdmaParametersOS_SetIrqMaskFATFSi_pc_get_momFATFSi_sdmc_intr_tskFATFSi_pc_allocfileSVC_GetVolumeTableSNDi_SetTrackParamOSi_EnterTimerCallbackI2C_UnlockTPEX_SetStabilizationTimeSDK_STATIC_BSS_ENDNAND_FAT3_SECTORSPM_ExecuteProcessAES_SendSND_UpdateSharedWorkMIC_AnalyzeCommandCARDi_ReadRomIDCoreFATFSi_sdmcRtfsAttachFATFSi_lfi2textPMi_GetRegistersOrgVolumeAES_RandSDK_STATIC_SINIT_ENDCDC_GetMicBiasFATFSi_name_is_reservedPMi_DoExitSPIi_CheckExceptionOS_GetTickSD_port_numberFATFSi_rtfs_po_lseekFATFSi_ulSDCARD_SectorCountpc_get_inode_ex$Ven$$SVC_GetPitchTableMIi_NDmaConfigFATFSiComanndFunctionTableOS_SaveContextSNDEX_GetSamplingRateOSi_IsCodecTwlModeEXIi_SelectRcntFATFSi_fatxx_alloc_chainSND_PrepareSeqSDK_LTDAUTOLOAD_RSVWRAM_IDSDK_LTDAUTOLOAD.LTDMAIN.ENDSVC_ChangeSoundBiasSDK_AUTOLOAD_WRAM_BSS_SIZENVRAM_ReleaseFromDeepPowerDownAES_WaitCARDi_InitResourceLockNDMA_irq_HandlerSVC_CpuSetFastSNDEX_InitFATFSi_i_sdmcRemovedIntrFATFSi_pc_insert_inodeFATFSi_pc_init_drv_fat_info_start_BuildParamsOS_GetInitArenaLoCDC_GetSystemClockMIi_CpuRecv16FATFSi_pc_free_all_fat_blocksCARDi_InitRomOS_InitLockMIi_CpuSendFastFATFSi_init_fat12FATFSi_rtfs_pc_gdoneFATFSi_init_fat16AES_SetKeySeedASPIi_ReleaseExceptionFATFSi_CommandSetFileLengthCDC_SetSystemClockFATFSi_fr_DWORDFATFSi_pc_ascii_str2upperFATFSi_sdmc_result_dtq_arraySND_SkipSeqsdmcGetNandLogFatalFATFSi_pc_findinSD_SendCSDCDC_MuteAudioADCOS_IsAlarmAvailableOS_SPrintfSVC_DivSDK_LTDAUTOLOAD.RSVWRAM.TEXT_STARTSDK_LTDAUTOLOAD_SIZEFATFSi_sdmcRtfsCtrlMIC_SetIrqFunctionOSi_RemoveMutexLinkFromQueueSDK_LTDAUTOLOAD.RSVWRAM.TEXT_SIZEFATFSi_po_ulseekFATFSi_init_fat32FATFSi_CommandSetDefaultDriveFATFSi_thread_flagRTC_SetHourFormatSDCARD_TerminateForceFATFSi_pc_isavolOS_GetInitArenaHisdmcCacheReadAesFifoCDC_RestartRTC_ReadStatus2SD_TransCommandRTC_ReadStatus1FATFSi_pc_sec2clusterSVC_WaitByLoopPMi_BlinkPatternNoFATFSi_rtfs_pc_ertfs_configSDK_LTDAUTOLOAD.RSVWRAM.SIZEFATFSi_print_bufferOS_InitArenaFATFSi_rtfs_attachFATFSi_file_capacitySD_EnableClockSNDi_LockMutexTPEX_SetResolutionSDK_LTDAUTOLOAD.RSVWRAM.DATA_STARTOS_GetTickLoAES_UnlockTPEX_DisableNewBufferModeSD_OrFPGASDK_AUTOLOAD.WRAM.TEXT_ENDPXI_InitFifoSVC_GetPitchTableFATFSi_map_ascii_to_unicodeFATFSi_CommandSetFileInfoSND_SetPlayerGlobalVariableFATFSi_pc_report_errorFATFSi_fatxx_clgrowOS_UnlockMutexOS_InitAlarmOS_ReleaseLockIDCARDi_OnFifoRecvFATFSi_rtfs_strtab_user_stringFATFSi_pc_allocobjEXIi_SetBitRcnt0LFATFSi_sdmcSetAesCounterSD_port_en_numbersSDCARD_EndByDmaFlagSVC_IsMmemExpandedFATFSi_pc_clzeroFATFSi_rtfs_po_readSDCARD_EndFlagSD_EnableInfoSDNandContextSTD_CopyStringFATFSi_pc_cs_maliasSND_UpdateLfoFATFSi_glFATFSi_func_usr_sdmc_outSND_SetupChannelPsgFATFSi_pc_pfinode_clusterFATFSi_unicode_chr_to_lfnSDK_LTDAUTOLOAD.LTDMAIN.BSS_STARTNVRAM_PageProgramFATFSi_pc_flush_chain_blkCARDi_EraseBackupSectorCoreFATFSi_CommandOpenFilertfsi_pc_cache_clusterssOrgPanSD_INFO1_MASK_VALUEFATFSi_faxx_check_free_spaceMI_InitPMi_DoSleepSD_INFO2_MASK_VALUETwlSpMainSND_ExChannelMainFATFSi_CommandWriteFileAES_IsIFifoFullOS_DisableSchedulerOS_IrqHandler_ThreadSwitchOS_CancelVAlarmSND_StartExChannelPcmSVC_UncompressHuffmanFromDeviceFATFSi_pc_flush_file_bufferPMi_DoShutdownOS_CreateThreadFATFSi_pc_find_contig_clustersEXI2i_SetBitGpio2CntLSND_SetTrackAllocatableChannelEXI2i_SetBitGpio2CntHSDNEXi_InitializeSMIXSND_InvalidateSeqOSi_RescheduleCountMICEX_ExecuteProcessOS_SendMessageSND_SetupAlarmFATFSi_CommandSeekFileAES_RunPXI_SendWordByFifoFATFSi_pc_drno_to_drive_structFATFSi_devio_readSDK_STATIC_ENDFATFSi_rtfs_print_long_1FATFSi_pc_scaniFATFSi_rtfs_po_truncateFATFSi_pc_free_all_drobjFATFSi___mem_drives_structuresPMi_SetSoundPowerSND_SetChannelTimerCARDi_ReadBackupCoreSDCARDi_CpuReadFifoAes$Ven$$SVC_SleepMI_StopAllDmaSTD_TVSNPrintfOSi_IrqNDma1OSi_IrqNDma0OSi_IrqNDma3OSi_IrqNDma2SDCARDi_CacheAccessCARD_SetThreadPriorityCARDi_TaskWorkerProcedureSDK_OVERLAY_NUMBERSND_SetExChannelDecayFATFSi_pc_cl2sectorRTC_IsAvailablePxiCommandFATFSi_rtfs_get_errnoFATFSi_pc_sync_file_bufferCARD_CheckPullOut_PollingSTD_SearchStringOSi_NeedResetTimerSDK_STATIC_TEXT_ENDRTC_ReadAlarmEx2RTC_ReadAlarmEx1SND_CalcTimerOSi_IrqVBlankSND_SetMasterPanCalcSurroundDecayOS_InitContextOS_TerminateFATFSi_sdmcInitOS_DisableIrqMaskFATFSi_rtfs_cs_strlenOS_EnableIrqMaskSND_StartPreparedSeqSD_AppCommandFATFSi___mem_file_poolSD_SendSCRFATFSi_pcdel2lfiFATFSi_pc_grow_dirOSi_DequeueItemCDC_ReadSpiRegistersExOS_IRQTable2FATFSi_enabled_driversCDC_GetPGABCDC_SetPGABSD_SetBlockLengthRTC_ReadTimeCARD_CompareCardIDPMi_DoResetHardwareSD_SwapByteSND_SetExChannelReleaseOS_CreateHeapSDCARD_Timer_irqSND_NoteOnFATFSi__po_ulseekCDC_BeginSleepSD_SetFPGASD_GetFPGAOS_LockCardFATFSi___mem_block_poolFATFSi_rtfs_po_closeFATFSi_nandRtfsCtrlOS_WakeupThreadOSi_SetTimerReservedOSi_CurrentThreadPtrPM_SetLEDPatternSDCARD_irq_HandlerCDC_InitLibSDK_LTDAUTOLOAD_LISTCARDi_InitCommandSDK_AUTOLOAD.WRAM.SINIT_STARTFATFSi_twfs_pc_get_fatbitsSDK_LTDAUTOLOAD.RSVWRAM.IDMCU_SetIrqFunctionSDCARD_Intr_ThreadPMi_SwitchUtilityProcFATFSi_pc_unicode_byte2upperMICEXi_IsCodecAutoSamplingFATFSi_release_drive_mount_writeSDK_LTDAUTOLOAD_LTDMAIN_BSS_SIZEPXI_SetFifoRecvCallbackOS_EnableInterruptsFATFSi_pc_isdotdotFATFSi_fatxx_faxxSDK_LTDAUTOLOAD.RSVWRAM.DATA_SIZESDK_AUTOLOAD.WRAM.BSS_STARTAESi_InterruptHandlerFATFSi_rtfs_pc_diskflushFATFSi_CommandFlushAllNVRAM_ChipEraseMIi_NDmaAsync_withConfig_DevSVC_UncompressLZ16FromDeviceMI_StopDmaMICEX_AnalyzeCommandFATFSi___rtfs_user_tableFATFSi_sdmc_intrqSND_SeqInitSD_SendCIDFATFSi_pc_initialize_block_poolSDK_MOUNT_INFO_TABLESVC_GetSinTableFATFSi_unicode_comparePMi_LEDStatusCARDi_InitTaskOS_ResetSystemRTC_ReadAlarm1RTC_ReadAlarm2SND_SetupChannelPcmRTC_ReadDateFATFSi_CommandOpenDirectoryAES_SetNonceFATFSi_pc_initialize_fat_block_poolOS_TryLockMutexFATFSi_rtfs_pc_mkdir_exdevio_fillFATFSi_fatxx_dSDK_LTDAUTOLOAD.LTDMAIN.BSS_ENDSVC_SleepFATFSi_pc_valid_ascii_sfnSND_StartExChannelPsgSDK_AUTOLOAD.WRAM.SIZEFATFSi_func_SDCARD_InFATFSi_nandAesRtfsIoSND_ShutdownSD_CommandFATFSi_pc_ltoaPMi_SetRegisterI2C_LockSDK_STATIC_STARTSDCARDi_AccesssdmcInitCacheMI_WaitNDmaPMi_BlinkPatternDataSDK_LTDAUTOLOAD.RSVWRAM.SINIT_ENDSDK_AUTOLOAD.WRAM.STARTFATFSi_sdmcInitAesCounterMI_SetNDmaWordCountCARDi_VerifyBackupCoreFATFSi_ConvertHandleToDirectoryFATFSi_rtfs_pc_gnext_exMMCP_WriteBusWidthFATFSi_string_tableFATFSi_pc_parse_raw_driveSVC_ResetSoundBiasSD_INFO1_VALUEFATFSi__po_flushNVRAM_PageWriteFATFSi_fatxx_clallocCDC_PowerUpAudioADCsdmcIsHitCacheFATFSi_FreeCommandBufferD88 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ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\init\ARM7.TWL\src\5[8_start_LtdMainParams5r8microcode_GotoMain5 8_start_LtdModuleParams58_start_BuildParams5*88_start_ModuleParams5A\8microcode_ShakeHandlunsigned longvu32REGType32__file_handlesize_tfpos_tREGType32vu32  $$;( Xint^BOOL^mbstate_t8D85]_start088`5]INITi_DoAutoload8\85]INITi_ShelterLtdBinary\8`8?5]_start_AutoloadDoneCallbackj@5Rpargv`8d8K5]NitroSpStartUpd88]5^]INITi_IsRunOnTwl885]INITi_CopySysConfig8l85]INITi_DetectMainMemorySize!l885]INITi_Copy325dst5src5 size885]INITi_Fill325dst5value5 sizeT|t| main.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\components\mongoose.TWL\src\longvs32fx32s32^OSHeapHandleunsigned shortMATHCRC16Contextvu16MATHChecksum8Contextwctype_tMATHChecksum16ContextGXRgbREGType16PMBatteryLevelwint_tREGType16vGXRgbaWint_tOSBootTypewchar_tu16unsigned charREGType8REGType8vu8MATHCRC8Contextvu8MINDmaDeviceMATHCRC32ContextFATFSDirectoryHandleOSIrqMaskFSCommandTypeFATFSSeekModeCARDEventFATFSCommandIDOSIntrModeFATFSMediaTypeFSEventFATFSResultPMWakeUpTriggerFATFSFileHandlePMLogicFSOverlayIDVecFx10 NVRAMConfigEx [ ncd psaveCount rcrc16 tncd_ex crc16_ex NVRAMConfigExpNVRAMConfigData version pad  owner R alarm X tp doption[ NVRAMConfigDataPNVRAMConfigOwnerInfo favoriteColor rsv  birthday pad  nickname  comment NVRAMConfigOwnerInfoNVRAMConfigDate month day NVRAMConfigDateNVRAMConfigNickname u str length rsv NVRAMConfigNickname 6NVRAMConfigComment str 4length 5rsv NVRAMConfigComment4NVRAMConfigAlarm hour minute second pad enableWeek  alarmOn rsv NVRAMConfigAlarm NVRAMConfigTpCalibData raw_x1 raw_y1 dx1 dy1 raw_x2 raw_y2 dx2 dy2 NVRAMConfigTpCalibData NVRAMConfigOption language  agbLcd  detectPullOutCardFlag  detectPullOutCtrdgFlag  autoBootFlag  rsv input_favoriteColor input_tp input_language input_rtc input_nickname timezone rtcClockAdjust wrtcOffsetNVRAMConfigOptionlong longwfx64wvs64wfx64cws64NVRAMConfigDataEx version language valid_language_bitmap HpaddingNVRAMConfigDataEx || ]TwlSpMain||n]GX_VBlankIntrn^PenablenPrval||^]OS_EnableIrq'Pprep||B]OS_HaltI(, ]PrintDebugInforp6}6}5 ]InitializeFatfs|| ^]InitializeAllocateSystem PmemType ^Phh|4| ^]InitializeAllocateSystemCore VmemType PheapSize o Phi u Plo PheapSize { Phi  Plo ^Thh4|D| ]OS_GetSubPrivArenaLoD|T| ]OS_GetSubPrivArenaHi&T|h|[v]MI_CpuClear8t[v Pdest[vPsizeh|x| ]OS_GetWramSubPrivArenaLox|| ]OS_GetWramSubPrivArenaHi|| ]ReadUserInfo* PallowedChannel) enableChannel  wMac Ti  Pp Pcheck   temp offset| |Fv]MI_CpuFill32FvYSdestFvPdataFvPsize |,|Yv]MI_CpuCopy32oYv_PsrcYvePdestYvPsize,|@|lv]MI_CpuClear32lvkPdestlvPsize@|x|C ^]IsValidConfigExE ipl2_typex||_ ]GetRomValidLanguageYb PlangBita Pret|D|~ ]CheckCorrectNCDEx~ qZncdsp Prom_valid_language Prom_valid_language Ucrc_flag Pcalc_crc PiP|t| ]VBlankIntr?2extras.cMetrowerks C/C++ for ARMD:\Products\ARM\NITRO_Support_3_0_auto\output\ARM_EABI_Support\msl\MSL_Extras\MSL_Common\Src\chardev_tuid_tgid_tino_tmode_trsize_tclock_t^errno_twctrans_tunsigned int strstream.cppMetrowerks C/C++ for ARMD:\Products\ARM\NITRO_Support_3_0_auto\output\ARM_EABI_Support\msl\MSL_C++\MSL_Common\Src\signed charint_least8_tint8_tint_fast8_tpointerbasic_streambuf gbeg_ gnext_ gend_ &pbeg_ ,pnext_ 2pend_istreambufchar_typedifference_typeintptr_tint_fast32_tptrdiff_tint_least32_tstreamsizetime_tint32_tsize_typeuint32_tuint_fast32_tuintptr_tuint_least32_tuint_fast8_tstrstateuint_least8_tuint8_tbool\value_type\type^_INT32^int_type^state_type fpos woffset_ ^st_streampospos_typewstreamposw_INT64wint_fast64_twintmax_twstreamoffwint_least64_twoff_typewint64_tios.cppMetrowerks C/C++ for ARMD:\Products\ARM\NITRO_Support_3_0_auto\output\ARM_EABI_Support\msl\MSL_C++\MSL_Common\Src\0ios_base Ecb_vec_ cb_siz_ cb_cap_  iarray_ isize_  parray_ psize_ % rdbuf_ $precision_ (width_ ,+ fmtflags_ .7!iostate_ /7!exceptions_Kpair first ^secondKevent_data@no_name@@no_name@ index^eventerase_eventimbue_eventcopyfmt_event fmtflagsboolalphadecfixedhexinternalleft oct@rightscientificshowbaseshowpointshowposskipwsunitbuf uppercase@adjustfieldbasefieldJfloatfieldiostategoodbitbadbiteofbitfailbitbasic_streambuf "gbeg_ -"gnext_ 3"gend_ 9"pbeg_ ?"pnext_ E"pend_|!wstreambuf"wchar_t"""""liostream.cppMetrowerks C/C++ for ARMD:\Products\ARM\NITRO_Support_3_0_auto\output\ARM_EABI_Support\msl\MSL_C++\MSL_Common\Src\mutex\once_flagL_FILE handle  %mode %state char_buffer char_buffer_overflow y&ungetc_buffer &ungetwc_buffer position &buffer buffer_size $&buffer_ptr (buffer_len ,buffer_alignment 0saved_buffer_len 4buffer_pos 8&position_proc <&read_proc @B'write_proc DH'close_proc H`'ref_con#FILE__file_modes aopen_mode aio_mode abuffer_mode afile_kind afile_orientation abinary_io %__file_modesa_UINT32__file_state aio_state afree_buffer eof error%__file_state"&^fileposition&mode^ref_con&&^filebuff0'count6'ref_con<'&N'^file<basic_ostream<"' 'basic_iosf'ostream8basic_ios  0(tiestr_ 4fill_'iosf'<basic_ostream<"S( S(basic_ios(wostream8basic_ios  0(tiestr_ 4"fill_S(wios(@basic_istream<"' 'basic_ios gcount_(istream@basic_istream<"S( S(basic_ios gcount_ )wistreamscoped_lock )m_ \locked_k)scoped_lock"^locale.cppMetrowerks C/C++ for ARMD:\Products\ARM\NITRO_Support_3_0_auto\output\ARM_EABI_Support\msl\MSL_C++\MSL_Common\Src\ basic_string *r_Y*string compressed_pair * compressed_pair_imp * *first_allocator rep_s +r rep_u X+t0 +t1 +t2 raw_t y+words_  long_t f_ cap_ size_ +data_ short_t H,__anon v,s pad ,data_@class v,s padshort_sz f_ size_  short,int_fast16_t,int_least16_t,int16_tdecform style unused ,digits-decform&decimal sgn unused ,exp -sig`-decimal"@class length  .text !unused msl_mutex.cppMetrowerks C/C++ for ARMD:\Products\ARM\NITRO_Support_3_0_auto\output\ARM_EABI_Support\msl\MSL_C++\MSL_Common\Src\try_mutexscoped_lock /m_ \locked_.private_lock.smsl_thread.cppMetrowerks C/C++ for ARMD:\Products\ARM\NITRO_Support_3_0_auto\output\ARM_EABI_Support\msl\MSL_C++\MSL_Common\Src\ function 0 I0fp_ d0buf_/func_typesignature 40default_parmsO0function_base__vector_commonu0baseSP |4|0os_irqHandler.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\ARM7.TWL\src\`x1 ~OSi_IrqThreadQueue`S7 ~breakCtx_OSThreadQueue 1head 1tailx1OSThreadQueue1_OSThread 3context H24state L1next Pid Tpriority X4profiler \4queue `4link h4mutex l5mutexQueue tstackTop xstackBottom |stackWarningOffset x1joinQueue 5specific 6alarmForSleep @7destructor 4userParameter ^systemErrno1OSThreadHOSContext cpsr !4r 8sp <lr @pc_plus4 Dsp_svc3OSContext4 @enumOS_THREAD_STATE_WAITINGOS_THREAD_STATE_READYOS_THREAD_STATE_TERMINATEDx1_OSThreadLink 1prev 1next4OSThreadLink4OSMutex x1queue 1thread count a5link4OSMutex_OSMutexLink 4next 4preva5OSMutexLink_OSMutexQueue 4head 4tail5OSMutexQueue 46,OSiAlarm 6handler 4arg tag 6fire 6prev 6next 6period $6start6OSAlarm64unsigned long long6vu646OSTitleId6REGType646REGType64v6OSTick6u64F74$P | |-]OS_IrqHandler7 ||]OS_BreakIrqHandler7|4|]OS_IrqHandler_ThreadSwitch74||Nos_irqTable.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\9J}OSi_IrqCallbackInfoIndex*9J}OS_IRQTable2G9J}OS_IRQTable^9 ~OSi_IrqCallbackInfo <;9A9X9A99   9func enable 9argo9OSIrqCallbackInfo999@no_name@9:4|8|]OS_IrqDummy3:8||]OSi_IrqCallback:^Pindex Uenable9PcallbackTimask||(]OSi_IrqDma0:||.]OSi_IrqDma1:||4]OSi_IrqDma2$;||:]OSi_IrqDma3J;||I]OSi_IrqTimer0r;|$|O]OSi_IrqTimer1;$|4|U]OSi_IrqTimer2;4|D|[]OSi_IrqTimer3;D||o]OSi_IrqVBlank*<q:Pcallback||]OSi_IrqNDma0Q<||]OSi_IrqNDma1x<||]OSi_IrqNDma2<||]OSi_IrqNDma3<b|@|nos_interrupt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\j=9j==@no_name@==@no_name@=||']OS_InitIrqTable=||<]OS_SetIrqFunctionu><PintrBit<d=Pfunction?p=^info>^\i||r]OS_SetIrqFunctionEx>rPintrBitrv=Pfunctiont^Si|$|]OSi_EnterNDmaCallbackO?PdmaNo|=Pcallback=Parg$|p|]OSi_EnterTimerCallback?PtimerNo=Pcallback=Pargp||3]OS_SetIrqMask!@3Tintr6Pprep5^Pime||^]OS_DisableIrq]@Pprep||>]OS_SetIrqMaskEx@>TintrAPprep@^Pime|(|Q]OS_EnableIrqMask$AQTintrTPprepS^Pime(|`|[]OS_EnableIrqMaskExA[Tintr^Pprep]^Pime`||n]OS_DisableIrqMaskAnTintrqPprepp^Pime||x]OS_DisableIrqMaskExVBxTintr{Pprepz^Pime| |]OS_ResetRequestIrqMaskBTintrPprep^Pime |@|]OS_ResetRequestIrqMaskEx,CTintrPprep^Pime+@||os_pxi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\H ~OSi_IsResetOccurredJ ~OSi_IsTerminateOccurred@|P|$^]OS_IsResetOccurredADP|`|5^]OSi_IsTerminatePxiOccurredvD`|t|C]OSi_SetTerminatePxiOccurredDt||U]OSi_CommonCallbackEUPdataXPcommand||]OSi_SendToPxi[EPdataVpxi_send_datas||;os_spinLock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\^L ~isInitializedrsv1OSBootInfo  basic support;|;|!]OS_GetBootTypeÉ;|@<|8^]OSi_IsCodecTwlMode@<|p7}os_reset.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\3 ~OSi_IsInitReset3Њ00}OSi_LtdMainParams@<|x<|?]OS_InitResetx<|<|]OS_ResetSystemHTn4}4}P]OSi_DoResetSystemt4}d5}]OSi_DoBoot6}p7}C]OSi_ReloadTwlRomDataȋos_ownerInfo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\TOSOwnerInfo language favoriteColor 4birthday {nickName nickNameLength comment RcommentLengthfOSOwnerInfoOSBirthday month day4OSBirthday 62 os_ownerInfoEx.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\VOSOwnerInfoEx language favoriteColor 4birthday 9nickName nickNameLength Jcomment RcommentLength Tcountry Upadding=OSOwnerInfoEx 6(OSTWLSettingsData flags rsv country language rtcLastSetYear wrtcOffset agreeEulaVersion ǒpad1 ؒpad2 pad3 0pad4 D owner #parentalControl[OSTWLSettingsData __anon isFinishedInitialSetting isFinishedInitialSetting_Launcher isSetLanguage isAvailableWireless rsv isAgreeEULAFlagList raw isFinishedInitialSetting isFinishedInitialSetting_Launcher isSetLanguage isAvailableWireless rsv isAgreeEULAFlagListPOSTWLOwnerInfo userColor rsv pad birthday nickname comment OSTWLOwnerInfoOSTWLDate month dayOSTWLDate 6OSTWLParentalControl &flags rsv1 ogn ratingAge secretQuestionID secretAnswerLength +rsv <password MsecretAnswer#OSTWLParentalControl isSetParentalControl pictoChat dsDownload browser prepaidPoint photoExchange ugc rsv@OSTWLWirelessFirmwareData data –rsv^OSTWLWirelessFirmwareData<|=|os_entropy.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\<|=|!]OS_GetLowEntropyDataٗ!oUbuffer%uPmacAddress]=|<>|os_terminate_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\ARM7\src\,^$ ~terminated,^( ~sent=| >|$]OS_TerminateӘ >|8>|6^]OS_EnableIrq6Pprep8>|<>|l]OSi_TerminateCore:os_event.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\  flag x1queueԙOSEvent8os_application_jump.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\ LauncherParam header bodyLauncherParamLauncherParamHeader magicCode version bodyLength crc16LauncherParamHeaderLauncherParamBody ϛv1LauncherParamBody 6prevTitleID 6bootTitleID ,flags 9rsvLauncherBootFlags isValid bootType  isLogoSkip  isInitialShortcutSkip  isAppLoadCompleted  isAppRelocate rsv,LauncherBootFlags; p7}\=}mi_ndma.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common.TWL\src\L}MIi_NDmaConfig@_MINDmaConfig intervalTimer prescaler blockWord wordCountMINDmaConfig@enumMIi_NDMA_TYPE_FILLMIi_NDMA_TYPE_COPYMIi_NDMA_TYPE_SENDMIi_NDMA_TYPE_RECVMIi_NDMA_TYPE_PIPEMIi_NDMA_TYPE_HBLANKMIi_NDMA_TYPE_HBLANK_IFMIi_NDMA_TYPE_MMCOPYMIi_NDMA_TYPE_GXCOPYMIi_NDMA_TYPE_GXCOPY_IF MIi_NDMA_TYPE_CAMERACONT p7}8}L]MIi_GetControlDataLPndmaTypeNPcontData8}t9}]MIi_NDmaAsync_withConfig_DevLUndmaTypeTndmaNoןWsrcݟZdest data$sizeYcallback,argXconfig4dev8enableVenabledTcontDatat9}9} ]MI_InitNDmar9}9}P]MI_NDmaPipeAsync_SetUpPPndmaNoPUsrcPSdestPPsizeP(callbackP,arg9}`:}7]MI_NDmaSendAsync_Devף7PndmaNo7 Tsrc7&Sdest7Psize7,(callback72,arg70dev`:}:}U]MI_NDmaRecvAsync_DevUPndmaNoU8TsrcU>SdestUPsizeUD(callbackUJ,argU0dev:}0;}s]MI_NDmaPipeAsync_DevMsPndmaNosPTsrcsVSdestsPsizes\(callbacksb,args0dev0;}P;}^]MI_IsNDmaBusyPndmaNoP;};}]MI_WaitNDmaTndmaNohPdmaCntpPenabled;};}]MI_StopNDma[TndmaNonPregContPenabled;};}]MI_StopAllNDma;}(<}$]MI_NDmaRestartæ$TndmaNo(<}D<}{]MI_SetNDmaInterval:{PndmaNo{PintervalTimer{PprescalerD<}T<}]MI_SetNDmaBlockWordPndmaNoPwordT<}d<}]MI_SetNDmaWordCountPndmaNoPwordCountd<}<}]MI_InitNDmaConfig:^^nt\p<}=}]MIi_Aes_NDmaSendPndmaNozRsrcPsizePcallback arg$pConfig=}\=}]MIi_Aes_NDmaRecvPndmaNoSdestPsizePcallback arg$pConfig<>|,@|:mi_sharedWram.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common.TWL\src\7^, ~lock70 ~finishPtr7^4 ~sInitialized78 ~resultPtr^@enumMI_WRAM_AMI_WRAM_BMI_WRAM_C<>|>|]MI_InitWramManager>|`?|]MIi_CallbackForPxiPdata^PsendTypeWretvalPwramPparam`?|?|^]MIi_DoLockWramSlotsPwramPslots?|,@|^]MIi_DoUnlockWramSlotsRPwramPslots,@|$A|RYmi_dma.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\ b32 b16MIiDmaClearSrc,@|@|]MI_WaitDmaTdmaNo(Pp.RdmaCntpPenabled@|@|]MI_StopDma,TdmaNo4Pp:PdmaCntpPenabled@|$A| ]MI_StopAllDmaT$A|C|xmi_memory.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\$A|@A|]MIi_CpuSend16įPsrcpQdestpRsize@A|\A|]MIi_CpuRecv16'PsrcpQdestpRsize\A|pA|X]MIi_CpuClear32XPdataXQdestpXRsizepA|A|o]MIi_CpuCopy32o PsrcpoQdestpoRsizeA|A|]MIi_CpuPipe32RpsrcpQdestpRsizeA|A|]MIi_CpuSendFast%Psrcp+QdestpRsizeA|B|]MI_CpuFill81PdstpQdataRsizeB|C|x]MI_CpuCopy8wx7Psrcpx=QdstpxRsizeC|C|^]MI_CpuComp8CPmem1IPmem2Psize^PdO\p1endUPp2[Pp1C|C|mi_swap.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\C|C|+]MI_SwapWord +PsetData+QdestpImi_uncompress.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\ srcNum srcBitNum destBitNum destOffset destOffset0_onMIUnpackBitsParammi_stream.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\ initStream ͶterminateStream readByteStream readShortStream readWordStreamMIReadStreamCallbacksǶǶӶ C|D|εmi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\C|D|!]MI_InitԷkmi_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\MICache pagewidth .valid .invalid .loading ^valid_total ^invalid_total ^loading_totalnMICache4 MICachePage .next offset buffer4MICachePage MIDevice userdata Read WriteMIDevice^$^WD|D|pad_xyButton.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\pad\ARM7\src\k^< ~PADi_XYButtonAvailablek6@ ~PADi_XYButtonAlarmD|D|)^]PAD_InitXYButtonYD|D|X]PADi_XYButton_Callback]TfoldD|D|pxi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\pxi\common\src\D|D|)]PXI_Init\D|G|pxi_fifo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\pxi\common\src\Rl ~FifoCtrlInitR>p ~FifoRecvCallbackTableOUn^@enumPXI_FIFO_TAG_EXPXI_FIFO_TAG_USER_0PXI_FIFO_TAG_USER_1PXI_FIFO_TAG_SYSTEMPXI_FIFO_TAG_NVRAMPXI_FIFO_TAG_RTCPXI_FIFO_TAG_TOUCHPANELPXI_FIFO_TAG_SOUNDPXI_FIFO_TAG_PMPXI_FIFO_TAG_MIC PXI_FIFO_TAG_WM PXI_FIFO_TAG_FS PXI_FIFO_TAG_OS PXI_FIFO_TAG_CTRDG PXI_FIFO_TAG_CARDPXI_FIFO_TAG_WVRPXI_FIFO_TAG_CTRDG_ExPXI_FIFO_TAG_CTRDG_PHIPXI_FIFO_TAG_MIPXI_FIFO_TAG_AESPXI_FIFO_TAG_FATFSPXI_FIFO_TAG_CAMERAPXI_FIFO_TAG_WMWPXI_FIFO_TAG_SCFGPXI_FIFO_TAG_SNDEXPXI_FIFO_TAG_SEAPXI_MAX_FIFO_TAG U@enumPXI_PROC_ARM9PXI_PROC_ARM7 e rawGPXIFifoMessage tag err data@enumPXI_FIFO_SUCCESSPXI_FIFO_FAIL_SEND_ERRPXI_FIFO_FAIL_SEND_FULLPXI_FIFO_FAIL_RECV_ERRPXI_FIFO_FAIL_RECV_EMPTYPXI_FIFO_NO_CALLBACK_ENTRYD|E|(]PXI_InitFifo+Tenabled*^RiE|F|]PXI_SetFifoRecvCallbackP^Tfifotag UcallbackPenabledF|@F|^]PXI_IsCallbackReady^PfifotagPproc@F|xF|^]PXI_SendWordByFifo(^PfifotagPdata^PerrnfifomsgxF|F|]PXIi_SetToFifo{TdataPenabledF|G|*]PXIi_HandlerRecvFifoNotEmpty.nPtag-Pret_code,nfifomsgG|5Qp_buf=^Pn_buf3Ppad*^Rc;Qp_startPhex_char^Pradix^ precision^[width^UflagAPs^n_prefixGprefix^Pn_bufXbufc`T|tT|lstd_unicode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\std\common\src\"hK}STD_Sjis2UnicodeArray(lK}STD_Unicode2SjisArray`T|tT|X]STDi_AttachUnicodeConversionTableX.Pu2sX4Ps2utT|T|gpio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\exi\ARM7\src\@enumEXI_GPIOIF_SERIALEXI_GPIOIF_UNDEF@EXI_GPIOIF_GPIOEXI_GPIOIF_JOYtT|T| ]EXIi_SetBitRcnt0L Pmask PdataT|T|S]EXIi_SelectRcnt(S0PtypeT|$U|gpio2.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\exi\ARM7.TWL\src\T|T|%]EXI2i_SetBitGpio2CntL%Pmask%PdataT|U|V]EXI2i_RecvBitGpio2CntL^VTmaskU|U|i]EXI2i_SetBitGpio2CntHiPdataU|$U|x]EXI2i_GetBitGpio2CntH$U|V|snd_global.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7\src\SNDOutputSND_OUTPUT_MIXERSND_OUTPUT_CHANNEL1SND_OUTPUT_CHANNEL3SND_OUTPUT_CHANNEL1_3SNDChannelOutSND_CHANNEL_OUT_MIXERSND_CHANNEL_OUT_BYPASS$U|2TidPenabled||]SPI_Unlock2PidPenabled||]SPIi_ReturnResult2PcommandPresultnPtag|ؗ|G^]SPIi_CheckException#3ؗ||`]SPIi_GetExceptionc3`A0Ptype|,|o]SPIi_ReleaseException3oA0Ptype,||^]SPIi_SetEntryA4A0UtypeTprocessargsVi1UvlistPe|$|^]SPIi_CheckEntry4^Presult1msg$||]SpiCommonThread41Pentry1msg|| ]SpiPxiCallbackG5 nPtag Pdata ^Perr|(|REpm_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\^)~PMi_Initialized6)~PMi_Work,PMWork 6command 6status $param (regNumber6PMWork PMStatusPM_STATUS_READYPM_STATUS_START_SLEEPPM_STATUS_UTILITYPM_STATUS_READ_REGISTERPM_STATUS_WRITE_REGISTER,1|<|>]PM_Initl7@Si<|||^]PM_AnalyzeCommand7^PdataeTi`Tcommand|||]PM_ExecuteProcessi837TentryPresultXparameterWprocNumberPe|(|]PMi_ReturnResult8PcommandPresult^VerrUdata (|d|epm_send.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\(|d|2]PMi_SendPxiCommand92Pcommand2Pdata4Vpxi_send_datad||Ipm_pmic.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\d||>]PMi_SetRegister:>Preg>Tdata||]SPI_SendWait;Pdata|T|Z]PMi_GetRegisterV;ZPregT|x|y]PMi_SetControl;yTsw{Pdatax||]PMi_ResetControl;TswPdatam|D||pm_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\!<xK}PMi_LEDStatus!8=1}PMi_AmpGainLevelTable@enumPM_LED_NONEPM_LED_ONPM_LED_BLINK_LOWPM_LED_BLINK_HIGH||8]PMi_SwitchUtilityProc >8PprocNumber8Tparameter:^Sn^PdsGain^PdsGainPtwlGainTn|D|H]MCU_ReadRegister\>HTregJPitrmD||0^]MCU_WriteRegister>0Vreg0Tdata2Pitrm||o]PMi_SetLED>o<Tstatus||]PMi_SetSoundPower}E]PMi_InitShutdownControloGGTenabledp|| ]MCU_GetBatteryLevelG(>}>}r]PMi_MCUPwswCallbackG>}>}]PMi_MCUResetCallbackG>}>}]PMi_MCUShutdownCallback,H>}>}]PMi_MCUBatteryLowCallback`H>}>}]PMi_MCUBatteryEmptyCallbackH>}?}]PMi_DoResetHardwareH?}@@} ]PMi_DoExitH@@}@}:]PM_FlipHeartBeat'I>Pval@}@}P]PM_SetMcuForTerminateWIdgt_md5.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\math\common\src\XMATHMD5Context J__anon QK__anon a b c d Kstate 6length K__anon Kbuffer32 Kbuffer8IMATHMD5Context QK__anon a b c d Kstate a b c d@ Kbuffer32 Kbuffer8@@?MATHiHMACFuncs dlength blength Lcontext Lhash_buf LHashReset LHashSetSource >MHashGetDigestKMATHiHMACFuncsL@no_name@LL@no_name@2M@no_name@8M@no_name@DM@no_name@kM@no_name@qMLdgt_sha1.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\math\common\src\`MATHSHA1Context Nh Nblock Tpool Xblocks_low \blocks_highNMATHSHA1Context@?~crc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\math\common\src\MATHCRC8Table Otable^OMATHCRC8TableMATHCRC16Table OtableOMATHCRC16TableMATHCRC32Table 8PtableOMATHCRC32Table?net_sha256.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\math\common\src\lMATHSHA256Context jQh Nl $Nh ({Qdata h^numPMATHSHA256Context @?|p|5(scfg_proc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\R)~SCFGi_MessageBuffer^)~SCFGi_MessageQueue1*~SCFGi_ThreadR*~SCFGi_StackR6||6]SCFG_InitS|||R]SCFGi_CommonCallbackKSRPpxiData||ĩ|s]SCFGi_SendPxiDataSsPcommandsPordinalsPdatauVpxiDataĩ|p|]SCFGi_Exec5TPregValueRmessage^ZindexPp||Ftp_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\tp\src\.~valid_cnt.~invalid_cntU.~tpwTPWork Ucommand Ustatus $range (rangeMin ,AVvAlarm RVvCountUTPWork TPStatusTP_STATUS_READYTP_STATUS_AUTO_STARTTP_STATUS_AUTO_SAMPLINGTP_STATUS_AUTO_WAIT_END"~iVSPITpData Ve raw OWbytes `WhalfsiVSPITpData x  y  touch validity dummy,1p|h|2]TP_InitW4Sih||]SPI_DummyWaitW|l|l]TP_AnalyzeCommand>XlPdataTcommandqTil|@|]TP_AutoAdjustRangeXcVPtpdataPdensity@||"]TP_ExecuteProcess8Y"qWZentrykPvCountfYiIdensityGiVtemp8Pe||]TpVAlarmHandlerYwWTargiVtemp||hgtp_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\tp\src\7/~last_touch_flgSPITpValiditySPI_TP_VALIDITY_VALIDSPI_TP_VALIDITY_INVALID_XSPI_TP_VALIDITY_INVALID_YSPI_TP_VALIDITY_INVALID_XY@enumTP_DETECT_AXIS_XTP_DETECT_AXIS_YiV||G]TPi_DetectTouchi[||]SPI_DummyWait[||IZ]TPi_DetectPos\ZWdataVrangeZPaxis[UdensityXmaxRangeIZTvalidityScommand"[tempQkSj\i||]TP_ExecSamplingm]3[WdataVrange9[Udensity%Vidensity_ydensity_xTtemp_touchtemp_posk||Amic_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\mic\src\^/~micw<MICWork _command 1_status $type &admode (_buf ,index 0size 4timerValue 6timerPrescaler 8temp16 :temporary^MICWork MICStatusMIC_STATUS_READYMIC_STATUS_AUTO_STARTMIC_STATUS_AUTO_SAMPLINGMIC_STATUS_AUTO_ENDMIC_STATUS_END_WAIT,1^|H|7]MIC_Init`9SiH|$|R]MIC_AnalyzeCommand`RPdataPehPwu32gTcommandWTi$|ȹ|^]MicSetTimerValue`Pvalueȹ||)]MIC_ExecuteProcess]a)_TentryPerPeHPtemp9Pe||_]MICi_GetSysWorka|H|]MIC_TimerHandleraH||]MicTimerHandleraB|8|mic_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\mic\src\/~offset8,/~offset12/~sam12/~counter12/~counter8/~sam8|Ծ|9]MIC_ExecSampling8cYPadjustedKPaverage;PtempԾ||]SPI_DummyWaitReceivec|8|l]MIC_ExecSampling12"dPadjusted~,QaveragenPtemp>8|x|Imic_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\mic\src\MICIntrInfo handler sp delayIF dummydMICIntrInfoMICIntrPrio ieBit tableIndex0eMICIntrPrioe8|`|p]MIC_SetIrqFunctionepPintrBitpePfunctionrSi`|l|]MIC_EnableMultipleInterrupt-fl|x|]MIC_DisableMultipleInterruptdffs_file.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fs\common\src\FSArgumentForSuspendFSArgumentForUnmountFSArgumentForActivateFSArgumentForIdleFSArgumentForMountFSArgumentForCloseFileFSArgumentForFlushFileFSArgumentForCloseDirectoryFSArgumentForResumeC fs_overlay.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fs\common\src\FSOverlaySource ,iarc Govt9 Govt7 digest_key_ptr digest_key_lenhFSOverlaySource2i\FSArchive Mkname knext klist x1queue flag command lresult luserdata $*vvtbl (k__anon (reserved2 (__anon (base ,fat 0fat_size 4fnt 8fnt_size <fat_bak @fnt_bak Dlload_mem Hӄread_func Lwrite_func Preserved3 T.proc Xproc_flag2iFSArchive wkptr pack2ikHFSFile knext luserdata karc stat largument lerror nqueue n__anon 'oreserved1 8oprop 0p__anon 0preserved2 0 qargkFSFileFSResultFS_RESULT_SUCCESSFS_RESULT_FAILUREFS_RESULT_BUSYFS_RESULT_CANCELEDFS_RESULT_CANCELLEDFS_RESULT_UNSUPPORTEDFS_RESULT_ERRORFS_RESULT_INVALID_PARAMETERFS_RESULT_NO_MORE_RESOURCEFS_RESULT_ALREADY_DONEFS_RESULT_PERMISSION_DENIED FS_RESULT_MEDIA_FATAL FS_RESULT_NO_ENTRY FS_RESULT_MEDIA_NOTHING FS_RESULT_MEDIA_UNKNOWN FS_RESULT_BAD_FORMATFS_RESULT_MAXFS_RESULT_PROC_ASYNCFS_RESULT_PROC_DEFAULTFS_RESULT_PROC_UNKNOWNx1 'oreserved1 8opropFSROMFATProperty ofile pdir8oFSROMFATPropertyFSROMFATFileProperty own_id top bottom posoFSROMFATFilePropertyFSROMFATDirProperty eppos parent pFSROMFATDirProperty FSDirPos karc own_id index posepFSDirPos preserved2 qargFSROMFATCommandInfo Orreadfile rwritefile rseekdir sreaddir tfindpath Sugetpath uopenfilefast uopenfiledirect vclosefile qFSROMFATCommandInfo  ldst len_org lenrFSReadFileInfo  lsrc len_org lendrFSWriteFileInfo  epposrFSSeekDirInfo -sp_entry ^skip_stringrFSReadDirInfos s__anon sfile_id epdir_id is_directory name_len ?tname3sFSDirEntry  sfile_id epdir_idFSFileID karc file_idsFSFileID eppos tpath ^find_directory tresultPtFSFindPathInfo tfile tdirsep  gubuf buf_len total_len dir_idtFSGetPathInfo sidmuFSOpenFileFastInfo  top bottom indexuFSOpenFileDirectInfo reserveduFSCloseFileInfo0vFSArchiveInterface yReadFile zWriteFile (zSeekDirectory MzReadDirectory =|FindPath h|GetPath |OpenFileFast |OpenFileDirect |CloseFile $|Activate (}Idle ,"}Suspend 05}Resume 4H}OpenFile 8s}SeekFile <}GetFileLength @ ~GetFilePosition D(~Mount H;~Unmount LN~GetArchiveCaps Pg~CreateFile T~DeleteFile X~RenameFile \~GetPathInfo `SetPathInfo dCreateDirectory hDeleteDirectory lRenameDirectory p@GetArchiveResource tlunused_29 xFlushFile |ҁSetFileLength OpenDirectory CloseDirectory 5SetSeekCache Zreserved0vFSArchiveInterfaceylkkly zlkkly.zlkkSzlkklzrzpFSDirectoryEntryInfo {shortname shortname_length {longname longname_length attributes {atime 8{mtime P{ctime hfilesize lidrzFSDirectoryEntryInfoFSDateTime year month day hour minute second{FSDateTimeC|lkty^n|lkk^ty|lkk|lkky|lkk}k}k(}k;}kN}lkkty}lkk}}^FSSeekFileModeFS_SEEK_SETFS_SEEK_CURFS_SEEK_END}lkky~lkky.~kA~kT~lkym~lkt~lkt~lktt~lkt~TFSPathInfo attributes {ctime {mtime 4{atime Lfilesize PidFSFileInfoFSPathInfolkt~lktlktlkttFlkY_0FSArchiveResource 6totalSize 6availableSize maxFileHandles currentFileHandles maxDirectoryHandles currentDirectoryHandles bytesPerSector $sectorsPerCluster (totalClusters ,availableClusters_FSArchiveResourcelkk؁lkklkkt"lkk;lkklts4 reserved2 __anon base fat fat_size fnt fnt_size fat_bak fnt_bak lload_mem ӄread_func $write_func (reserved3 ,.proc 0proc_flag434 base fat fat_size fnt fnt_size fat_bak fnt_bak lload_mem ӄread_func $write_func (reserved3 ,.proc 0proc_flagلlkllkl4lkCARDRomRegion offset lengthGCARDRomRegion,FSOverlayInfo header target $Gfile_posFSOverlayInfo FSOverlayInfoHeader id guram_address ram_size bss_size sinit_init sinit_init_end file_id compressed flagFSOverlayInfoHeader@enumMI_PROCESSOR_ARM9MI_PROCESSOR_ARM7FSArchiveFAT top bottom]FSArchiveFAT MWiDestructorChain next dtor 7objMWiDestructorChainp_this1x||Nfs_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fs\common\src\x||6]FS_Init||card_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\^/~CARDi_EnableFlag@CARDEventListener devent valarm 4Condition 8֊userdata <lockID >܊paddingCARDEventListener CARDAccessLevelCARDiOwner("~^@no_name@ЊCARDiCommon cmd flag priority lock_owner ^lock_ref klock_queue |lock_target thread 5task task_q ^command paddingCARDiCommon`CARDiCommandArg Œresult type id src dst len XspecCARDiCommandArgCARDResultCARD_RESULT_SUCCESSCARD_RESULT_FAILURECARD_RESULT_INVALID_PARAMCARD_RESULT_UNSUPPORTEDCARD_RESULT_TIMEOUTCARD_RESULT_ERRORCARD_RESULT_NO_RESPONSECARD_RESULT_CANCELEDCARDBackupTypeCARD_BACKUP_TYPE_EEPROM_4KBITS CARD_BACKUP_TYPE_EEPROM_64KBITS CARD_BACKUP_TYPE_EEPROM_512KBITSCARD_BACKUP_TYPE_EEPROM_1MBITSCARD_BACKUP_TYPE_FLASH_2MBITSCARD_BACKUP_TYPE_FLASH_4MBITSCARD_BACKUP_TYPE_FLASH_8MBITSCARD_BACKUP_TYPE_FLASH_16MBITSCARD_BACKUP_TYPE_FLASH_64MBITSCARD_BACKUP_TYPE_FRAM_256KBITSCARD_BACKUP_TYPE_NOT_USEH total_size sect_size subsect_size page_size addr_width program_page write_page write_page_total erase_chip $erase_chip_total (erase_sector ,erase_sector_total 0erase_subsector 4erase_subsector_total 8erase_page <initial_status =Ipadding1 @caps DZpadding2x1@enumCARD_TARGET_NONECARD_TARGET_ROMCARD_TARGET_BACKUPCARD_TARGET_RW context $stack1FCARDTask ϒnext priority Ւuserdata ےfunction callbackFCARDTaskF@no_name@FCARDTaskQueue list workers quit dummyCARDTaskQueueFx1`CARDRomHeader game_name game_code maker_code product_id device_type device_size reserved_A game_version property main_rom_offset $main_entry_address (main_ram_address ,main_size 0sub_rom_offset 4sub_entry_address 8sub_ram_address <sub_size @Gfnt HGfat PGmain_ovt XGsub_ovt `rom_param_A hbanner_offset lsecure_crc nrom_param_B pmain_autoload_done tsub_autoload_done x0rom_param_C rom_size header_size main_module_param_offset sub_module_param_offset normal_area_rom_offset twl_ltd_area_rom_offset Areserved_B Rlogo_data \logo_crc ^header_crcʓCARDRomHeaderNTRʓCARDRomHeader   ,+ixCARDRomHeaderTWL ʓntr `debugger_reserved config1 access_control reserved_0x1B8 main_ltd_rom_offset reserved_0x1C4 main_ltd_ram_address main_ltd_size sub_ltd_rom_offset $reserved_0x1D4 sub_ltd_ram_address sub_ltd_size Gdigest_area_ntr Gdigest_area_ltd Gdigest_tabel1 Gdigest_tabel2 digest_table1_size digest_table2_sectors 5config2 Fmain_static_digest Wsub_static_digest (hdigest_tabel2_digest <ybanner_digest Pmain_ltd_static_digest dsub_ltd_static_digestiCARDRomHeaderTWL 43 game_card_on game_card_nitro_mode|8|<]CARD_Init>Tp8|x|]CARD_SetThreadPriority_WpriorVretPbak_psrUpx|| ē]CARD_GetRomHeader||'c]CARD_GetOwnRomHeaderTWLE||$card_common.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\0~cardi_common||]CARDi_InitResourceLockɞ{Pp||]CARDi_InitCommandPp/card_hook.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\ CARDHookContext next userdata callbackCARDHookContext ||gCcard_task.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\@no_name@FFܠܠF#FFFF||%]CARDi_InitTaskQueue%֠Pqueue||J]CARDi_InitTask*JPtaskJPpriorityJPuserdataKPfunctionK callback||a]CARDi_ProcessTaskaVqueueaTtaska^Pblockinga^WchangePriorityxUpriogPppfUbak_cpsr|X|)]CARDi_ReceiveTaskq/Tqueue^WblockingVbak_cpsr5UretvalX||]CARDi_TaskWorkerProcedureߣ;VargAPtaskGPqueueOcard_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\CARDDmaInterface ҤRecv StopCARDDmaInterfaceؤchannelsrc dstlenchannel] ||Kbcard_spi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\O1}arg`1}arg1}buf^5~status_checked¦5~cardi_param rest_comm src dst ^cmpqCARDiParam@no_name@¦¦¦¦¦|P|]CARDi_CommandEndۧUforce_waitTtimeout^WrestP||]CARDi_CommandReadStatus!dst||^]CARDi_WaitPrevCommandQ|d|]CARDi_CommArrayըӦPsrc٦PdstWlenߦVfunc Upd||<]CARDi_CommReadCore<Pp||M]CARDi_CommWriteCoreeMPpOtmp|X|_]CARDi_CommVerifyCore_PpX|||]CARDi_WriteEnableѩ|,|]CARDi_SendSpiAddressingCommand]PaddrPmodeaddr_cmdRwidth,||]CARDi_InitStatusRegisterTstat||]CARDi_ReadBackupCore VsrcUdstTlen||]CARDi_ProgramBackupCoreZdst YsrcXlenWsizeVpage&Ucmd|`|]CARDi_WriteBackupCoreJZdst,YsrcXlen%Wsize!Vpage2Ucmd`||E]CARDi_VerifyBackupCoreĬEWdstE8VsrcEUlenI>Tcmd||a]CARDi_EraseBackupSectorCoreFaWdstaVlendUsectorcDTcmd|(|]CARDi_EraseBackupSubSectorCore˭WdstVlenUsectorJTcmd(||]CARDi_EraseChipCore PTcmd||]CARDi_SetWriteProtectCoreTstatVarg^Zretry_countgYcmd|t|card_rom.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\5~cardi_rom_basew5~CARDiReadRomFunction}^userdatabufferoffsetlengthi||l]CARDi_SetRomOpGlPcommandlPoffsetoQcmd2nRcmd1||^]CARDi_IsNormalModeƯPoh|T|]CARDi_ReadRomIDCoreưTopT|`|]CARDi_ReadRomIDPret`|t|2]CARDi_InitRom+t|8|card_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\ARM7\src\t||-]CARDi_DoTaskFromARM9&8Uid/ɱTp|@|v]CARDi_DoneTaskFromARM9W@|8|]CARDi_OnFifoRecvnPtagPdata^Perr^UrequestedϱTp8||card_sp_pullOut.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\ARM7\src\^ L}isFirstCheck^5~skipCheckL}nextCount^ 5~isCardPullOut^$5~isInitialized^(5~detectPullOut,5~CARDiSlotResetCount8||6]CARD_InitPulledOutCallback||V]CARDi_CallbackForPulledOut޴VPdata|0|w^]CARD_IsPulledOut 0||^]CARD_CompareCardIDPcardIDiplCardIDTlockID^Pretval||^]CARD_IsCardIreqLoѵ^Pretval||]CARD_CheckPullOut_Polling(A}]CDCi_EndForceOutSoundL@^VFlagIirInitialized|D|]CDC_EnableInternalDischargePathPtempD||]CDC_SwitchOutputDeviceTdevice||p]CDC_SetIirFilterhpWtargetpVpParams^UflagAudioADCr^TflagDAC||]CDC_SetIirFilterCoreTtargetPpParamYparam|| ]CDC_SetIirFilterHalfCoreJ Ttarget 7PpParam param||] ]CDC_WaitPowerDownDACd reg_ Wi|`|x ]CDC_WaitPowerDownADC regz Wi`|| ]CDCi_InitializeIirFilterBuffer: Ti|<| ^]CDCi_IsIirFilterInitialized ^i]<||u& cdc_twlmode_access.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\5~cdcCurrentPage45~cdcMutex<|P|O]CDC_InitMutexP||]CDC_SetSpiParams!VregUsetBitsTmaskBitsPtmp||]CDC_SetSpiParamsExPpageVregUsetBitsTmaskBits| |]CDC_WriteSpiRegisterUregTdata |0|]SPI_SendWait1Pdata0|T|]CDC_WriteSpiRegisterExPpageUregTdataT||]CDC_ReadSpiRegisterTregPdata||]SPI_DummyWaitReceive||]CDC_ReadSpiRegisterExPpageTregPvalue||]CDC_WriteSpiRegistersVregdUbufpTsize^Si||4]CDC_WriteSpiRegistersEx5Ppage5Vreg5jUbufp5Tsize|T|D]CDC_ReadSpiRegistersEVregEpUbufpETsizeG^WiT||e]CDC_ReadSpiRegistersExtfPpagefVregfvUbufpfTsize||x]CDC_InitCurrentPage||]CDC_ChangePageTpage_not|| G sndex_request.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\5~sndexIirTarget5~sndexVol5~sndexTempDSPMixRate^5~sndexSetAlarm^5~sndexReqInitialized^5~sndexLock5~sndexSpiLockId35~sndexReqMsgQArrayY5~sndexIirParam^5~sndexReqMsgQ66~sndexVolAlarm1,6~sndexReqThreadJ6~sndexReqThreadStackDSNDEXSamplingRateSNDEX_SAMPLING_RATE_32730SNDEX_SAMPLING_RATE_47610||W]SNDEX_InitXUpriorityZTe||[]SNDEX_GetSamplingRate7||]SDNEXi_InitializeSMIX{Ttemp|H|]PxiCallbackTdata^PerrH||?]ReplyResult@@Pcommand@Presult@PparamBWdata|d|h]RequestThreadnPheadphonePsmix;Wdevice Wparam_volRsmixWi2sZfreqWePmuteWvolumeoPparamnVcommandm reqd||H]MCU_ReadRegisterHTregJPitrm|||^]MCU_SetVolume|Tvolume|P|]MCUVolumeSwtichCallback/P||]SetVolumeHandlerZx||_j tpex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\,1U|$|]TPEX_InitializeE"TlockId$||F]TPEX_ExecuteProcessGVentryGUwork]densityMPeIiVtemp0|| tpex_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\@enumTP_CONVERSION_CONTROL_HOSTTP_CONVERSION_CONTROL_SELF@enumTP_CONVERSION_MODE_NONETP_CONVERSION_MODE_XYTP_CONVERSION_MODE_XYZTP_CONVERSION_MODE_X TP_CONVERSION_MODE_YTP_CONVERSION_MODE_ZTP_CONVERSION_MODE_AUX3TP_CONVERSION_MODE_AUX2TP_CONVERSION_MODE_AUX1 TP_CONVERSION_MODE_AUTO_AUX$TP_CONVERSION_MODE_AUX123,TP_CONVERSION_MODE_XP_XM4TP_CONVERSION_MODE_YP_YM8TP_CONVERSION_MODE_YP_XM<@enumTP_CONVERSION_PIN_INTERRUPTTP_CONVERSION_PIN_DATA_AVAILABLETP_CONVERSION_PIN_INTERRUPT_DATA_AVAILABLETP_CONVERSION_PIN_NEW_BUFFER_MODE@enumTP_INTERVAL_NONETP_AUX_INTERVAL_1_12MTP_AUX_INTERVAL_3_36M TP_AUX_INTERVAL_5_59M TP_AUX_INTERVAL_7_83M TP_AUX_INTERVAL_10_01M TP_AUX_INTERVAL_12_30M TP_AUX_INTERVAL_14_54MTP_AUX_INTERVAL_16_78MTP_INTERVAL_8MSTP_INTERVAL_1MSTP_INTERVAL_2MSTP_INTERVAL_3MSTP_INTERVAL_4MSTP_INTERVAL_5MSTP_INTERVAL_6MSTP_INTERVAL_7MS@enumTP_NEW_BUFFER_CONVERSION_MODE_CONTINUOUSTP_NEW_BUFFER_CONVERSION_MODE_SINGLESHOT@@enumTP_RESOLUTION_12TP_RESOLUTION_8TP_RESOLUTION_10_TpStabilizationTimeTP_STABILIZATION_TIME_0_25USTP_STABILIZATION_TIME_1USTP_STABILIZATION_TIME_3USTP_STABILIZATION_TIME_10USTP_STABILIZATION_TIME_30USTP_STABILIZATION_TIME_100USTP_STABILIZATION_TIME_300USTP_STABILIZATION_TIME_1MS_TpPrechargeTimeTP_PRECHARGE_TIME_0_25USTP_PRECHARGE_TIME_1USTP_PRECHARGE_TIME_3USTP_PRECHARGE_TIME_10USTP_PRECHARGE_TIME_30USTP_PRECHARGE_TIME_100USTP_PRECHARGE_TIME_300USTP_PRECHARGE_TIME_1MS_TpSenseTimeTP_SENSE_TIME_1USTP_SENSE_TIME_2USTP_SENSE_TIME_3USTP_SENSE_TIME_10USTP_SENSE_TIME_30USTP_SENSE_TIME_100USTP_SENSE_TIME_300USTP_SENSE_TIME_1MS@enumTP_DEBOUNCE_0USTP_DEBOUNCE_8USTP_DEBOUNCE_16USTP_DEBOUNCE_32USTP_DEBOUNCE_64USTP_DEBOUNCE_128USTP_DEBOUNCE_256USTP_DEBOUNCE_512USiV   | |%]TPEX_SetConversionMode &{Pcontrol&Qmode&xPpin |8|@]TPEX_SetIntervalPA'Pinterval8|`|Z]TPEX_SetTouchPanelDataDepth[Pdepth]Ptmp`|||r]TPEX_EnableNewBufferMode|||]TPEX_DisableNewBufferMode||]TPEX_SetNewBufferModeXPmode||]TPEX_SetResolutionJPres||]TPEX_SetStabilizationTimePtime| |]TPEX_SetPrechargeTime$Ptime |(|]TPEX_SetSenseTimedPtime(|D|]TPEX_SetDebounceTimePtimeD||^]TPEX_ReadBuffer aUdataTrangegXdensity}^Wsame_count|^VySum{^PxSumz^Pjz^RilPyRangekPxRangefSmaxRange)myBuf(~ xBuf'buf&^Pj&^Ri|} micex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\^,1^^|\})]MICEX_AnalyzeCommand-Uw,Tcommand\}}^]MICEXi_IsCodecAutoSamplingT}}]MICEX_ExecuteProcessTentryRtemp}(}]MicexIntrHandler30Pdata8"Pdata16XwWiVtemp(}}G^]MicexUpdateStatusOnBufferFull|JPw}}^]MicexConvSamplingSpanUspanTdest[Prate} } micex_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\8~micexIntrInfoA1}micexIntrPrioMICEXIntrInfo handler sp delayIF delayIF2MICEXIntrInfoR-MICEXIntrPrio ieBit ie2Bit ieTableIndex ie2TableIndexRMICEXIntrPrio}d}]MICEX_EnableMultipleInterrupt6UhandlerTed}}]MICEX_DisableMultipleInterruptTe} }]MICEX_IrqHandler@D}H}y mcu_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\uHL}MCUiPwswStatusu^@no_name@U%gd_SDFUNCTION Version SDList pName aMaxDevices aNumDevices pIds pProbe 1 pRemove $h pSuspend ( pResume , pWake 0 pContext 4 Driver 8DeviceList @:CleanupReqSig `FlagsgSDFUNCTION _SD_PNP_INFO SDIO_ManufacturerCode SDIO_ManufacturerID SDIO_FunctionNo SDIO_FunctionClass SDMMC_ManfacturerID SDMMC_OEMApplicationID CardFlagsSD_PNP_INFO^pFunctionpDevice g&X_SDDEVICE SDList FuncListLink  pRequest  pConfigure N AllocRequest r FreeRequest pIrqFunction $ pIrqAsyncFunction ( IrqContext , IrqAsyncContext 0 pFunction 4 pHcd 8 DeviceInfo D pId P+ Device TSlotCurrentAlloc VFlags WVersion&SDDEVICE ^pDev req &%# ^pDevB configH &lT f pDevl %&x pDev pReq &% pContext  pContext g] _SDDEVICE_INFO X AsSDIOInfo AsSDMMCInfo SDDEVICE_INFO _SDIO_DEVICE_INFO FunctionCISPtr FunctionCSAPtr FunctionMaxBlockSizeX SDIO_DEVICE_INFO_SDMMC_INFO Unused SDMMC_INFO 7 pFunction\ pDeviceb g&n ^pFunction state^g ^pFunction g ^pFunction state^enable^g0_CARD_PROPERTIES IOFnCount SDIORevision SD_MMC_Revision SDIO_ManufacturerCode SDIO_ManufacturerID CommonCISPtr RCA SDIOCaps CardCSD Flags $OperBusClock (BusMode *OperBlockLenLimit ,OperBlockCountLimit .CardState /CardVoltage CARD_PROPERTIES&_SDHCD_IRQ_PROC_STATESDHCD_IDLESDHCD_IRQ_PENDINGSDHCD_IRQ_HELPERVb_SDDMA_DESCRIPTION Flags MaxDescriptors MaxBytesPerDescriptor Mask aAlignmentbSDDMA_DESCRIPTION(_SIGNAL_ITEM SDList :Signal'SIGNAL_ITEMsdio_bus_events.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_SDIO_INT_CTRL_DATA ^SlotIRQEnable IRQDetectMode9SDCONFIG_SDIO_INT_CTRL_DATA_HCD_EVENT_MESSAGE Event  pHcdHCD_EVENT_MESSAGE]ysdio_bus_misc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_POWER_CTRL_DATA ^SlotPowerEnable SlotPowerVoltageMaskSDCONFIG_POWER_CTRL_DATA _SDCONFIG_BUS_MODE_DATA ClockRate BusModeFlags ActualClockRateSSDCONFIG_BUS_MODE_DATA_SDCONFIG_INIT_CLOCKS_DATA NumberOfClocksSDCONFIG_INIT_CLOCKS_DATA_SDCONFIG_FUNC_ENABLE_DISABLE_DATA EnableFlags TimeOut pOpComplete "pOpCompleteContext;SDCONFIG_FUNC_ENABLE_DISABLE_DATAContextstatus^_SDCONFIG_FUNC_SLOT_CURRENT_DATA SlotCurrent(SDCONFIG_FUNC_SLOT_CURRENT_DATANsdio_bus_os.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\twl\ gid ^heap cardDetectTskPri irqTskPri dpcTskPriSSDIO_INIT_SETTINGSsdio_hcd.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\hcd\TWL_hcd\_SDHCD_DRIVER_CONTEXT ]Hcd kDevice ^CardInserted ^KeepClockOn ^SD4Bit SDpc DpcFlagsSDHCD_DRIVER_CONTEXT_SDHCD_DEVICE BlobkSDHCD_DEVICEBsdio_lib_c.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\sdio_lib\_SDMESSAGE_BLOCK SDList ^MessageLength MessageStartiSDMESSAGE_BLOCK }};, nvram_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\8~nvramw NVRAMWork commandNVRAMWork ,1 } }1]NVRAM_Init,3Si } }G]NVRAM_AnalyzeCommandGPdataaVsize`Uaddr_Pbuf^Pwu32]TcommandLTi }}]NVRAM_ExecuteProcess4TentryPe}}^]NvramCheckReadyToReadtempStatus}4}^]NvramCheckReadyToWritetempStatus4}}^]NvramIsAvailableMemAddrPaddr}}6L nvram_instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\}} ]NVRAM_WriteEnableM}}]SPI_SendWaitPdata}0}0]NVRAM_WriteDisable0}}@]NVRAM_ReadStatusRegister@Pbuf}}o]NVRAM_ReadDataBytesoPaddressoPsizeoUbufr\iqadr}}]SPI_DummyWait}}]NVRAM_ReadDataBytesAtHigherSpeedJ PaddressPsizeUbuf\iadr}}]NVRAM_PageWrite PaddressPsizePbufTiadr}}]NVRAM_PageProgram^!PaddressPsizePbufTi adr}}`]NVRAM_PageErase!`Paddress}}~]NVRAM_SectorErase!~Paddress}P}]NVRAM_DeepPowerDown"P}}]NVRAM_ReleaseFromDeepPowerDownI"}}]NVRAM_ChipErases"}l}]NVRAM_ReadSiliconId"Pbufl}} ]NVRAM_SoftwareReset"J} %}m control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\rtc\ARM7\src\9~rtcInitialized49~rtcMutex#9~rtcWorkRTCWork ^msgQ $msgArray 01thread $stack ^busy command padding 1polling x1pollingQ $pollingStack 6pollingAlarm#RTCWork#66RTCPxiResultRTC_PXI_RESULT_SUCCESSRTC_PXI_RESULT_INVALID_COMMANDRTC_PXI_RESULT_ILLEGAL_STATUSRTC_PXI_RESULT_BUSYRTC_PXI_RESULT_FATAL_ERRORRTC_PXI_RESULT_MAXRTCRawStatus2 intr_mode  dummy0  intr2_mode  test dummy1%RTCRawStatus2RTCRawStatus1 reset format dummy0  intr1  intr2  bld  poc dummy1&RTCRawStatus1}L}W]RTC_Init'WXpriorityYPenabledL}}^]RTCi_Lock'},}]RTCi_Unlock(,}}^]RTC_IsAvailablePxiCommandj(Pcommand}}]RtcPxiCallback(Pdata^PerrTcommand}P}L]RtcReturnResult%)LPcommandL%PresultP} $}`]RtcThread])d%msg $}$}`]RtcAlarmIntr)dTintr_numc%stat2b&stat1$} %}1]RtcBCD2HEX0*1Pbcd5^w4Ri3\hex %}-} instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\rtc\ARM7\src\RTCRawAlarm week dummy0 we hour afternoon he minute  me dummy2*RTCRawAlarm+RTCRawData N,t $.a 0words 0halfs /0bytes+RTCRawData y,date J-timeRTCRawDate year month dummy0 day  dummy1 week dummy2y,RTCRawDateRTCRawTime hour afternoon dummy0 minute dummy1 second  dummy2 J-RTCRawTime &status1 %status2 .__anon /pulse *alarm _/adjust /free /pulse *alarm _/adjust /freeRTCRawPulse pulse dummy/RTCRawPulseRTCRawAdjust adjust dummy_/RTCRawAdjustRTCRawFree free dummy/RTCRawFree+y,J-J-//****&&%%_/_///0RTCRawCounter 41__anon count dummy m1bytes0RTCRawCounter count dummy1RTCRawFout /2__anon fout dummy0 \2__anon fout2 fout1 dummy11RTCRawFout fout dummy0 fout2 fout1 dummy113 year month dummy0 ye me day dummy1 de dummy22RTCRawAlarmEx333** %}P%}+]RTC_Reset3-&statP%}t&}A]RTC_SetHourFormate4ATformatD*alarmC&stat1t&}&}]RTC_ReadDateTime4+Tdata&}&}]RTC_WriteDateTime4@0Tdata&}'}]RTC_ReadDate5F0Tdate'}0'}]RTC_ReadTimeZ5L0Ttime0'}h'}]RTC_WriteTime5R0Ttimeh'}'}^]RTC_ReadPulse5X0Tpulse%stat2'}D(}^]RTC_WritePulse;6^0Tpulse%stat2D(}(}^]RTC_ReadAlarm16d0Talarm%stat2(})}5^]RTC_WriteAlarm165j0Talarm7%stat2)}x)}Q^]RTC_ReadAlarm257Qp0TalarmS%stat2x)})}l^]RTC_WriteAlarm27lv0Talarmn%stat2)}*}]RTC_ReadStatus17|0Tstat*}H*}]RTC_WriteStatus180TstatH*}t*}]RTC_ReadStatus2D80Tstatt*}*}]RTC_WriteStatus280Tstat*}*}]RTC_ReadAdjust80Tadjust*}+}]RTC_WriteAdjust90Tadjust+}<+}]RTC_ReadFree=90Tfree<+}t+}]RTC_WriteFreey90Tfree|H}H}]RTC_ReadCounter90TcounterH}H})]RTC_ReadFout9)~1TfoutH}@I}=]RTC_WriteFout1:=2Tfout@I}lI}Q]RTC_ReadAlarmEx1s:Q2TalarmexlI}I}c]RTC_WriteAlarmEx1:c3TalarmexI}I}u]RTC_ReadAlarmEx2:u3TalarmexI}J}]RTC_WriteAlarmEx2;;3Talarmext+},}]RtcChangeAlarmFormat24to12;3Palarm,}-}]RtcChangeAlarmFormat12to24;3Palarm-}-}]RtcGpioTransferF<WinstVparam3UbufTsize-}0} gpio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\rtc\ARM7\src\-}0.}&]RTCi_GpioStart=0.}d.}Q]RTCi_GpioEnd7=d.}.}w]RTCi_GpioSendCommand=xpcommandxtparameter.}d/}]RTCi_GpioSendData=<ppDatatsized/}0}]RTCi_GpioReceiveDataF><ppDatatsize`> apistat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^PCFD>0ertfs_stat ^st_dev ^st_ino st_mode ^st_nlink ^st_rdev st_size O@st_atime O@st_mtime O@st_ctime $st_blksize (st_blocks ,fattribute>ERTFS_STATdwordBLOCKTCLUSTERTYPEdatestr date timeO@DATESTRwordbyte@,pc_file Apobj flag fptr fptr_cluster fptr_block ^needs_flush ^is_free ^at_eof Rfcluster_cache@PC_FILEA drobj *Bpdrive pNfinode  Rblkinfo ^isroot ^is_free RpblkbuffADROBJ0Btddrive ^mount_valid ^mount_abort ^drive_opencounter volume_serialno Hvolume_label ^bytespcluster $byte_into_cl_mask (^fasize ,rootblock 0firstclblock 4^driveno 8maxfindex <fatblock @^secproot D^fat_is_dirty Hbootaddr L)Hoemname Vbytspsector Xsecpalloc \^log2_secpalloc `secreserved bnumfats dnumroot hnumsecs lmediadesc psecpfat tsecptrk vnumhead xnumhide |free_contig_base free_contig_pointer known_free_clusters infosec partition_base partition_size ^partition_type :Hpathname_buffer KHfilename_buffer ^begin_user_area register_file_address ^interrupt_number drive_flags ^partition_number ^pcmcia_slot_number ^pcmcia_controller_number pcmcia_cfg_opt_value ^controller_number ^logical_unit_number \Hdev_table_drive_io Hdev_table_perform_device_ioctl access_semaphore Hdevice_name (Hfatcontext hKpbuffcntxt ldNpfscntxt pjNfad0BDDRIVE    bH^driveno^sectorbufferHcountreadin^H^driveno^opcode^argHPO@fatbuffcntxt stat_primary_cache_hits stat_secondary_cache_hits stat_secondary_cache_loads stat_secondary_cache_swaps Jpuncommitted_blocks Kpcommitted_blocks Kpfree_blocks Kpfat_buffers ^num_blocks $^num_free (^low_water ,^hash_size 0hash_mask 4Kmapped_blocks 8Kmapped_data <Kfat_blk_hash_tblHFATBUFFCNTXTJfatbuff Kpnext Kpprev Kpnext2 ^fat_block_state fat_blockno Kfat_dataJFATBUFFJJJJJJKKJK0blkbuffcntxt stat_cache_hits stat_cache_misses aMppopulated_blocks RNpfree_blocks ^num_blocks ^num_free ^scratch_alloc_count ^low_water ^num_alloc_failures $^hash_size (hash_mask ,XNblk_hash_tblKBLKBUFFCNTXTgMblkbuff )Npnext /Npprev 5Npnext2 ^block_state ^use_count ;Npdrive blockno ANdatagMBLKBUFFgMgMgM0BgM^NgMvNdfinode Pfname Pfext fattribute P__anon Presarea Poptional_fields fclusterhi ftime fdate fcluster fsize alloced_size $^opencount (^openflags ,dQpfile_buffer 0^file_buffer_dirty 4jQmy_drive 8my_block <^my_index @pQpnext DvQpprev H^is_free L|QsvNFINODE Presarea Poptional_fields reserved crtime_ms crtime crdate acdategM0BvNvNsegdesc ^nsegs ^segindex Qsegblock ncksum Rfill|QSEGDESC  dirblk my_frstblock my_block ^my_index RDIRBLKgM fcluster_buf start_index buf_size RbufRFCLUSTER_CACHE>AvN>p'^]FATFSi_rtfs_pc_fstat}S'^Tfd'>Upstat)@Ppfilepb^]FATFSi_rtfs_pc_statTbRTnamebRVpstatf^Vret_vale^UdrivenodSTpobj`]FATFSi_pc_finode_stathTSPpiSPpstats `| rtlowl.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\Tpcblk0 jump qWoemname bytspsector secpalloc secreserved numfats numroot numsecs mediadesc secpfat secptrk numhead numhide numhide2 $numsecs2 (secpfat2 ,physdrv -xtbootsig 0volid 4Wvollabel @flags Bfs_version Drootbegin Hinfosec Jbackup Lfree_alloc Pnext_alloc   0B0BgMWDptable Wents @signatureWPTABLE@Xptable_entry boot s_head s_cyl p_typ e_head e_cyl r_sec p_sizeXPTABLE_ENTRYUgM0BgM0B0B0B0B0B0B0B0B0B0B`(^]FATFSi_pc_log_base_2mY(Pn*^Qlog\@^]FATFSi_pc_i_dskopen.Z@^Vdrivenoa UQp2aUPp1E^Upartition_statusD^Pret_valCUbl0BWTpdr\`^]FATFSi_pc_read_partition_tableZ^VdrivenoWUpdr^Vret_valPiWTbufWVppart`4^]FATFSi_pc_gblk0R[VdrivenoXUpbl0XPbXTbuf4^]FATFSi_pc_clzero[XWpdrivePclusterVcurrblUiXTpbuffX]FATFSi_pc_drno_to_drive_structD\^UdrivenoXTpdr4$X]FATFSi_pc_drno2dr\$^Pdriveno'XUpretval&XPpdr4M^]FATFSi_pc_dskfree]M^UdrivenoOXTpdr؉|]FATFSi_pc_sec2cluster`]|YPpdrive|Pblockno؉]FATFSi_pc_sec2index] YRpdrivePblocknoPanswer,]FATFSi_pc_cl2sectorO^YPpdrivePclusterPtPblockno,|]FATFSi_pc_chain_length^YPpdrivePbyte_lengthPchain_lengthPltempe|l apickdsk.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\B_.FATFSi_glBcSFATFSi_crossed_file_core$chk_global ^be_verbose ^fix_problems ^write_chains bdrive_structure n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters $n_file_clusters (n_hidden_clusters ,n_dir_clusters 0bcrossed_file_freelist 44ccrossed_points n_crossed_points clost_chain_list n_lost_chains n_lost_clusters cbm_used "cgl_file_name "cgl_file_path $^recursion_depth $n_bad_lfns $cl_start $cl_end $^on_first_pass_CHK_GLOBAL0BCLTYPEbcrossed_file cfile_name .cpnextbCROSSED_FILE  bEc1crossing_point cluster cplistEcCROSSING_POINTb1    gb1c0chkdisk_stats n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters n_file_clusters n_hidden_clusters n_dir_clusters n_crossed_points $n_lost_chains (n_lost_clusters ,n_bad_lfnscCHKDISK_STATS__b  @  AAA0B0B0B  AAAb|(^]FATFSi_rtfs_pc_check_diskQgcVdrive_idcZpstat^Uverbose^Tfix_problems^0write_chains^Yret_val}estr_slash^Pi^Pdrive_number( u]FATFSi_print_chkdsk_statisticsgueTpglwUltemp ]FATFSi_print_chkdsk_crossed_files=heZpgl^Yn_printedeXpcross^Wi^]FATFSi_allocate_chkdsk_coreh\i^]FATFSi_write_lost_chainshVicurrent_chk_fileD'^]FATFSi_build_chk_filei'Vbad_chain_no'Ucurrent_file_no'eTret_file_no/ecs_filename.efilename,ePpfile+^Zfd*Ptemp)ZremainderD(^]FATFSi_scan_all_files|jeZdir_nameeldir_nameeWentryePdirectory(^]FATFSi_process_used_mapkeZpobjeYfilename$^Xfound_an_intersection#^Wis_hidden"^Vis_dir!Pt1 Ptrue_sizeUn_clustersTclusterH^]FATFSi_check_lost_clusterskeZpdrnxtYclusterHl^]FATFSi_add_cluster_to_lost_listlfZpdrPcluster^Yfound^SiXfirst_cluster_in_chainl"]FATFSi_count_lost_clusters m" fWpdr%Pcluster$^ViG^]FATFSi_scan_crossed_filesmGfZdir_nameKfldir_nameJ&fWentryI,fVdirectoryH^]FATFSi_process_crossed_file:n2fXpobj8fWfilename>fYpcross^PiUclusterHԢ^]FATFSi_add_cluster_to_crossednPcluster^SiԢT]FATFSi_chain_sizenPclusterTn_clustersTl5]FATFSi_get_bitHo5DfPbitmap5PindexNl: apiwrite.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0B@0B@@0B@0Bl)^]FATFSi_rtfs_po_writer)^Tfd)oZin_buff)^Ycount~O@crdate<^ p_errno;^Xret_val:^extending_file9^end_of_chain8Pblock_to_write7Walloced_size6^Pn_left5^Pn_written4^Vn_bytes3ltemp2Pn_clusters1 next_cluster0Vn_w_to_write0[n_to_write/Pn_blocks_left.Pbyte_offset_in_block-Pblock_in_cluster,oUpdrive+oTpfileԬ^]FATFSi_rtfs_po_truncatet^Tfd,offsetZrange_checkPnew_chain_len[old_chain_lenclusters_to_release^Yp_errnoPclnoXlast_cluster_in_chainWfirst_cluster_to_release^Vret_valoUpdrivepTpfileԬc^]FATFSi__po_flushtc pUpfilei^Tret_valgpPpdrf^Udriveno^]FATFSi_rtfs_po_flushu^Tfd^Udriveno^Tret_valpPpfile^]FATFSi_rtfs_pc_diskflushupTpath!^Vret_val #pUpdrive^TdrivenoJ,^ apicnfig.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\~FATFSi_prtfs_cfgkO}FATFSi___fat_primary_cache_5O}FATFSi___fat_primary_index_4O}FATFSi___fat_primary_cache_1O}FATFSi___fat_primary_cache_6O}FATFSi___fat_primary_cache_9؄O}FATFSi___fat_primary_cache_7O}FATFSi___fat_primary_index_1O}FATFSi___fat_primary_cache_4O}FATFSi___fat_primary_index_9(O}FATFSi___fat_primary_cache_8?O}FATFSi___fat_hash_table_6VO}FATFSi___fat_primary_index_8gO}FATFSi___fat_primary_index_0xO}FATFSi___fat_primary_cache_3O}FATFSi___fat_hash_table_5O}FATFSi___fat_primary_index_5P}FATFSi___fat_primary_index_6ȅP}FATFSi___fat_hash_table_0߅P}FATFSi___fat_hash_table_1P}FATFSi___fat_primary_index_3 P}FATFSi___fat_hash_table_3(P}FATFSi___fat_hash_table_450P}FATFSi___fat_primary_index_7F8P}FATFSi___fat_primary_cache_0]@P}FATFSi___fat_hash_table_7tHP}FATFSi___fat_hash_table_8PP}FATFSi___fat_hash_table_9XP}FATFSi___fat_hash_table_2xP}FATFSi___fat_primary_index_2ʆP}FATFSi___fat_primary_cache_2P}FATFSi___mem_block_hash_tableP}FATFSi___rtfs_user_table ĺRtfsMyMutexBufgtQ}FATFSi___mem_file_pool~FATFSi_rtfs_cfg_corex,S}FATFSi___fat_buffer_5TW}FATFSi___fat_buffer_4|[}FATFSi___fat_buffer_3_}FATFSi___fat_buffer_1c}FATFSi___fat_buffer_0͇g}FATFSi___fat_buffer_9އl}FATFSi___fat_buffer_8Dp}FATFSi___fat_buffer_7lt}FATFSi___fat_buffer_6x}FATFSi___mem_drobj_pool"~}FATFSi___fat_buffer_23}FATFSi___mem_finode_poolD}FATFSi___mem_block_poolU}FATFSi___mem_drives_structures~lrtfs_cfg ^cfg_NDRIVES ^cfg_NBLKBUFFS ^cfg_BLK_HASHTBLE_SIZE ^cfg_NUSERFILES ^cfg_NDROBJS ^cfg_NFINODES ^cfg_NUM_USERS cfg_FAT_BUFFER_SIZE cfg_FAT_HASHTBL_SIZE ΂mem_drives_structures Ԃmem_block_pool ڂmem_block_hash_table mem_file_pool mem_drobj_pool mem_finode_pool fat_buffers lfat_hash_table ,fat_primary_cache <Ifat_primary_index `rtfs_user_table Kbuffcntxt <inoroot Bmem_finode_freelist Hmem_drobj_freelist Ndrno_to_dr_map Lide_semaphore Pfloppy_semaphore Tfloppy_signal Xcritical_semaphore \^default_drive_id `useindex descratch_pdrive h^drive_opencounter~RTFS_CFGh^h^0BgMgM@AvNh Jh &Jh=ChZf|rtfs_system_user task_handle ^rtfs_errno rtfs_driver_errno ^dfltdrv ^dfltdrv_set %lcwdfRTFS_SYSTEM_USERh6vNvNAh_0B0B|҄9PJJمJJJ/JWnJJJ J  ۆ@gM|frtfs_my_mutex 4mtx ^validRTFS_MY_MUTEX@ (J(J(J(J(J(J(J(J(J`A2JvN20*gM+0B4Ȳ^]FATFSi_rtfs_pc_ertfs_configȲ,f]FATFSi_rtfs_my_alloc_mutex^\i),` rttermin.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\! ,Hb]FATFSi_rtfs_print_string_14b^Pstringidb^TflagsHtg]FATFSi_rtfs_print_string_2g^PstringidgUpstr2g^Tflagstm]FATFSi_rtfs_print_long_1mPlm^Tflagsobufferܳ]FATFSi_rtfs_print_one_stringvPpstr^Tflagsܳ`]FATFSi_pc_ltoaXnumWdestPpUolddest^Pdigit‰buffer`H rtutbyte.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\`]FATFSi_pc_strchrHPstringPch^]FATFSi__illegal_alias_charTchش"^]FATFSi_rtfs_strcpy"ƌPtarg"̌Psrc$^Ploop_cntشJ]FATFSi_copybuff]JҌSvtoJ،PvfromJ^Psize0c]FATFSi_pc_cppadcތVtocUfromc^Tsize0Hn]FATFSi_rtfs_memset.nPpvnPbn^PnoPpH rtutil.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^H'^]FATFSi_pc_path_to_driveno'яTpath*^Pdrivenumber?^]FATFSi_pc_parse_raw_drive?׏PpathA^PdnoXKݏ]FATFSi_pc_parsedriveKVdrivenoKUpathN^TdnoMPpXDv]FATFSi_pc_mpath-vYtovXpathvWfilenamez cyVpx$UretvalD^]FATFSi_pc_search_csl*Pset0Pstring6Sp8^]FATFSi_name_is_reservedޒ<Tfilename8d]FATFSi_to_DWORD>BPfromPtPresdx ]FATFSi_to_WORD HPfrom Pnresx]FATFSi_fr_WORDܓNPtoPfrom&]FATFSi_fr_DWORD+&TPto&PfromTi apifilio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0BAA@0B@0B@0B@@0B@@0B@@@A0BA@0B0B0B@@gM@gM@gM8N^]FATFSi_rtfs_po_openZNДYnameNUflagNmode`֔Ppdrive_^Tp_errno^VltempZ clusters_to_releaseY^Zopen_for_writeX^[drivenoWܔfileextVPfilenameUPpathTYpobjSXparent_objRPclusterQWpfile8U^]FATFSi_rtfs_po_read0U^TfdU Zin_buffU^Ycount^^end_of_chain]^Wret_val]^p_errno\Pn_clusters\next_cluster[Vn_w_to_read[Un_to_read[Pn_left[Pltemp[Pn_read[Ublock_to_read[Un_bytesZSbyte_offset_in_blockXTpdriveWPpfile _]FATFSi_rtfs_po_lseekڙ_^Tfd_Woffset_^VorigincPret_valbUpdrivea#Ppfile ^]FATFSi_po_ulseek^TfdXoffset)Wpnew_offset^Vorigin^Pret_val/Updrive5Ppfile$^]FATFSi__po_ulseek;ZpfileYoffsetA[new_offset^Porigin^Xp_errno^end_of_chainPalloced_sizeUret_valnext_clusterWfirst_clusterPn_clustersVn_clusters_to_seekPltemp2Pltemp^Vlog2_bytespcluster^Ul_at_eofGTpdrivePfile_pointer$]FATFSi__po_lseekLMPpfilePoffset^PoriginPu_offsetnew_offset^Pu_originPret_val^]FATFSi_rtfs_po_close^Tfd"^Tdriveno!^Pret_valnS]FATFSi_pc_fd2file4n^Vfdn^UflagsqYUpdrivep_Tpfile,^]FATFSi_pc_allocfile^UieTpfile,|]FATFSi_pc_freefileܞkUpfileqTpobj|^]FATFSi_pc_enum_filewZpdrive^Ychore^Xdirty_count^Wi}VpobjUpfile]FATFSi_pc_free_all_fil̟Ppdrive^]FATFSi_pc_flush_all_filPpdrive^]FATFSi_pc_test_all_fil[Ppdrivet/^]FATFSi__synch_file_ptrs/Tpfile1Pclnot<S^]FATFSi_pc_flush_file_buffer:SUpfileZVsave_drive_filioUTpfile_buffer<|z^]FATFSi_pc_load_file_bufferءzVpfilezUnew_blocknoUsave_drive_filio|Tpfile_buffer|^]FATFSi_pc_sync_file_bufferPpfilePstart_blockPnblocks^PdoflushPpfile_bufferd rtdevio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0B0B0B0B0B0B0B0B0B0B0BT^]FATFSi_check_drive_name_mount'Pname^drivenoT7^]FATFSi_check_drive_number_mount;7^TdrivenoQ]FATFSi_release_drive_mountQ^TdrivenoS-Ppdr`\^]FATFSi_release_drive_mount_write\^Tdriveno^3Ppdr`0^]FATFSi_check_drive_number_present}^Udriveno9Tpdr^Pmedia_status0t^]FATFSi_check_media_entry٥^Pdriveno?Ppdrt^]FATFSi_check_media_io.EPpdr^PrawD^]FATFSi_check_media KWpdr^Vok_to_automount^Uraw_access_requested^Tcall_crit_err^Xcrit_err_media_status^Pmedia_statusD|^]FATFSi_card_failed_handlerhQTpdr^Pret_val|L^]FATFSi_devio_read^ZdrivenoYblocknoWXbufWn_to_read^(raw]VpdrL^]FATFSi_devio_write_format^ZdrivenoYblocknocXbufWn_to_write^(rawiVpdr^]FATFSi_devio_writek^ZdrivenoYblocknooXbufWn_to_write^(rawuVpdrd>^]devio_fill >^Tdriveno>Zblockno>{Ybuf>Xn_to_write>^Wraw@Updrh<, rtvfat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\AǪ lfninode lfnorder lfname1 lfnattribute lfnres lfncksum lfname2 lfncluster lfname3ǪLFNINODE    gMvN dosinode ˬfname ܬfext fattribute resarea fclusterhi ftime fdate fcluster fsizeDOSINODE RgMAA 0B RgMǪ0B|QǪgMǪ0B|QǪgM^Ǫ0B|QǪgM|Q|Q|QAAAvNAAǪ RgMAhG^]FATFSi_pc_findinGZpobjG[filenameG^YactionUPpTWlastsegorderS|QsRPlfn_nodeQʫsfnP۫PlfnOVscratchN^PdowildcardM^PmatchfoundLPpfiKUpiJPpdITrbufdp)^]FATFSi_pc_insert_inodeG) Zpobj)Ypmom)Uattr)Tinitcluster)filename5^ n_segs4^[end_of_dir3Tcksum2vffileext2-vffilename1O@crdate0>pdrive/Xcluster.^Wi-DVpi,JPpd+PUpbuffpV]FATFSi_pc_nibbleparse²\UfilenamebTpathhPtnPp,]FATFSi_pc_cksum"tPtest^i\sum,P]FATFSi_pcdel2lfitzPlfi^PnsegsP ^]FATFSi_pc_deleteseglist3 Vpdrive Us^Pntodo_2^Wntodo_1^Pntodo_0PlfiWrbuf0a]FATFSi_text2lfiaWlfnaVlfia^Unsegsa[ncksumaTordereZpfid^Yend_of_lfnc^Xn0^]FATFSi_pc_seglist2diskYpdriveXsWlfn­Ppsegtext^Pntodo_2^Tntodo_1^Pntodo_0ȭPlfiέTrbufhԭ]FATFSi_lfi2textڭWlfnVcurrent_lfn_lengthUlfi^TnsegsYpfi^Xn !]FATFSi_pc_seglist2text!Wpdrive!Vs!Ulfn'^current_lfn_length&^Pntodo_2&^Xntodo_1&^Pntodo_0% Yp$Plfi#Xrbuf <h]FATFSi_pc_zeroseglistʷhPs<q]FATFSi_pc_addtoseglist:q"PsqPmy_blockq^Pmy_index]FATFSi_pc_reduceseglist}(PsD^]FATFSi_pc_parsepath.Ztopath4Yfilename:Xpath@TpfilespaceFPptoLVpR[pcolonXUpslash^Ppfile^keep_slash^Ti4^]FATFSi_pc_patcmp_vfat~4dYin_pat4jXname4^Wdowildcard8^Vres7pstar6Ppn26Ppp26Ppn6Ppp6PpatD{^]FATFSi_pc_patcmp_vfat_8_3{Wpat{Vname{^Udowildcard~^Pret_val^]FATFSi_pc_maliasZfnameYfextXinput_fileWdestîascii_aliasԮalias^ValiasuniquePpobj^Utry,^]FATFSi_pc_allspaceCPp^Pi,X^]FATFSi__illegal_lfn_charTchX^]FATFSi_pc_isdotǼPfname^]FATFSi_pc_isdotdot Pfname^]FATFSi_pc_delete_lfn_infoQPpobj]FATFSi_pc_zero_lfn_infoPpdirP^]FATFSi_pc_get_lfn_filename PpobjPpathP]FATFSi_scan_for_bad_lfnsTpmom^Zdelete_bad_lfn"Ybad_lfn_count!Xlastsegorder |QsWlfn_node!Ppi'Ppd-Vrbuf3UpobjIT apifilmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0BAA^]FATFSi_rtfs_pc_unlinkXname^Wp_errno^VdrivenofileextPfilenamePpathƿPpdrive^Zret_val̿Uparent_objҿTpobjt rtdrobj.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\A0BAAAgM0BAAAAAAAAvN R0BAAA RAAA0BgMAA0BAvNO@vNA0BvNA RAA0BvN0BvN0BvNAAvNvN0BA0BvNvNAvNAAA@]FATFSi_pc_get_cwd@TpdriveCPpobjBUpcwdt]FATFSi_pc_fndnodetZpath~Yscratch|fileext{PfilenamezPpdrivey^drivenoxXpchildwWpmomvVpobj]FATFSi_pc_get_inodeiWpobjPpmomVfilenameUfileext^action^TstartingLP]FATFSi_pc_get_mom!PTpdotdotYPclnoXPpfiV PpdTPsectornoSWpdriveRVpmomL]FATFSi_pc_mkchild%Upmom+Ppd1Ppobj7]FATFSi_pc_mknode'=YpmomC[filenameI fileextXattributesWinclusterOnull_str`dot_strattrqUpdrivewVpbuffO@crdatePcltempTclustervN lfinode}Ppdinodes^Zret_valZpobj^]FATFSi_pc_rmnodeUpobjTpdrivePcluster^]FATFSi_pc_update_inode-Vpobj^Wset_archive^Uset_dateO@crdate^Ti(]FATFSi_pc_init_inodeUpdirPfilenameWfileextVattrclustersizeTcrdate(D]FATFSi_pc_ino2dosDDUpbuffDTpdir8u]FATFSi_pc_get_rootuVpdriveyPpfixUpobjwPpd8]FATFSi_pc_firstblockTpobjPclno^]FATFSi_pc_next_blockhTpobjPnxt]FATFSi_pc_l_next_blockTpdriveUcurblockPclusterL5]FATFSi_pc_markiY5Tpfi5Wpdrive5Vsectorno5^UindexL\]FATFSi_pc_scani\Wpdrive\Vsectorno\^Uindex^Tpfi ~ ]FATFSi_pc_allocobjTpobj 0]FATFSi_pc_allociSPp0]FATFSi_pc_free_all_drobj%Vpdrive+Upobj^Ti0]FATFSi_pc_free_all_i1Tpdrive7Wpfi0]FATFSi_pc_freeiS=Tpfi ]FATFSi_pc_freeobj CTpobjl7]FATFSi_pc_dos2inode7IUpdir7OTpbuffll^]FATFSi_pc_isavol(lUPpobj^]FATFSi_pc_isadirg[Ppobj^]FATFSi_pc_isrootaPpobj apifrmat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^^iHdev_geometry ^dev_geometry_heads dev_geometry_cylinders ^dev_geometry_secptrack dev_geometry_lbas ^fmt_parms_valid EfmtiDEV_GEOMETRY4fmtparms oemname secpalloc secreserved numfats secpfat numhide numroot mediadesc secptrk numhead numcyl "physical_drive_no $binary_volume_label (text_volume_labelEFMTPARMS   0Bi0Bi0B^^^]FATFSi_pc_calculate_chsPtotalKXcylindersQWheadsWVsecptrackUsTh\cTp^]FATFSi_rtfs_pc_get_media_parmsWp]UpathpcTpgeometrytPpdrr^PdrivenoT^]FATFSi_rtfs_pc_format_mediaTpathVpgeometryPpdr^Pdriveno^]FATFSi_rtfs_pc_format_volumeSUpathTpgeometry^Zpartition_status^nibs_per_entryXsecpfat^ secpalloc^root_entriesYn_cylsXpartition_size^WdrivenoEfmt^Vraw_mode_ioUpdrx]FATFSi_pc_fat_size_PnreservedPcluster_sizeUn_fat_copiesProot_sectorsvolume_sizeTnibs_per_entryPentries_per_blockPtotal_clustersx]FATFSi_get_format_parameters-PnblocksPpsectors_per_alloc Ppnum_root_entries^Snum_root_entries^Psectors_per_alloc4~ csstrtab.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\_`pFATFSi_string_tablertfs_string_table ^string_id Zstring_valueRTFS_STRING_TABLEHq]FATFSi_rtfs_strtab_stringwPptable^Pstring_id4}]FATFSi_rtfs_strtab_user_string7^Pstring_id4 rtfat16.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0BUEgM4h^]FATFSi_pc_init_drv_fat_info16TpdrPpbl01Pdiv31Umax_index3*Pmax_indexhY^]FATFSi_pc_mkfs16Y^drivenoYZpfmtY^Yuse_rawPltotnibblese^ret_valdVblocknocUjcPib^PfausizeaPldata_area`Plnclusters]Ultotsecs\[buf[TbP rtfat32.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0BU0BA0BA0BA0BAEgM0BvN0BvNU0BgM0B0B^]FATFSi_pc_init_drv_fat_infoUpdrTpbl09Pmax_index U]FATFSi_pc_get_parent_clusterUPpdriveUPpobj hb]FATFSi_pc_alloc_dirbUpdrivebTpmomdPclusterdPclbasehn]FATFSi_pc_grow_dirnUpdrivenTpobjpPclusterpPtmpcl\]FATFSi_pc_truncate_dirUpdrivePpobjTclusterPtmpcl\8 ^]FATFSi_pc_mkfs32^ZdrivenoYpfmt^Xuse_raw^[ret_valUblocknoPkUjViPldata_areaPlnclustersVltotsecsbufTb8 T {]FATFSi_pc_finode_cluster#{Ppdr{PfinodeT l ]FATFSi_pc_pfinode_clusterPpdrPfinodePvaluel 4 ^]FATFSi_pc_gblk0_32VdrivenoUpbl0Tb4 \ ^]FATFSi_pc_validate_partition_typeLPp_type\  ^]FATFSi_fat_flushinfoUpdr PbufPpf ^]FATFSi_fatxx_pfpdword1PpdrUindexTpvalue#PppageP^]FATFSi_fatxx_pfgdword)PpdrUindex/Tvalue5PppageP! apigfrst.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\Hdstat fname fext lfname filename fattribute ftime fdate $fsize (^driveno ,^drive_opencounter 0pname 0pext 4path @pobj DpmomUDSTAT     U0BP]FATFSi_rtfs_pc_gdone Tstatobj&Ppdrive HA csunicod.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\R,FATFSi_print_buffergMgM   8"]FATFSi_pc_unicode_byte2upper"cPto"iPfrom$Rc8x5^]FATFSi_unicode_ascii_index5oRp5Tbase8^Pindex7ucxH^]FATFSi_unicode_comparemHPp1HPp2]^]FATFSi_unicode_compare_nc]Rp1]Tp2`cp2_cp1 8 u^]FATFSi_unicode_cmp_to_ascii_charFuPpuPc|]FATFSi_unicode_assign_ascii_char|Pp|PcDt]FATFSi_map_ascii_to_unicodePunicode_toPascii_fromPp4]FATFSi_map_unicode_to_asciivPtoPfrom4h]FATFSi_pc_ascii_strn2upperPtoPfrom^PnSc^\ih]FATFSi_pc_ascii_str2upperiPtoPfromRc<^]FATFSi_rtfs_cs_strcmpUs1Ts2Pw2Pw1<^]FATFSi_rtfs_cs_strcpyMPtargPsrc^Sloop_count^]FATFSi_rtfs_cs_strlenPstring^Rlen^]FATFSi_validate_filenameV Yname&ascii_buffer7uni_bufferHXpuNWpa^VlenX ^]FATFSi_pc_cs_malias@ TYalias ZXinput_file ^Wtry&^Vret_val%`Pascii_alias$fPascii_input_file#lUscratch1"rTscratchXl]FATFSi_lfn_chr_to_unicodexPto~Pfrl]FATFSi_unicode_chr_to_lfnPtoPfr]FATFSi_pc_cs_mfilemTtoPfilenamePexttemp_tox^]FATFSi_pc_ascii_fileparseVfilenameUfileextTp^PiD]FATFSi_pc_ascii_mfilePtoPfilenamePext^retval^\iPpx-^]FATFSi_pc_ascii_malias_-Zalias-Yinput_file-^Xtry0fileext0 filename/^Ps/^Ui/^Pn^]FATFSi_pc_valid_ascii_sfnYfilename^Xbadchar^Wext_start^Vperiod_count^UlenH#]FATFSi_unicode_make_printableo)PpPc^PiH)f rtfatxx.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\4FATFSi_fatxx_d(fat_driver xfatop_alloc_chain fatop_clnext fatop_clrelease_dir fatop_faxx Yfatop_flushfat tfatop_freechain fatop_cl_truncate_dir fatop_get_chain sfatop_pfaxxterm $fatop_pfaxx4FAT_DRIVER~pdrpstart_clustern_clustersdolink^0Bpdrclno0B^pdrclno0B$^pdrMclnopvalueS0B_^driveno^z^pdrclustermin_to_freemax_to_free0Bpdrclusterl_cluster0Bpdrastart_clusterpnext_clustergn_clustersend_of_chainm0B^y^pdrclno0B^pdrclnovalue0B0B0B^0B0B0B0B0B0B0B0Balign1 Kwrdbuf \fill0B0Balign2 wrdbuf2 fill0B^0B0B0B0B0B0B0B0B0BHH]FATFSi_fatxx_alloc_chain{HZpdrHYpstart_clusterHXn_clustersH^[dolinkP^is_errorOPlast_clusterNvalueMWn_contigLVclnoKUfirst_new_clusterJTstart_cluster@]FATFSi_fatxx_find_free_cluster-XpdrWstartptVendptUis_errorvaluePi@4]FATFSi_fatxx_clallocTpdrVclhint^is_errorUclno4 9]FATFSi_fatxx_clgrowI9Wpdr9Vclno=Urange_check<Pnextcluster;Pnxt xr^]FATFSi_fatxx_clrelease_dirrVpdrrUclnot^Pcurrent_errnox^]FATFSi_fatxx_flushfat^PdrivenoPpdr^]FATFSi_fatxx_freechainZpdrYclusterXmin_clusters_to_freeWmax_clusters_to_freeVclusters_freedUnextcluster]FATFSi_fatxx_cl_truncate_dirYpdrXclusterWl_cluster^Vcurrent_errnoUrange_checkPnextcluster?^]FATFSi_fatxx_pfaxxterm? Ppdr?Pclno"W^]FATFSi_fatxx_pfaxxWWpdrWVclnoWUvalue]Pt]Voffset]Tindex\u"#]FATFSi_fatxx_clnext'mTpdrPclnonxt#0%"^]FATFSi_fatxx_faxx"sUpdr"Pclno"yTpvalue-u2)u$result$Woffset$Vindex0%%]FATFSi_fatxx_get_chainZpdrYstart_clusterXpnext_clusterWn_clustersVend_of_chainPvalueUn_contigPnext_clusterPclno%%]FATFSi_fatxx_pfswapPpdrPindex^Pfor_writePblock_offset_in_fat%H&^]FATFSi_fatxx_fword0PpdrVindexUpvalue^TputtingPoffsetPppageH&& ^]FATFSi_init_fatm Ppdr&H'^]FATFSi_faxx_check_free_space Wpdr VfreecountnxtUiH'|'-^]FATFSi_init_fat321-Tpdr|''4^]FATFSi_init_fat16p4Tpdr'';^]FATFSi_init_fat12;Tpdr'(J^]fat32_check_freespace[J$UpdreltempOTfreecountN*RpdwM^QiLXpage_base()s^]fat16_check_freespaces0UpdrltempxTfreecountw6Rpwv^QiuXpage_base)*p apiinfo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\A)))^]FATFSi_rtfs_pc_set_default_drive) )Tdrive+^Pdrive_no)t*^]FATFSi_rtfs_pc_get_attributes WpathTp_return^Vdriveno^Uret_valPpobjt**!^]FATFSi_pc_getdfltdrvno '*P, apiinit.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ ؿFATFSi_current_pdr^ܿFATFSi_enabled_drivers0B0B0B*+^]FATFSi_rtfs_initZ  Vpdr^Uj+,^]FATFSi_auto_format_disk  Ppdr Tdrivenameigeometry,P,]FATFSi_drno_to_string'  Tpname^PdrnoP,- portkern.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\O@O@P,\,h]FATFSi_rtfs_port_alloc_mutex \,h,]FATFSi_rtfs_port_claim_mutex\ Phandleh,t,]FATFSi_rtfs_port_release_mutex Phandlet,,]FATFSi_rtfs_port_get_taskid ,,]FATFSi_rtfs_port_puts,T- ]FATFSi_pc_getsysdate Tpd+dataPsecPminutePhourPdayPmonthPyearT--6]RtcBCD2HEXC6Pbcd:^w9Ri8\hex-apifastmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ alias_buffer ^alias_buffer_size ^alias_buffer_count nalias_buffer_dataALIAS_BUFFER-$0X apimkdir.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0BAAA-$0^]FATFSi_rtfs_pc_rmdirpZname^Yp_errnoXpdrive^Wdriveno%fileext6Pfilename<Ppath^Vret_valBUpchildHTpobjN[parent_obj$07apirealt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\0B0B@0Bfileseginfo block nblocks?FILESEGINFOfreelistinfo cluster nclustersFREELISTINFO$0x0(^]FATFSi_rtfs_pc_cluster_sizek(Tdrive,Ppdrive+^Uret_val*^Pdrivenox05^]FATFSi_rtfs_po_extend_file^Ufdn_bytes![new_bytesstart_cluster^Zmethod'Ypdr-Xpfileclusters_in_chainrange_checkWnew_file_sizeQnew_alloced_sizeValloced_size4iUlast_cluster_in_chain8first_clusterlargest_chainTn_clusters ltemp$n_allocedPclno^(ret_val57]FATFSi_pc_find_contig_clusters13pdrZstartpt9pchainYmin_clusters^XmethodWendptlargest_chain largest_sizeVFATFSi_chain_sizeUchain_start[best_sizeTbest_chainvaluePi[7Ft1prblock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\gM0BJgMgMKgM0BKgMgMgMgMKgM0BKgM0BgMKgMKgMKgMgMgM0BgMKgM0BKgMgMgMgM0BgMKgMgMgM0BJJH0BJJHHJ+J7HJJHJHJHJHJJJJJ7L7,^]FATFSi_block_devio_write,RpblkL773^]FATFSi_fat_devio_writeV3Ppdrive3Spblk3^Pfatnumber77U]FATFSi_pc_release_bufUTpblk78y]FATFSi_pc_discard_bufyUpblk{Tpbuffcntxt8  ]FATFSi_pc_read_blk|WpdriveVblocknoUpbuffcntxt Tpblk8 9]FATFSi_pc_scratch_blkTpblk 9p9 ]FATFSi_pc_free_scratch_blk" Tpblk#Ppbuffcntxtp9:()]FATFSi_pc_init_blk(/Wpdrive(Vblockno+5Upbuffcntxt*;Tpblk:$;c]FATFSi_pc_free_all_blk1cAYpdriveg^XdeletingfGWpblkeMVpbuffcntxt$;\;^]FATFSi_pc_write_blksSPpblk\;;]FATFSi_pc_add_blkYPpbuffcntxt_Ppinblk;;]FATFSi_pc_release_blk@ePpbuffcntxtkPpinblkq\pblk;h<w]FATFSi_pc_find_blk}PpdrivePblocknoSpblkRpbuffcntxth<=]FATFSi_pc_allocate_blk XpdriveWpbuffcntxt^loop_guard^Upopulated_but_uncommitedQpblkscanPpfoundblkTpuncommitedblkPpfreeblk=>1]FATFSi_pc_flush_chain_blkd!1Ypdrive1Xcluster5Wpblk4Vblockno3^Ui>D?T^]FATFSi_pc_initialize_block_poolR"TZpbuffcntxtT^YnblkbuffsUXpmem_block_poolU^Wblk_hashtble_sizeU(pblock_hash_tableYVpblkW^UiD?@w^]FATFSi_pc_flush_fat_blocks"wTpdrive|PbzRplastzWpblkyPpfatbuffcntxt@C]FATFSi_pc_map_fat_block#VpdriveUblocknoTusage_flagsPbQpblkscan PpblkPpfatbuffcntxt^Phash_indexC4D^]FATFSi_pc_initialize_fat_block_pool$Ppfatbuffcntxt^Pfat_buffer_sizePpfat_buffers^Pfat_hashtbl_size%pfat_hash_table1 pfat_primary_cache=pfat_primary_index4D E]FATFSi_pc_free_all_fat_blockse%CXpfatbuffcntxtIWpblk^Vi E@EO]FATFSi_pc_find_fat_blk%UPpfatbuffcntxtPblockno[Ppblk@EE]FATFSi_pc_commit_fat_blk?&aPpfatbuffcntxtgPpblkEF]FATFSi_pc_commit_fat_table&mUpfatbuffcntxtsPpblk^PiVbFF]FATFSi_pc_sort_committed_blocks'yPpfatbuffcntxtWpblk_source_scanVpsortUpsorted_listTpprev^pblkwF\NWrtkernfn.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\U(FATFSi_med_st^f0B0BvNAAAAvNvNgMvNF G^]FATFSi_rtfs_resource_init( G$H"f(]FATFSi_rtfs_get_system_userZ)%Vt$^Uj$^Ui$HHi]FATFSi_pc_free_all_users)i^Wdrivenok^UiHH^]FATFSi_rtfs_set_errno)^TerrorHI^]FATFSi_rtfs_get_errno)*I^]FATFSi_defaultRtfsCtrl/>^Pdriveno>^Vopcode>-UpargsAigc@-PpdrOT}drfile.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\FFATFSi_file_headsFFATFSi_file_cylindersFFATFSi_file_secptrackFFATFSi_file_capacityFFATFSi_file_adjusted_capacityF0FATFSi_fileDescListh^0BOPG^]FATFSi_fileRtfsIo1G^XdrivenoGPblockG0WbufferGVcountG^(readingJdmyI^ZiI^TresultPSp^]FATFSi_fileRtfsCtrlL2p^Udrivenop^Vopcodep0Tpargsudmyufile_sizesigcr0PpdrST/^]FATFSi_fileRtfsAttach2/^PfileDesc/^Pdriveno20Bpdr1^PresultT0Xvattach.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^xFATFSi_rtfs_first_attach3|FATFSi_rtfs_first_stat_flagh^0B0B0BTVB^]FATFSi_rtfs_attach}4B^WdrivenoB3VpdrB3Udev_nameD3Ttarget_pdrV0X^]FATFSi_rtfs_detach4^Zdriveno3Vtarget_pdr0Xj\rtfs_twl_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\gMgMU0BU0BAUvNAAAA0B@@0B@0B@0B0BAAAA0BAAAA0BgMAO@A0XhX4^]pc_fill_blk745Ppblk4^PblocknumhXXN^]block_devio_fill7N5RpblkN^QblocknumXXZ^]FATFSi_rtfs_pc_gfirst_ex85Xstatobj5Wscf5Yname^Vget_lfname5Ppdrive^Udriveno5fileext5Pfilename5PmompathXZ[^]FATFSi_rtfs_pc_gnext_ex95Vstatobj5Uscf^Tget_lfname5Ppdrive5Pnextobj[h\$]pc_upstat_ex:$5Xstatobj$5Wscf$^Vget_lfname'5Upi&5Tpobjh\0]R5]pc_get_inode_ex:R5WpobjR6PpmomR 6VfilenameR6UfileextR^actionR^get_lfnameT^Tstarting0]^^]FATFSi_rtfs_pc_cache_clusters;^Ufd6Zbuf[buf_sizestart6Vpdrive!6Upfile^Tret_val^D_^]rtfs_get_next_cluster_cache<'6PpfilePfile_pointer-6PclnoPnext_of_end_index^start_index\cluster_index36Ppdrive^SresultD_a?^]rtfsi_pc_cache_clusters>?96Zpfile?Yfile_pointer??6Xbuf?buf_size?E6Wstart_indexlPnew_indexLnow_indexLPindex_numK$next_clusterKfirst_clusterJPn_clusters_to_eofJPn_clustersJ[n_clusters_to_seekI^PindexH^PiG^(end_of_chainF^log2_bytespclusterEbytespclusterDK6Pfat16_bufCQ6Pfat32_bufBW6TpdriveA^ ret_valaa^]FATFSi_twfs_po_open?]6PnamePflagPmodec6Ppfile^TfdaLb^]FATFSi_twfs_pc_get_fatbits?i6Ppdrive^Pret_valLb8e^]FATFSi_rtfs_pc_mv_ex{Ao6Told_nameu6Znew_name^Yp_errno{6PpdrivePcluster^[ret_val6Xnew_parent_obj6Wnew_obj^new_driveno6fileext6Pfilename6Ppath6Vold_parent_obj6Uold_obj^ old_driveno8efF^]FATFSi_rtfs_pc_mkdir_exBF6YnameP^Xp_errnoO6WpdriveN^VdrivenoM^Uret_valL6fileextK6PfilenameJ6PpathI6Tparent_objH6Zpobjfi6]pc_mknode_exD6Ypmom6Xfilename6[fileext attributesWincluster7null_str7dot_str%7Updrive+7VpbuffO@crdatePcltempTclustervNlfinode17Ppdinodes^Zret_val77Zpobjij|^]FATFSi_twfs_pc_set_propertiesD|=7Tpath|Xattributes|C7Wst_mtime^Vdriveno^Uret_val~I7TpobjjDn rtfs_twl_vfat_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\AǪgMvN RgMjDnJ^]pc_findin_exPGJ{EZpobjJEfilenameJ^YactionJ^[get_lfnameXEPpWWlastsegorderV|QsUEPlfn_nodeTEsfnSEPlfnREVscratchQ^PdowildcardP^PmatchfoundOEPpfiNEUpiMEPpdLETrbuf>Dns$sdmc_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\N^first_selectNgHXFATFSi_func_SDCARD_OutNsH\FATFSi_func_SDCARD_InmHyH@enumSDMC_STAT_ERR_UNKNOWNSDMC_STAT_ERR_CCSDMC_STAT_ERR_ECC_FAILED SDMC_STAT_ERR_CRCSDMC_STAT_ERR_OTHER@enumSDMC_PORT_CARDSDMC_PORT_NANDD JSD_CID JSD_CSD JSD_OCR $JSD_SCR ,SD_RCA .,SDCARD_MMCFlag 0,SDCARD_SDHCFlag 2,SDCARD_SDFlag 4JSDCARD_ErrStatus 8SDCARD_Status <SD_CLK_CTRL_VALUE >SD_OPTION_VALUE @,OutFlag Bport_noGISDPortContext@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTJHJJJLLLL  Mbuf bufsize offset ^fill Mfunc Minfo operation IportLSDCARDMsgMM b_flags result residMSdmcResultInfoMMMM Val jNPSel L HDnnh]FATFSi_sdmcGetErrCodeOhIPporthrLPrehxLPdek~L\SDPortTargetContextn8o^]FATFSi_sdmcIsFatalErrOIPport^Pfatal_flagLQSDPortTargetContextHPdeJPre8oo^]FATFSi_sdmcIsAbortErr5PIPportLPSDPortTargetContextJPreoo-J]FATFSi_sdmcSetInsertCallbackP-LPcallbackooAJ]FATFSi_sdmcSetRemoveCallbackPALPcallbacko,pUJ]FATFSi_sdmcGoIdleiQUPportsULPfunc1ULPfunc2XLinit_msgWrMSdMsg,ptpx]sdmcPostSleepQ{Mrecv_datzrMSdMsgtppJ]FATFSi_sdmcWriteAesFifoRMPbufPbufsizePoffsetIPportM(infoNrecv_datrMSdMsgpTq=J]sdmcFillAesFifo?S= NPbuf=Pbufsize=Poffset=IPport=N(info@Nrecv_dat?rMSdMsgTqqgJ]FATFSi_sdmcWriteFifoTgNPbufgPbufsizegPoffsetgIPportg"N(infoj(Nrecv_datirMSdMsgq4rJ]sdmcFillFifoT.NPbufPbufsizePoffsetIPport4N(info:Nrecv_datrMSdMsg4rlsJ]FATFSi_sdmcSelectUVselect@NSDCARD_PSellss>J]FATFSi_sdmcSetLatencyEmulationU>PenableANrecv_dat@rMSdMsgwsPvUHsdmc_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\nVP}SdmcCache  Vport ^valid offset VbufWVSdmcCacheInfo@enumSDMC_PORT_CARDSDMC_PORT_NAND@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTMMX WbufXbufsizeoffsetrMss^]sdmcInitCacheYssm]sdmcInvalidateCacheQYmVPportst^]sdmcIsHitCacheYWPbuf\bufsizePoffsetVPportPcache_offset_endtt W]sdmcCacheReadAesFifoZXPbufPbufsizePoffsetVPportX(infoXrecv_datrMSdMsgthu W]sdmcCacheReadFifoi[XPbufPbufsizePoffsetVPportX(infoXrecv_datrMSdMsghuPv> W]SDCARDi_CacheAccess \>XXAccessFunc>Wlimit>XVSdMsgAXToriginal_buf@ WPapi_resultPvjsdmc_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\$ `SD_port_en_numbers$ \ ~SD_INFO1_VALUE$ FATFSi_sdmc_dma_no$ ` ~SD_INFO2_MASK_VALUE$ d ~SD_INFO_ERROR_VALUE$ h ~SD_INFO1_MASK_VALUE$ l ~SD_INFO2_VALUE$ FATFSi_sdmc_dma2_no$ ^dFATFSi_thread_flag$ ^hSDCARD_UseAesFlag$ lFATFSi_ulSDCARD_Size$ ^psdmc_abort_request$ btFATFSi_sdmc_dtq_array$ bxsdmc_slpq_array$ ^|FATFSi_sdmc_tsk_created$ p ~FATFSi_ulSDCARD_SectorCount$ bt ~FATFSi_pSDCARD_BufferAddr$ bFATFSi_sdmc_result_dtq_array$ cSDNandContext$ sdmc_srand$ x ~FATFSi_ulSDCARD_RestSectorCount$ | ~SDCARD_SectorSize$ timeout_ms$ ^SDCARD_EndFlag$ dSDPortCurrentContext$ sdmcRandEnable$ dSDCurrentAccess$ dFATFSi_aesCounterDefault$ PeFATFSi_sdmc_intrq_array$ ^sdmc_slpq$ ^FATFSi_sdmc_intrq$ ^FATFSi_sdmc_dtq$ ^$FATFSi_sdmc_result_dtq$ 6DFATFSi_sdmc_alm$ fpFATFSi_sdmc_current_spec$ fSD_SDSTATUS$ JSDPort1Context$ J(SDPort0Context$ 1lFATFSi_sdmc_intr_tsk$ 1FATFSi_sdmc_tsk$ gFATFSi_sd_intr_stack$ gFATFSi_sd_stackbb cJ@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTJ  operation offset lendSDAccessAESCounter .ebytes ?ewordsdAESCounterae4 csd_ver2_flag memory_capacity protected_capacity card_capacity adjusted_memory_capacity heads secptrack cylinders SC BU RDE SS $RSC (FATBITS *SF ,SSA 0NOMgeSdmcSpec@ 6 6JJ@enumSDMC_USE_DMA_4SDMC_USE_DMA_5SDMC_USE_DMA_6SDMC_USE_DMA_7SDMC_NOUSE_DMA@enumSDMC_PORT_CARDSDMC_PORT_NANDJrMFhcbufrhbufsizeoffsetrMPvv]FATFSi_sdmcInitAesCounterh#gmd4gbufferv,w4]FATFSi_sdmcSetAesCounterAi4Tsector6dcounter,wxwK]FATFSi_sdmcStartAesiKUsectorKTcountxww]sdmcInitContextiEgTsd_contextwxc]sdmcCheckPortContext8jKgUbuf_adrcTresultxx>]i_sdmcEnablewj@^Plast_irqxyA^]OS_DisableIrqjAPprepy8{c]FATFSi_sdmcInit9kQgPdma_noQgPdma2_no^Plast_irqcPapi_result8{{c]FATFSi_sdmcResetkPirq_core_flag{\} c]i_sdmcInitk Tports\}"c]SDCARD_LayerInitl%^Tretry$cPresult1]FATFSi_i_sdmcCalcSizel4Vmult_val4Uread_block_len_val3TulCSize|c]SDCARDi_ReadAesFifo#mg[bufTbufsize offsetYposcXresult|pc]SDCARDi_ReadFifompgVbufpUbufsizepToffsetrcPresultc]SDCARDi_ReadngPbufPbufsizePoffsetcPresultc]SDCARDi_ReadCorengWbufVbufsizeUoffset^Tlast_irq$]SDCARD_TimerStartnUtim'^Plast_irq$T=]SDCARD_TimerStop4oE^Plast_irqTX]FATFSi_i_sdmcErrProcessocUErrBackupTStatusBackupusRSP0X$[^]sdmcIsProtected!p[gPport_hRSDTargetContext]Tcsd_wp$Dc]SDCARDi_WriteAesFifophUbufTbufsize offsetYposcXresultDc]SDCARDi_WriteFifo5q"hVbufUbufsizeToffsetcPresultDdc]SDCARDi_Writeqd(hPbufdPbufsizedPoffsetfcPresultDc]SDCARDi_WriteCoreAr.hTbufWbufsizeUoffset^Tk^Tlast_irq$ ]SDCARD_Threadr cPapi_result 4hcurrent_dat :hTSdMsg$ c]SDCARDi_Access$t @hAccessFunc limit xhZSdMsg cPerr_status Prrms ^Xs_retry ^Wretry Vpos Plen Uoffset ~h[ptr last_r1status Rr1status c last_result cTresult J} sdmc_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sd_last_info1IuSDCARDi_Transfer^SDCARD_EndByDmaFlag^iOuJ}HJ}]SDCARDi_CpuRecvFastvUusrcp[uQdestpRsizeHJ}J}]SDCARDi_CpuSendFastpvauPsrcpguQdestpRsize؜]SD_OrFPGAvmuUregTvalue^Pb_irq؜>^]OS_DisableIrq w>Pprep$]SD_AndFPGAkwsuUregTvalue^Pb_irq$P]SD_SetFPGAwyuUregTvalue^Pb_irqP]SD_GetFPGA*xuUdestuTreg^Pb_irq]SD_ClrFPGAxuUregTvaluePread_value^Pb_irq]SDCARD_SetAbortx^Pb_irq]SDCARD_ResetAbort#y^Pb_irq*]SDCARD_irq_HandlerPy P]NDMA_irq_Handler{y ȟj]SDCARD_Timer_irqyjuTargPtimeout_specnow_restȟ]SDCARD_Abortzt]SDCARD_TerminateForce`z^Tstop_com_flagt]SDCARD_ReadyToEndzP ]SDCARDi_CpuReadFifoAesz^Uk^iP]SDCARDi_DmaReadFifoAes6{!^Wk ^i/]SDCARDi_CpuWriteFifoAes{2^Uk1^i|E]SDCARDi_DmaWriteFifoAes{H^TkG^i|[]SDCARDi_CpuReadFifo|Tc]SDCARDi_CpuReadBuf=|T̤n]SDCARDi_CpuWriteFifol|̤Dw]SDCARDi_CpuFillFifo|D̥]SDCARDi_CpuWriteBuf|̥8]SDCARDi_CpuReadBufSingle|8]SDCARDi_FPGA_irq&}]SYSFPGA_irqa}Tinfo1t ]SDCARD_Intr_Thread}_^Pb_irqutmpXsd_current_info1Xsd_info1 >^]OS_EnableIrq'~>Pprep ^]SDCARDi_RemoveProc~Tinfo1^Pforce_flag ^]SDCARDi_InsertProc~Tinfo1^Pforce_flag  esdif.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\,SDCARD_V2FlagSD_port_number@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECT |K]SD_InitIPyK^TbWriteReg|c]SD_EnableInfo]SD_Command߁WucCommand ]SD_AppCommand l]SD_SetPullUpE^Pconnectl|]SD_AppOpCondl|PM]SD_SendOpCondPp]SD_SendIfCond]SD_SendRelativeAddr]SD_SelectCard\]SD_DeSelectCard<\]SD_SetIpBlockLengthQulBlockLength(]SD_SetBlockLengthуulBlockLength(d,]SD_SendCID,^Tall_send_ciddS]SD_SendCSD7IJu]SD_SendStatus_IJ<]SD_SendSCR<]SD_SDStatus0]SD_MultiReadBlockulOffset0p]SD_ClockDivSetLPusTranSpeedPusTranTimepB]SD_EnableAutoClockyP]SD_EnableClock^]SD_DisableClock̅,s]SD_SelectBitWidth s,Pb4bit,]MMCP_WriteBusWidthO^Pb4bit]SD_StopTransmission^ZiYErrBackupK]SD_TransEndFPGAІe]SD_CheckStatusFeUcheck_mask_hieTcheck_mask_loe^VbRead4]SD_SwapByte6PdataPusDATA4h]SD_EnableSeccntTFATFSi_ulSDCARD_SectorCounth]SD_SetErr?TErrorPirq_core_flag̺]SD_ClrErrTErrorPirq_core_flag̺P]SD_TransReadyFPGAP*]SD_TransCommand*WucCommandN^]SD_CheckFPGARegTNPregNPvalue]SD_MultiWriteBlockulOffsetLdrsdmc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\initialize_flag؊FATFSi_func_usr_sdmc_outsdmc_total_sectors^FATFSi_sdmc_drive_noފ@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECT0B0B$^]FATFSi_sdmcRtfsIo;^Pdriveno^blockPbufferPcount^readingMSdResultPresult$^]FATFSi_sdmcRtfsCtrl^Xdriveno^VopcodeWpargsUresultigceTpdrlw]i_sdmcIdleCard@wkTinitialize_flagyPresultl]FATFSi_i_sdmcRemovedIntrs]i_sdmcRemovedIntrCoreqPpdrL^]FATFSi_sdmcRtfsAttach%^Tdriveno0Bpdr^PresultjLdrnand.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\[^FATFSi_nand_drive_no[NAND_FAT_PARTITION_COUNT[NAND_RAW_SECTORS[NAND_FAT1_SECTORS[NAND_FAT2_SECTORS[NAND_FAT3_SECTORS[NAND_FAT0_SECTORS[^FATFSi_nand_calculated_fat_params[!NandFatSpec8 device_capacity adjusted_device_capacity memory_capacity adjusted_memory_capacity volume_cylinders heads secptrack cylinders SC BU RDE padding SS $RSC (FATBITS *SF ,SSA 0NOM 4begin_sect2FATSpec0BL^]FATFSi_nandRtfsCtrl^driveno^UopcodepargsigcTpdr\(sdmc_flags.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\msdmc_nand_flagmsdmc_nand_flag_bakmsdmc_spi_lockidmsdmc_nvram_adrm^sdmc_log_initialized8x^]i_sdmcGetNvramAdr:xToffset8^]sdmcInitNandLogd^]sdmcGetNandLogFatal(]sdmcSetNandLogFatal(?^]i_sdmcCheckReadyNvramF?Vwait_msC^UresultBiAstatusReg0l^]sdmcFlushNandLogq0^]i_sdmcGetNvramTparam ]i_sdmcSetParitySparityRi \^]i_sdmcCheckParityQSparityRi)\"Idrnand_aes.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\^FATFSi_nandaes_drive_no\?^]FATFSi_nandAesRtfsIo?^Pdriveno?^block?$Pbuffer?Pcount?^readingBMSdResultAPresultd^]FATFSi_nandAesRtfsAttach~d^Udrivenod^Tpartition_nog0Bpdrf^Presult@jfatfs_resource.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\IFATFSiHandleManager2Z2FATFSHandleManager file_table `directory_table 2^filesInUse 2^directoriesInUseZFATFSHandleManager`  FATFSFile id drive busy ^fd mode FATFSFileOSMountPermissionOS_MOUNT_USR_XOS_MOUNT_USR_WOS_MOUNT_USR_R2PFATFSDirectory id drive busy valid shortonly Ustatus LscfFATFSDirectory Z Z  Z  ZZZZ9]FATFSi_InitHandleManagerPUbaseH^base@ɜbuffer?Uunique=^Ri;ڜTmanagerc]FATFSi_ConvertHandleToFilevcPhandleiPactualhPmanagere^retval}]FATFSi_AllocFile^Ui^managerPcpsrTretval]FATFSi_FreeFileDPfile Pmanager^]FATFSi_GetCurrentFileHandles{H]FATFSi_ConvertHandleToDirectory PhandlePactualPmanager\retvalH"]FATFSi_AllocDirectory^Vi(UmanagerPcpsr.Tretval0]FATFSi_FreeDirectory4Pdir:Pmanager0@^]FATFSi_GetCurrentDirectoryHandlesH@(fatfs_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\ L$table ^7FATFSiOnceAccessedSDCard ^table_max ^7FATFSiNowOnHeavyCommand ^7index ofs (FATFSiSpecialDrives 7FATFSiLetterToHandle 0FATFSiComanndFunctionTable Zdtable H8work  FATFSiUnicodePathBufferRTOSMountInfo udrive device target partitionIndex resource userPermission rsv_A rsv_B archiveName pathROSMountInfo@? FATFSiSpecialDriveInfo ^index fileFATFSiSpecialDriveInfo hAGTk ^rtfsErr fatfsErrR  @enumFATFS_OPTYPE_CREATIONFATFS_OPTYPE_DELETIONFATFS_OPTYPE_RENAMINGFATFS_OPTYPE_GETTERFATFS_OPTYPE_SETTERFATFS_OPTYPE_FILECTRLFATFS_OPTYPE_DIRCTRL@enumSDMC_STAT_ERR_UNKNOWNSDMC_STAT_ERR_CCSDMC_STAT_ERR_ECC_FAILED SDMC_STAT_ERR_CRCSDMC_STAT_ERR_OTHER@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECT%FATFSCommandHeader command result flags next%FATFSCommandHeader%RRA@%   b(FATFSCommandMountDrive %header media ^partition namebFATFSCommandMountDrive ! FATFSCommandUnmountDrive %header name!FATFSCommandUnmountDrive $FATFSCommandFormatDrive %header 6name formatMediaFATFSCommandFormatDrive j\FATFSCommandCheckDisk %header $name verbose $fix_problems (write_chains ,5infojFATFSCommandCheckDisk0FATFSDiskInfo n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters n_file_clusters n_hidden_clusters n_dir_clusters n_crossed_points $n_lost_chains (n_lost_clusters ,n_bad_lfns5FATFSDiskInfo0BŮ4FATFSDriveResource 6totalSize 6availableSize maxFileHandles currentFileHandles maxDirectoryHandles currentDirectoryHandles bytesPerSector $sectorsPerCluster (totalClusters ,availableClusters 0fatBitsŮFATFSDriveResource STFATFSCommandGetDriveResource %header ְname resourceSFATFSCommandGetDriveResource4Ů  FATFSCommandSetDefaultDrive %header nameFATFSCommandSetDefaultDrive0>0FATFSFileInfoW shortname longname padding length dos_atime $dos_mtime (dos_ctime ,attributesFATFSFileInfoW pFATFSCommandGetFileInfoW %header Lpath <]padding @infoFATFSCommandGetFileInfoW,pFATFSCommandSetFileInfoW %header  path <padding @infoFATFSCommandSetFileInfoW,FTFATFSCommandCreateFileW %header ^trunc permit $path PpaddingFFATFSCommandCreateFileW,*@FATFSCommandDeleteFileW %header path <padding*FATFSCommandDeleteFileW,ܵhFATFSCommandRenameFileW %header Tpath <enewpathܵFATFSCommandRenameFileW,,PFATFSCommandCreateDirectoryW %header permit /path L@paddingFATFSCommandCreateDirectoryW,c@FATFSCommandDeleteDirectoryW %header path <paddingcFATFSCommandDeleteDirectoryW,hFATFSCommandRenameDirectoryW %header path <newpathFATFSCommandRenameDirectoryW,,0> TFATFSCommandOpenFileW %header handle mode $path PpaddingFATFSCommandOpenFileW, ѹFATFSCommandCloseFile %header handleѹFATFSCommandCloseFile@ PFATFSCommandReadFile %header handle Tbuffer ^lengthPFATFSCommandReadFile0>@ FATFSCommandWriteFile %header handle Tbuffer ^lengthFATFSCommandWriteFile FATFSCommandSetSeekCache %header handle Tbuf buf_sizeFATFSCommandSetSeekCache0> RFATFSCommandSeekFile %header handle ^offset originRFATFSCommandSeekFile FATFSCommandFlushFile %header handleFATFSCommandFlushFile0> oFATFSCommandGetFileLength %header handle lengthoFATFSCommandGetFileLength0B0> FATFSCommandSetFileLength %header handle lengthFATFSCommandSetFileLengthTFATFSCommandOpenDirectoryW %header handle Nmode $_path PppaddingFATFSCommandOpenDirectoryW,FATFSCommandCloseDirectory %header handleFATFSCommandCloseDirectoryDFATFSCommandReadDirectoryW %header handle infoFATFSCommandReadDirectoryWRFATFSCommandFlushAll %headerFATFSCommandFlushAllR FATFSCommandUnmountAll %header FATFSCommandUnmountAll"  RR,FATFSCommandMountSpecial %header 6param ^slot ;arcnameFATFSCommandMountSpecialX FATFSCommandSetNdmaParameters %header ndmaNo blockWord intervalTimer prescalerXFATFSCommandSetNdmaParametersR ;4FATFSCommandFormatSpecial %header path &padding ,6data;FATFSCommandFormatSpecialFATFSCommandSetLatencyEmulation %header enableFATFSCommandSetLatencyEmulation@R  @]FATFSi_UnpackAsciiToUnicodecХPdst֥Psrc^Plen^Pi^]FATFSi_IsShareArchiveNameܥUarcname]FATFSi_GetLauncherInfoTable Pw Pr^Yi(P]FATFSi_AbortHeavyCommand[RTbak(e]FATFSi_CheckHeavyCommandBegineUdriveeTlength]FATFSi_CheckHeavyCommandEndTdrive]FATFSi_EnumPublicArchivesZdstParcname^Xi^Wbootlen^VbootdriveFoundUbootpathTinfo^]FATFSi_IsMediaProtectedETdrivepath^Pprotected^]FATFSi_IsValidDriveWdriveVpermitUresultPtargetPermit^Tretval(^]FATFSi_IsMediaFatal%Tdrive(:]FATFSi_GetValidFileHandle:Phandle;Vpermit<Uresult>#TfileX)]FATFSi_GetValidDirectoryHandle7XPhandleYVpermitZ/Uresult\5Tdir^]FATFSi_VerifyCommandResult$^VexprWdrive;UtypeTresult^Ri sd_statsd_error^VerrorPretval]FATFSi_ResolveIPLPath?ZdstYsrc[permit^TignorePermissionheader^PindexPinfo]^Pdstpos\^PsrcposS^Plen2R[src2Q^Uroot;^Pindex:Tinfo2%tmp^UnϩPbasePspecialPermissionթspecialTbootpath^ParcnameLenarcnamedrive@y^]FATFSi_CompareUnicodeStringzPsrczPpattern@+^]FATFSi_CopyLUnicodeString, Pdst,Psrc,^Plen.^Pi]FATFSi_NormalizePathXpath!WpdrivePpermit'Vheader^Pi-PdstTdrive6]FATFSi_RegisterDriveFile,6^Pdrive63PfileG]FATFSi_UnregisterDriveFilevG^Pdrive]FATFSi_CommandMountDrivek9Targ?Pfile^Pattach_result^Vletter^UpartitionEPnameKtmparcdrive\Ppacket]FATFSi_CommandUnmountDriveUarg^TletterPname tmparcdrivePpacket`]FATFSi_CommandFormatDriveTarg(i geometry#Pname"tmparc!Ppacket`R]FATFSi_CommandCheckDisk;RGTargVMPnameUStmparcTdPpacketp]FATFSi_CommandGetDriveResource)pUarg6PPbytesPerCluster~Ppdrive}Presourcev6Pnameu<tmparctdrivesMPpacketd]FATFSi_CommandSetDefaultDriveTargPnametmparcPpacketd4]FATFSi_CommandGetFileInfo]TargstatPinfoPpathdrivePpacket4 ]FATFSi_CommandSetFileInfoUnUarg^PmodifyMtimeO@st_mtimeSmask^PresultattributestTpathdrivezPpacket !]FATFSi_CommandCreateFile4!.Varg-^Tfd,Wpermit_flags+Uaccess_flags*4Qpermit%:Tpath$drive#@PpacketXV]FATFSi_CommandDeleteFileVUargZPpathYdriveX$PpacketXq]FATFSi_CommandRenameFilePqĵVargxʵPnewpathuеPpathtdrivesֵPpacket4]FATFSi_CommandCreateDirectoryvUarg|PpathdrivePpacket4]FATFSi_CommandDeleteDirectory`QUargWPpathdrive]Ppacket]FATFSi_CommandRenameDirectoryVarg PnewpathPpathdrivePpacket]FATFSi_CommandOpenFileøXarg"ɸstatWaccess_flagsڸVfileUpathdriveTmodePpacketF]FATFSi_CommandCloseFileAFUargIŹTfileH˹Ppacket`]FATFSi_CommandReadFileJ`2ZargzPlimitt^Pleno^readednWposm8Vsrcl^Palign4k^drivenoh>UpccDTfilebJPpacket]FATFSi_CommandWriteFile׺ZargPlimit^Plen^writtenPrestPcurrentݺstatWposVdst^Palign4^drivenoUpcTfilePpacket`]FATFSi_CommandSetSeekCacheUarg Pfile Ppacket ^Presult``%]FATFSi_CommandSeekFile%/Targ:Pcurrent7Pposition6Wlength05stat/Voffset(FUfile'LPpacket`]]FATFSi_CommandFlushFile[]ټUarg`߼Pfile_Ppacketu]FATFSi_CommandGetFileLengthuLUarg}RstatxcTfilewiPpacket]FATFSi_CommandSetFileLengthZargcurYorgPpposXdstWsrc stat VfilePpacketP]FATFSi_CommandOpenDirectoryVarg ^Topendir UdirTpathdrivePpacketP2 ]FATFSi_CommandCloseDirectory2 Targ5 Udir4 PpacketN ]FATFSi_CommandReadDirectory`N UargQ TdirP  Ppacket ^]FATFSi_CommandFlushAllCore ^Tdrive path ]FATFSi_CommandFlushAll Warg ^Pdrive ^Pdrive ^Pdrive ^Pdrive ^Pdrive_num ^Ui Ttable Ppacket( ]FATFSi_CommandUnmountAll ZargH ^Tdrive9 ^Wdrive* ^Wdrive ^Xdrive ^Pdrive_num ^Wi Vtable Ppacket( ] ]FATFSi_CommandMountSpecial] \Zarg barchivepath sPpath Wletter yVfile ^[usedLetter ^Pi 2offsetMap ^Pbit ^[pos ^Qi ^Pforbidden  drive ^Uslot special ^isShr ^PisPubs ^Wletterr Pinfoq Vspecial` Ttable_ Ppacket  H ]FATFSi_CommandSetNdmaParametersH LTargJ RPpacket  [ ]FATFSi_CommandFormatSpecial[ Zarg~ igeometry} ^Vsucceededg ^Uletterf Vinfoa Tname` $tmppath_ drive^ 5Ppacket   ]FATFSi_CommandSetLatencyEmulationW Targ Presult Ppacket   ]FATFSi_SDInsertCallback   ]FATFSi_SDRemoveCallback ` ^]FATFS_Init Vdma1 Udma2 Tpriority" lunipath! Phandle ^Plen }drive Zinfo Presult ^Yretval` ^]FATFSi_NTLowerString Xshort_dest Wlong_dest Vscf Ufname (fext Ttarget_fext Ptarget_fname Pdest Psrc myfext myfname ^Qi0Pfatfs_request.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\src\1`:FATFSiLastError1@d:FATFSiResultBufferList1 FATFSiCommandBuffer1:FATFSiRequest1:FATFSiCommandBufferDefaultF FATFSResultBuffer next thread command result reservedFFATFSResultBufferF1%,,FATFSRequestContext wait_q done_list buffer_mutex $buffer_normal (buffer_emergencyFATFSRequestContextx1%4%2%F%P%%hFATFSCommandInitialize %header  unicode2sjis_array sjis2unicode_array arclisthFATFSCommandInitialize]FATFSi_InitRequestK]FATFSi_SendToPXIPargd]FATFSi_AllocateCommandBufferTcommandPheaderdU]FATFSi_FreeCommandBuffer5U PbufferDx]FATFSi_NotifyRequestCompletionx&Uarg,Qqq8Rp^Qfound>PheaderzTbak_cpsrD]FATFSi_WaitForRequestuDXargJQppWbak_cpsr^VbusyVPtarget0]FATFSi_SyncInitialization\UarclistbParg^0*fatfs_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\JFATFSiThread  FATFSThreadContext task_list thread -stackFATFSThreadContext%1 %J%%%0:]FATFSi_AppendRequest:>Ttarget:^VisARM9=DQpp<Ubak_cpsrV]FATFSi_CommandThreadodPVheader^Xbak_cpsrYVUsync9_headerX^Tsync7]FATFSi_PostRequest\Parg]FATFSi_PXICallbackPdata]FATFSi_InitThread4PpriorityW@fatfs_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\src\,FATFSFileInfo shortname longname padding length dos_atime dos_mtime $dos_ctime (attributesFATFSFileInfob\l]FATFSi_CopyUnicodeStringlPdstlPsrcl^Plenn^Pi\^]FATFS_MountDriveWnameVmediaUpartition"Targ!^Pretval@]FATFS_OpenFileWVpathUmodePargUretval6 0 aes_lo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\yhkspCallbackylksCallbackParamyDMA_CONFIGarg AESNonce bytes wordsAESNonce   dAESMacLengthAES_MAC_LENGTH_4AES_MAC_LENGTH_6AES_MAC_LENGTH_8AES_MAC_LENGTH_10AES_MAC_LENGTH_12AES_MAC_LENGTH_14AES_MAC_LENGTH_16AES_MAC_LENGTH_MAXAESMac 4bytes EwordsAESMacAESKey bytes wordsVAESKeyIdVAESKeyVAESKeySeedVVAESKeySlotAES_KEY_SLOT_AAES_KEY_SLOT_BAES_KEY_SLOT_CAES_KEY_SLOT_DWdWAESModeAES_MODE_CCM_DECRYPTAES_MODE_CCM_ENCRYPTAES_MODE_CTRAES_MODE_CTR_ENCRYPTAES_MODE_CTR_DECRYPT0D]AES_Reset@D]AESi_InterruptHandlerp]AES_SetNoncePpNonce]AES_SetCounterPpCounter4]AES_SetMacNPlengthPpMacPreg4`#]AES_SetKeyC#PpKey`M]AES_SetKeySeedAMPpKey`]AES_LoadKey`PslotgPreg]AES_WaitKey8]AES_DmaSendPdmaNoKPsrcPsizeQPcallbackjarg0]AES_DmaRecvLPdmaNopPdstPsizevPcallback|arg0@]AES_SendPdata@P]AES_RecvPp^]AES_IsIFifoFullp,]AES_Runr,Pmode,PaBlockNum,PpBlockNum,Pcallback,arg?Preg f]AES_Wait  z^]AES_IsVerificationSuccess$ -0>aes_hi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\&pksFractionSize&tksMacSize& spSrc& sNextSlot&xksSrcSize& |kspDst&ksDstSize&ksFraction&dksCounter&dksRandCounter&4ksMutex&^ksThreadQ&1ksThread&"lsThreadQBuffer&9msThreadStack3?ThreadOpOP_PXI_SET_KEYOP_PXI_INIT_RANDOP_PXI_RANDOP_PXI_CTROP_PXI_CCM_ENCRYPTOP_PXI_CCM_DECRYPTOP_PXI_FOR_JPEGOP_PXI_CALC_MAC OP_CB_DMA_SEND_FINISHED OP_CB_AES_FINISHED OP_CB_AES_CTR_CONTINUE OP_CB_AES_CCM_ENC_FINISHEDOP_CB_AES_CCM_DEC_FINISHEDdAESResultAES_RESULT_NONEAES_RESULT_SUCCESSAES_RESULT_VERIFICATION_FAILEDAES_RESULT_INVALIDAES_RESULT_BUSYAES_RESULT_ON_DSAES_RESULT_UNKNOWNAES_RESULT_MAX$AESPxiData key src srcASize srcPSize macLength dstAESPxiDataAESPxiKey Vkey dcounter nonceRomAccessControl common_client_key hw_aes_slot_B hw_aes_slot_C sd_card_access nand_access game_card_on shared2_file hw_aes_slot_B_SignJPEGForLauncher game_card_nitro_mode hw_aes_slot_A_SSLClientCert hw_aes_slot_B_SignJPEGForUser photo_access_read photo_access_write common_client_key_for_debugger_sysmenuRomAccessControl$ ` ]SetupDefaultFraction JPpDataPdataSize^\i`  ]StepSubKey PPp   ]ExclusiveOrAesBlockj  VPa \Pb^\i  V]CallbackSendMessage VbParg !o]AesRun phPsrcqPsrcASizerPsrcPCSizesnTdstt aesModeut$finishMsg|VpBlockNum{WaBlockNumzXdmaRecvSizeyPdmaSendSizexPdstSizewPsrcSize!"]CtrRunS PpCounterVsrcPsrcSizeUdst""1^]IsValidAddress 1Pptr1Plength3Paddr"*S]AesThreadX6Tresult*^Wi)0mactmpVpCpuDst8PpCpuDst32UcpuRecvSizePdmaRecvSizedcounterPnextSrcSizePnextDstPnextSrc^UiGTsrcASizeFVfractionBegin>pxiDataPpMacSrcpxiDatamacpxiDatapxiDataTresultdst}seed|VkeyiVkeyZPopParamYtTopX packed**b]PxiCallbackbPdatab^Perr* ,]AES_InitUpriority^TbClearPprac ,,]AES_CorecR PsrcX Tdst^ Pdst32,,]AES_Randd TpDst,-]AES_Lock--#]AES_Unlock-.aaes_fifo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\common\src\^^AESPxiCommandAES_PXI_COMMAND_SET_KEYAES_PXI_COMMAND_INIT_RANDAES_PXI_COMMAND_RANDAES_PXI_COMMAND_CTRAES_PXI_COMMAND_CCM_ENCRYPTAES_PXI_COMMAND_CCM_DECRYPTAES_PXI_COMMAND_FINISHEDAES_PXI_COMMAND_RESULTAES_PXI_COMMAND_FOR_JPEGAES_PXI_COMMAND_CALC_MAC AES_PXI_COMMAND_MAX -\-H]AESi_PxiSendFirstYH^VtagHPcmdHPdata\-$.]AESi_ReceiveData}YpQXpBufferWsize^VoffsetbufferPp8$.p.]AESi_PxiHandlerJPpQPdatap..]AESi_PxiSendResultPcmdQresult..'aes_common.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\common\src\d..7]AES_AddToCounter7<PpCounter7PvalueF^Ri=Plsw@pwvr_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wvr\ARM7.TWL\src\ state aid pmacAdrs rssi capaInfo authSeed supRateSet rsv lastSeqCtrl frameCount lifeTime maxLifeTimeVWlStaElement@p]WVR_Shutdown&d5}p6}wmsp_system.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\WMSPWork ^toWLmsgQ toWLmsg (^fromWLmsgQ HfromWLmsg X^confirmQ xconfirm ^requestQ request (requestStack (indicateStack (4fifoExclusive @dmaNo DgarenaId H^heapHandle L0wm7buf PP5status TV5rssiHistory trssiIndex xindPrio_high |wlPrio_high reqPrio_high indPrio_low wlPrio_low reqPrio_low wmInitializedIWMSPWork6WMArm7Buf status 5reserved_a *fifo7to9 .5reserved_b .connectPInfo ?5requestBuf6WMarm7Buf6WMArm7BufWMStatus state BusyApiid ^apiBusy ^scan_continue ^mp_flag ^dcf_flag ^ks_flag ^dcf_sendFlag ^VSyncFlag Q(wlVersion (macVersion *rfVersion ,b(bbpVersion 0mp_parentSize 2mp_childSize 4mp_parentMaxSize 6mp_childMaxSize 8mp_sendSize :mp_recvSize <mp_maxSendSize >mp_maxRecvSize @mp_parentVCount Bmp_childVCount Dmp_parentInterval Fmp_childInterval H6mp_parentIntervalTick P6mp_childIntervalTick Xmp_minFreq Zmp_freq \mp_maxFreq ^mp_vsyncOrderedFlag `mp_vsyncFlag b,mp_count d,mp_limitCount fmp_resumeFlag hmp_prevPollBitmap jmp_prevWmHeader lmp_prevTxop nmp_prevDataLength pmp_recvBufSel rmp_recvBufSize ts(mp_recvBuf |*mp_sendBuf mp_sendBufSize mp_ackTime mp_waitAckFlag mp_readyBitmap mp_newFrameFlag *reserved_b mp_sentDataFlag mp_bufferEmptyFlag mp_isPolledFlag mp_minPollBmpMode mp_singlePacketMode *reserved_c mp_defaultRetryCount mp_ignoreFatalErrorMode mp_ignoreSizePrecheckMode mp_pingFlag mp_pingCounter *dcf_destAdr *dcf_sendData dcf_sendSize dcf_recvBufSel *dcf_recvBuf dcf_recvBufSize curr_tgid linkLevel minRssi rssiCounter beaconIndicateFlag wepKeyId pwrMgtMode miscFlags VSyncBitmap valarm_queuedFlag v_tsf v_tsf_bak v_remain valarm_counter Y,reserved_e j,MacAddress mode {,pparam (d.childMacAddress child_bitmap .pInfoBuf aid 2parentMacAddress scan_channel 2reserved_f wepMode ^wep_flag 3wepKey rate preamble tmptt retryLimit enableChannel allowedChannel 3portSeqNo A3sendQueueData 4sendQueueFreeList 4sendQueue 4readyQueue 4sendQueueMutex 4^sendQueueInUse 84mp_lastRecvTick 6mp_lifeTimeTick mp_current_minFreq mp_current_freq mp_current_maxFreq mp_current_minPollBmpMode mp_current_singlePacketMode mp_current_defaultRetryCount mp_current_ignoreFatalErrorMode  5reserved_gWMStatusWMstatus((6WMMpRecvBuf *rsv1 length *rsv2 ackTimeStamp timeStamp rate_rssi '*rsv3 8*rsv4 I*destAdrs Z*srcAdrs $k*rsv5 *seqCtrl ,txop .bitmap 0wmHeader 2|*data(WMmpRecvBuf(WMMpRecvBuf**0WMDcfRecvBuf frameID +rsv1 length +rsv2 rate_rssi ,rsv3 ,destAdrs &,srcAdrs $7,rsv4 ,H,data*WMDcfRecvBuf*WMdcfRecvBuf@WMParentParam *userGameInfo userGameInfoLength padding ggid tgid entryFlag maxEntry multiBootFlag KS_Flag CS_Flag beaconPeriod 1.rsv1 "B.rsv2 2channel 4parentMaxSize 6childMaxSize 8S.rsv{,WMpparam{,WMParentParamZu..WMBssDesc length rssi 0bssid ssidLength '0ssid ,capaInfo .80rateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @g0gameInfo.WMbssDesc.WMBssDesc  basic supportWMGameInfo magicNumber ver platform ggid tgid userGameInfoLength 1__anon gameNameCount_attribute attribute parentMaxSize childMaxSize +2__anon b2userGameInfo s2old_typeg0WMGameInfog0WMgameInfo gameNameCount_attribute attributep b2userGameInfo s2old_typep7p 2userName 2gameName 2padd1X+P'03k4  next port destBitmap restBitmap sentBitmap sendingBitmap padding size seqNo retryCount *data 4callback CargR3WMPortSendQueueData4C head tail4WMPortSendQueue446 4 workingMemAdrs Cstack stacksize priority 6sendMsgQueuep 6recvMsgQueuep dmaChannel dmaMaxSize heapType $6heapFunc ,CcamAdrs 0camSizeg5WlInit^ 6os 6ext gid ^heapHandle 7alloc /7free"757CWmInit dmaNo indPrio_low indPrio_high reqPrio_low reqPrio_high wlPrio_low wlPrio_highB7WmInitWMIndCallback apiid errcode state reason8WMindCallback8WMIndCallbackWMCallback apiid errcode wlCmdID wlResult8WMCallback WMMpRecvData length rate_rssi aid noResponse wmHeader 9cdata 9WMmpRecvData 9WMMpRecvDataWMMpRecvHeader bitmap errBitmap count length txCount :data9WMmpRecvHeader9WMMpRecvHeader 9 I<wlRsv <header <staMacAdrs retryLimit enableChannel rsv mode rate wepMode "wepKeyId $<wepKey tbeaconType vprobeRes xbeaconLostTh zactiveZoneTime |<ssidMask preambleType authAlgo:WlParamSetAllReq  code lengthZ<WlCmdHeaderP<   <header resultCode<WlParamSetCfmd5}p6}@]WMSP_GetAllowedChannel=@PbitFieldgUiETcenterDQminCPmaxBPtempwmsp_indicate.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\ >wlRsv <header >buff>WlCmdReq @ (?wlRsv <header f@ack>WlMaMpAckInd 0 {@rsv1 length txKeySts rsv3 timeStamp rate rssi @rsv4 @rsv5 @destAdrs @srcAdrs $@rsv6 *seqCtrl ,tmptt .bitmap9?WlRxMpAckFrame;wmsp_wl_control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\ <header resultCodeAWlMlmeResetCfm BwlRsv <header mibAWlMlmeResetReq  <header resultCode-BWlMlmePowerManagementCfm-BWlMlmePowerMgtCfm BCwlRsv <header pwrMgtMode wakeUp recieveDtimsBWlMlmePowerManagementReqBWlMlmePowerMgtReq N <header resultCode foundMap bssDescCount CbssDescListSCWlMlmeScanCfmDED length rssi Ebssid ssidLength Essid ,capaInfo .ErateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @E__anon @#FgameInfo @4FotherElementCWlBssDesc  basic support_element #FgameInfo 4FotherElementT BGwlRsv <header SGbssid ssidLength dGssid 8scanType :uGchannelList JmaxChannelTime LbssidMaskCount NGbssidMaskEFWlMlmeScanReq   <header resultCode statusCode HpeerMacAdrsGWlMlmeJoinCfmX HwlRsv <header timeOut rsv EbssDesc HWlMlmeJoinReq  <header resultCode statusCode YIpeerMacAdrs algorithmHWlMlmeAuthenticateCfmHWlMlmeAuthCfm JwlRsv <header JpeerMacAdrs algorithm timeOutjIWlMlmeAuthenticateReqjIWlMlmeAuthReq   <header resultCode JpeerMacAdrs/JWlMlmeDeAuthCfm/JWlMlmeDeAuthenticateCfm SKwlRsv <header dKpeerMacAdrs reasonCodeJWlMlmeDeAuthReqJWlMlmeDeAuthenticateReq   <header resultCode statusCode aiduKWlMlmeAssCfmuKWlMlmeAssociateCfm LwlRsv <header LpeerMacAdrs listenInterval timeOutKWlMlmeAssReqKWlMlmeAssociateReq   <header resultCode statusCode aidLWlMlmeReAssociateCfmLWlMlmeReAssCfm MwlRsv <header  NnewApMacAdrs listenInterval timeOutOMWlMlmeReAssociateReqOMWlMlmeReAssReq  <header resultCodeNWlMlmeDisAssociateCfmNWlMlmeDisAssCfm OwlRsv <header !OpeerMacAdrs reasonCodeNWlMlmeDisAssociateReqNWlMlmeDisAssReq  <header resultCode2OWlMlmeStartCfm@ PwlRsv <header ssidLength Pssid 2beaconPeriod 4dtimPeriod 6channel 8basicRateSet :supportRateSet <gameInfoLength >PgameInfozOWlMlmeStartReq  ( <header resultCode reserved aQccaBusyInfoPWlMlmeMeasChanCfmPWlMlmeMeasureChannelCfm ( GRwlRsv <header rsv ccaMode edThreshold measureTime XRchannelListrQWlMlmeMeasChanReqrQWlMlmeMeasureChannelReq  <header resultCode txStatusiRWlMaDataCfm0 frameId Srsv1 length status rsvm1 rsvm2 rate rssi rsvm3 Srsv4  TdestAdrs TsrcAdrs $-Trsv5 ,>TdatapRWlTxFrame@ TwlRsv <header SframeDTWlMaDataReq  <header resultCodeTWlMaKeyDataCfm sUwlRsv <header length wmHeader >TkeyDatapTWlMaKeyDataReq  <header resultCodeUWlMaMpCfm$ VwlRsv <header resume retryLimit txop pollBitmap tmptt currTsf dataLength wmHeader >TdatapUWlMaMpReq  <header resultCodeVWlMaClearDataCfmVWlMaClrDataCfm WwlRsv <header flag4WWlMaClearDataReq4WWlMaClrDataReq  0XwlRsv <header AXstaMacAdrsWWlParamSetMacAdrsReqWWlParamSetMacAddressReq  XwlRsv <header retryLimitRXWlParamSetRetryLimitReq  1YwlRsv <header enableChannelXWlParamSetEnableChannelReq  YwlRsv <header modeBYWlParamSetModeReq  ZwlRsv <header rateYWlParamSetRateReq  rZwlRsv <header wepModeZWlParamSetWepModeReq  ZwlRsv <header wepKeyIdZWlParamSetWepKeyIdReq ` P[wlRsv <header a[wepKeyZWlParamSetWepKeyReq Pr[  [wlRsv <header beaconType[WlParamSetBeaconTypeReq  y\wlRsv <header probeRes[WlParamSetProbeResReq[WlParamSetProbeResponseReq  ]wlRsv <header beaconLostTh\WlParamSetBeaconLostThresholdReq\WlParamSetBeaconLostThReq  ]wlRsv <header activeZoneTime*]WlParamSetActiveZoneReq 0 ]wlRsv <header ^mask]WlParamSetSsidMaskReq   ^wlRsv <header type!^WlParamSetPreambleTypeReq  _wlRsv <header type^WlParamSetAuthenticationAlgorithmReq^WlParamSetAuthAlgoReq  _wlRsv <header ccaMode edThreshold agcLimit*_WlParamSetCCAModeEDThReq*_WlParamSetCCAModeEDThresholdReq  `wlRsv <header tableNumber camLifeTime frameLifeTime_WlParamSetLifeTimeReq  awlRsv <header count`WlParamSetMaxConnReq`WlParamSetMaxConnectableChildReq  awlRsv <header mainAntenna.aWlParamSetMainAntennaReq  bwlRsv <header diversity useAntennaaWlParamSetDiversityReq  bwlRsv <header enableMessage0bWlParamSetBeaconSendRecvIndReq  cwlRsv <header modebWlParamSetNullKeyModeReq  ycwlRsv <header cbssidcWlParamSetBssidReq 2 dwlRsv <header ssidLength dssidcWlParamSetSsidReq   dwlRsv <header beaconPeriod-dWlParamSetBeaconPeriodReq  ewlRsv <header dtimPerioddWlParamSetDtimPeriodReq  ewlRsv <header listenIntervaleWlParamSetIntervalReq  fwlRsv <header gameInfoLength fgameInfoeWlParamSetGameInfoReq F <header resultCode gstaMacAdrs retryLimit enableChannel channel mode rate wepMode wepKeyId beaconType probeRes beaconLostTh activeZoneTime "gssidMask BpreambleType DauthAlgo0fWlParamGetAllCfm   <header resultCode yhstaMacAdrsgWlParamGetMacAdrsCfmgWlParamGetMacAddressCfm <header resultCode retryLimithWlParamGetRetryLimitCfm  <header resultCode enableChannel channelhWlParamGetEnableChannelCfm <header resultCode modewiWlParamGetModeCfm <header resultCode rateiWlParamGetRateCfm <header resultCode wepMode1jWlParamGetWepModeCfm <header resultCode wepKeyIdjWlParamGetWepKeyIdCfm <header resultCode beaconTypejWlParamGetBeaconTypeCfm <header resultCode probebkWlParamGetProbeResCfmbkWlParamGetProbeResponseCfm <header resultCode beaconLostThkWlParamGetBeaconLostThresholdCfmkWlParamGetBeaconLostThCfm <header resultCode activeZoneTimeylWlParamGetActiveZoneCfm& <header resultCode GmmasklWlParamGetSsidMaskCfm  <header resultCode typeXmWlParamGetPreambleTypeCfm <header resultCode typemWlParamGetAuthenticationAlgorithmCfmmWlParamGetAuthAlgoCfm  <header resultCode ccaMode edThreshold agcLimitInWlParamGetCCAModeEDThCfmInWlParamGetCCAModeEDThresholdCfm <header resultCode countoWlParamGetMaxConnectableChildCfmoWlParamGetMaxConnCfm <header resultCode mainAntennaoWlParamGetMainAntennaCfm  <header resultCode diversity useAntennaoWlParamGetDiversityCfm <header resultCode enableMessagewpWlParamGetBeaconSendRecvIndCfm <header resultCode modepWlParamGetNullKeyModeCfm  <header resultCode qbssidNqWlParamGetBssidCfm( <header resultCode ssidLength 3rssidqWlParamGetSsidCfm  <header resultCode beaconPeriodDrWlParamGetBeaconPeriodCfm <header resultCode dtimPeriondrWlParamGetDtimPeriodCfm <header resultCode listenIntervalsWlParamGetIntervalCfm  <header resultCode gameInfoLength tgameInfosWlParamGetGameInfoCfm <header resultCodetWlDevShutdownCfm <header resultCodebtWlDevIdleCfm <header resultCodetWlDevClass1Cfm <header resultCodetWlDevRebootCfmtWlDevRestartCfm <header resultCodeNuWlDevSetInitializeWirelessCounterCfmNuWlDevClrInfoCfm <header resultCode vwlVersion macVersion vbbpVersion rfVersionuWlDevGetVerInfoCfmuWlDevGetVersionCfm <header resultCode rsv1 vwcountervWlDevGetWirelessCounterCfmvWlDevGetInfoCfm wtx .xrx dymultiPoll8wWlCounter  success failed retry ackErr unicast multicast wep beaconD rts fragment unicast multicast wep beacon fcsErr duplicateErr mpDuplicateErr $icvErr (fcErr ,lengthErr 0plcpErr 4bufOvfErr 8pathErr <rateErr @fcsOkP txMp txKey txNull rxMp rxMpAck !zkeyResponseErr< <header resultCode state2zWlDevGetStateCfm2zWlDevGetStationStateCfm <header resultCodezWlDevTestSignalCfm {wlRsv <header control signal rate channelzWlDevTestSignalReq  <header resultCode{WlDevTestRxCfm V|wlRsv <header control channel{WlDevTestRxReq   <header resultCode |bufg|WlCmdCfmreq_StartParent.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\0WMStartParentCallback apiid errcode wlCmdID wlResult state ~macAddress aid reason ~ssid ,parentSize .childSizej}WMstartParentCallbackj}WMStartParentCallbackreq_StartScan.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartScanCallback apiid errcode wlCmdID wlResult state macAddress channel linkLevel ssidLength Ȁssid 6gameInfoLength 8g0gameInfobWMStartScanCallbackbWMstartScanCallback WMStartScanReq apiid channel scanBuf maxChannelTime bssidـWMStartScanReqـWMstartScanReq.pWMStartScanExCallback apiid errcode wlCmdID wlResult state channelList ̂reserved bssDescCount ݂bssDesc PlinkLevelWMStartScanExCallbackWMstartScanExCallback@ <WMStartScanExReq apiid channelList scanBuf scanBufSize maxChannelTime <bssid scanType ssidLength Mssid 6ssidMatchLength 8^rsvWMStartScanExReqWMstartScanExReq req_StartConnect.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartConnectCallback apiid errcode wlCmdID wlResult state aid reason wlStatus OmacAddress parentSize childSizeWMstartConnectCallbackWMStartConnectCallback(WMStartConnectReq apiid reserved ;pInfo Assid ^powerSave $reserved2 &authMode`WMStartConnectReq`WMstartConnectReq.[req_Disconnect.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\ WMDisconnectCallback apiid errcode wlCmdID wlResult tryBitmap disconnectedBitmapWMDisconnectCallbackreq_StartMP.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\$WMStartMPCallback apiid errcode state reserved recvBuf timeStamp rate_rssi destAdrs ϊsrcAdrs seqNum tmptt pollbmp "reserved2LWMStartMPCallbackLWMstartMPCallback(WMMPTmpParam mask minFrequency frequency maxFrequency defaultRetryCount minPollBmpMode singlePacketMode ignoreFatalErrorMode reservedWMMPTmpParamWMMPParam mask minFrequency frequency maxFrequency parentSize childSize parentInterval childInterval parentVCount childVCount defaultRetryCount minPollBmpMode singlePacketMode ignoreFatalErrorMode ignoreSizePrecheckModeWMMPParam@WMStartMPReq apiid rsv1 recvBuf recvBufSize sendBuf sendBufSize param 0tmpParamWMStartMPReqreq_SetMPData.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\(WMPortSendCallback apiid errcode wlCmdID wlResult state port destBitmap restBitmap sentBitmap rsv data __anon size length seqNo 'callback :arg $maxSendDataSize &maxRecvDataSize0WMPortSendCallback size length-:areq_StartDCF.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\ WMStartDCFCallback apiid errcode state reserved recvBufܑWMStartDCFCallbackܑWMstartDCFCallback*Zreq_StartTestMode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartTestModeCallback apiid errcode RFadr5 RFadr6 PllLockCheck RFMDflagFWMStartTestModeCallback<req_MeasureChannel.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\ WMMeasureChannelCallback apiid errcode wlCmdID wlResult channel ccaBusyRatioWMmeasureChannelCallbackWMMeasureChannelCallback WMMeasureChannelReq apiid ccaMode edThreshold channel measureTimeWMMeasureChannelReqWMmeasureChannelReqvreq_GetWirelessCounter.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\WMGetWirelessCounterCallback apiid errcode wlCmdID wlResult TX_Success TX_Failed TX_Retry TX_AckError TX_Unicast TX_Multicast TX_WEP $TX_Beacon (RX_RTS ,RX_Fragment 0RX_Unicast 4RX_Multicast 8RX_WEP <RX_Beacon @RX_FCSError DRX_DuplicateError HRX_MPDuplicateError LRX_ICVError PRX_FrameCtrlError TRX_LengthError XRX_PLCPError \RX_BufferOverflowError `RX_PathError dRX_RateError hRX_FCSOK lTX_MP pTX_KeyData tTX_NullKey xRX_MP |RX_MPACK MPKeyResponseErrorWMgetWirelessCounterCallbackWMGetWirelessCounterCallback<vwmsp_port.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\DWMPortRecvCallback apiid errcode state port recvBuf \data length aid macAddress seqNo Varg myAid "connectedAidBitmap $&ssid <reason >rssi @maxSendDataSize BmaxRecvDataSizebWMPortRecvCallback(-req_SetMPParameter.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\$WMSetMPParameterCallback apiid errcode mask oldParamٝWMSetMPParameterCallback,req_StopTestRxMode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\ WMStopTestRxModeCallback apiid errcode fcsOk fcsErr WMStopTestRxModeCallback$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\components\mongoose.TWL\src\code32.hcodereset.hcode32.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcommand-line defines)initScfg.cD8%/  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\init\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\init\ARM7.TWL\src\code32.hcodereset.hcode32.hboot_sync.hversion.hformat_rom_certificate.hformat_rom.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcrt0.hstdarg.ARM.hva_list.h ansi_parms.h cstdarg stdarg.h file_struc.h wchar_t.h eof.h null.h size_t.h stdio_api.h msl_rsize_t.h msl_secure.h cstdio os_enum.h ansi_prefix.ARM.hmslGlobals.h msl_c_version.h stdio.h printf.h emulator.h armArch.h command-line defines) crt0.LTD.c 58 $508585\85`85d858585l858W# D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\components\mongoose.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmain_end.hsection.hmain_begin.hltdmain_end.hltdmain_begin.htwl.htwl_sp.hspi_sp.htypes.hnvram_sp.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htypes.hhi.h aes.hsndex_api.h pm.h spi.h type.h config.h spi.hcdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hcodecmode.hgx.hlcd.hrtc.hsnd.hstd.hpad.hfatfs.hspi.hmemorymap.hmemorymap_sp.hownerInfo.hmmap_shared.hspec.hownerInfoEx.hgenPort.hexi.hdsp.hcontrol.htypes.hi2c.hemulator.hutil.hfifo.hcamera.hmmap_wram.hmmap_wramEnv.hsystem.hscfg_private.hscfg.hscfg.hnwm_sp.hwm.hnwm.hnwm.hmisc.hdgt.hcrc.hchecksum.hfx.hfft.hmath.hqsort.hrand.hmath.hpxi.hos.hmi.hmemorymap.hctrdg_sp.hctrdg_task.hctrdg_sram.hctrdg_flash.hnitro.hctrdg_backup.hctrdg_common.hctrdg.hwvr_sp.hwvr_common.hwvr.hWlParam.h WlStaList.h WlCmdLabel.h WlBuf.h WlFrame.h WlCmd.h WlLib.h version_wl.h!twl_hybrid.hwm_sp.h"wm.h#gx_sp.h$types.h%command.h&api.h%thread.hsystemWork.hstdlib.h'unicode.h'memory.h(string.h'overlay.h)romfat.h)file.h)archive.h)api.h)hook.h)rom.h*types.h)fs.hpullOut.h*device.h(types.h*hash.h*exMemory.h(dma.h(backup.h*fram.h*flash.h*eeprom.h*common.h*card.hsndex_common.h+util.h,exchannel.h,channel.h,midiplayer.h,seq.h,mml.h,data.h,bank.h,capture.h,alarm.h,mmap_global.hioreg_SND.h-mmap_global.h-armArch.hwork.h,global.h,command.h,main.h,snd.htype_ex.h.instruction_ex.h/fifo_ex.h.gpio.h0type.h1instruction.h0control.h0fifo.h1rtc.hshutdown.h2fifo.h3pm_common.h4ioreg_PAD.hpm_common.h ioreg_SPI.hmic_common.h4xyButton.h5ioreg_PAD.h-pad.h6sharedWram.h7dma.h7mi.hos.hlimits_api.h8ansi_parms.h8climits8limits.h8armArch.hcrt0.h9application_jump.hprofile.hfunctionCost.hcallTrace.hvalarm.harena.halarm.hresource.hspinLock.hsystemWork.hentropy.hgxcommon.h$userInfo_ts_300.h spec.hregname.h3platform.hcache.h(endian.h(init.h(compress.h(uncomp_stream.h(stream.h(byteAccess.h(secureUncompress.h(uncompress.h(swap.h(wram.h(compparam.h3init.h3pxi.hreset.htick.halloc.hinit.hexception.hmutex.hmessage.hprintf.hsystemCall.htimer.hcontext.hevent.hinterrupt.hinterrupt.hsystem.hversion.hsystemCall.hstdarg.ARM.h:va_list.h8cstdarg8stdarg.h8file_struc.h8wchar_t.h8eof.h8null.h8size_t.h8stdio_api.h8msl_rsize_t.h8msl_secure.h8cstdio8os_enum.h8ansi_prefix.ARM.h:mslGlobals.h8msl_c_version.h8stdio.h8ioreg_SD.hioreg_OS.hioreg_PXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hmmap_parameter.hmmap_main.hcommand-line defines);main.c<| & n|}|B|(p6} ||?7'?7' 4|D|vT| h|x||/{  . }6 }6>/ / v| v |v,| @|.~x|z|g~|./7{6}~|6   P|/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\ARM7.TWL\src\ioreg_OS.hmmap_global.hsystem.hthread.hinterrupt.htypes.hcode32.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5memorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_irqHandler.c7P |.  ||' D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_irqTable.c74|8|&/w }||||||$|4|D|||. |||| D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\ltdmain_end.hsection.hltdmain_begin.hsystem.hinterrupt.harmArch.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hthread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.h scfg_private.h2misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_interrupt.c7|)||<%_zo#gzy'~'~'~z  |{ |v $|&}& p||||(|`||| |= D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_pxi.c7@|%P|6`|&t|~&|N D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hnitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_spinLock.c7|}G y'}.'|~~ <|.n|/~?z| 7/zt||||||p|\ D:\Program Files\INTELLIGENT SYSTEMS\IS-TWL-DEBUGGER\Target\include\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\istdbglibpriv.histdfio.histdsio.histdhio.histdprint.histdbglib.hdbghost.hnitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7os_printf.c8|  # D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hmi.hos.hmemorymap.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_thread.c7|)[?qD|||?,|p| &/'~D|t & z 6} uy&"|   |u  z t u} ~ ||?~|P| 'z7| p}| j}G'&| ~| | ./ |  | .{~' .& 8!| ~X!| !| !|/'!|~'_ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hmemorymap.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_context.c7"|*|"|"|t D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\mmap_wramEnv.htwl.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_emulator.c7"|7 L#|x#|/'' $|$|y D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\message.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_message.c7$|"&$|7|p%|/6} &|] D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\nitro.htypes.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_mutex.c7&|(&&|8 y&|'||&&'T'|z&&x3'|&'|&zy{'&3(|&(|)|? D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hscfg.htwl.happlication_jump_private.hpm.hcommon.hctrdg_common.hpxi.hwram.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h#rom.hhook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)7os_init.c8@)|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_arena.c7|)|P)|6>)|.*|.*|.X(a|p  *|-jt *|. D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\alloc.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_alloc.c7+|8+|  }|}{~|+||.,|&}|7 >6&' >6&7' D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hos.hmemorymap.harmArch.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_exception.c7 .|?~ & t.|.|.| |/|#  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_timer.c7/|6 D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_tick.c70|7/|&|}' 0|0|'~1|? F 1|J  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_alarm.c71|7''~ } D2|/}2|2|2|G'}}~~3| y?D4| u}}4|~~~@5|P5|}7 x~ / Y  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_valarm.c7D6|/}&6|6|~fD7|k|||7|7|6  } 8||8|8|z~8|x ?`9|}ci|} ?& ;|''i D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hscfg.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_system.c7T;|(h;|<|;|;|;|;|;|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\codecmode.hemulator.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.h unicode.hstdlib.hownerInfo.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.hthread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_systemWork.c7;|";|</O' D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mb\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\ltdwram_end.hsection.hltdwram_begin.hwram_end.hwram_begin.hcode32.hcard.hglobal.hmb.htypes.hmb_fake_child.hmb_child.hmb_gameinfo.hwm.hfile.hmisc.hmb.hnitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.hrom.h"hook.hapi.harchive.hromfat.hoverlay.hfatfs.hsystemWork.h thread.hapi.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.std.hnwm.hnwm.h0nwm_sp.h1twl.hscfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7os_reset.c8@<|?t t x<|4}4}6}  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\common\src\gx.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6os_entropy.c7<|!}&.~}~.>  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\os\ARM7\src\mcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hctrdg.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8os_terminate_sp.c9=|$/'/6 >|8>| X D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmi_ndma.hsystem.htwl.htwl_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.hapi.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7mi_ndma.c8p7}$_!cfiloru x{ 8}W676/66 & w~t9}9} &9} (`:} (:} (0;} GP;} &;}  ;} ;} .F(<} D<} T<} d<} }~<}=} D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common.TWL\src\system.htwl.htwl_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.hapi.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6mi_sharedWram.c7<>|>|~n'''`?|  w.?|  w 6  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\nitro.hmi_dma.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.h nwm.h0wm.h nwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.h genPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7mi_dma.c8,@| @|  t@|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\code32.hcodereset.hcode16.hmath.hmemory.hplatform.htypes.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hfft.hfx.h.checksum.hcrc.hdgt.hmisc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h&scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6mi_memory.c7$A|@A|\A|pA|A|A|A|B| C| } D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\code32.hcodereset.hswap.htypes.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6mi_swap.c7C|, D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mi\common\src\dma.hnitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h sharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6mi_init.c7C|! & D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\pad\ARM7\src\nitro.hnitro_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6pad_xyButton.c7D|) '~'D|~{' D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\pxi\common\src\misc.hpxi.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6pxi_init.c7D|/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\pxi\common\src\twl.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6pxi_fifo.c7D|(~~&'|&|'E| y|/F|F@F|.&'xF|/~/F|y u|'6  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6std_string.c7G|.&G| w''/DH|?~7H|&H|>H|/' D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6std_sprintf.c7 B~'&.~/.~&..v'6~~FN?6'NN?6?>7~}~'~& |.'&~~&& $.~fN'~'/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\std\common\src\ltdmain_end.hsection.hltdmain_begin.hunicode.hnitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6std_unicode.c7`T| D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\exi\ARM7\src\exi.hgenPort.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6gpio.c7tT|!>T| _ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\exi\ARM7.TWL\src\memorymap.htypes.hgenPort2.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7gpio2.c8T|&>T|/6U|U| D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.hcapture.hchannel.htypes.hmisc.hpm_utility.hpm_common.hioreg_SND.hos.hglobal.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hwork.harmArch.hmmap_global.hmmap_global.h alarm.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.hapi.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.hioreg.h scfg_private.h4system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)8snd_global.c9$U|<. D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7\src\channel.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_channel.c7V|; {|}s?|'XW| |{w ?|&X| |{w ? &X|~X|$?&  HY|6`Y| ~zG&Y|'&Y|~& }}&XZ|&hZ| {|'& Z|'F y{N D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\common\src\os.hchannel.hutil.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_util.c74[|}|F}7/~'`\|'~~~&\| w}}L]|6 D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\common\src\sndex_api.hwork.hutil.hcommand.halarm.hseq.hexchannel.hglobal.hos.hmain.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.harmArch.hmmap_global.hioreg_SND.hmmap_global.hcapture.hbank.hdata.hmml.hmidiplayer.hchannel.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_main.c7]|7^]| <^| P^|l^|p^|t^|^|}}}&7 {{{   D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7\src\misc.hcapture.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_capture.c7_|({_|68# D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7\src\work.hutil.hexchannel.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_exchannel.c7`|~'~&&``|~xy7*'7 7~ &&Lb|C={N'zz'O&z &}}}(}|>  t }/z & '&'W'W'& f|~@f|~f|f|~}xg||'g|&g|g|&g|g|&g|6}p{q'~/"''7}'Bi|i| v~}~' &'>j|xv{~' &&'?/dk|7z k| k|~ u/.4l|Xl|'s&'&l|m|\m|&4$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7\src\main.hmisc.hutil.hbank.hmml.hwork.hseq.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hdata.hmidiplayer.hchannel.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_seq.c7m|~~|&&m|'~'7N'''Xo| |R&~ u }}'/ 4q||q|>q|>q|'/' @r|'?|.&'r||.&'G/Gs|7&&>s| t y&&>`t|~{&/&&t|~~/&Hu|'  wu|p}v{&  w>(v|dv|&'v|FF FG6w|k~tx|x| y/x| y| {Ly| 7&&y| &'&y| ~ ~|60||}~'~&&&'& D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\common\src\work.hpxi.halarm.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_alarm.c7ȋ|~'|~ X|~|'> |~T|. z&&; D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\common\src\main.halarm.hutil.hglobal.hwork.hcapture.hseq.hmi.hpxi.hos.hmisc.hcommand.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.harmArch.hmmap_global.hioreg_SND.hmmap_global.hbank.hdata.hmml.hmidiplayer.hchannel.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6snd_command.c7ԍ|) |B7L  &&7..?6bP"W > &&&&&&&*6>Ȕ|  / | D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hspi_sp.htypes.hnvram_sp.htype.hpm_sp.hioreg_OS.htypes.hmic_sp.htp_sp.htwl.htwl_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6memorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7spi_sp.c8|= }|&&&N&4| }~~6|&|4 F| ؗ|&|~,|/~|.}}F&>|/$|G|C J D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\codecmode.htypes.hmisc.hpm_shutdown.hpm_selfBlink.hpm_sleep.hpm_utility.hpm_common.hpm_pmic.hpm_send.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0std.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hgenPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)9pm_sp.c:|& <|~  V//||/>V&6'6'  |F D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\pm_common.hpxi.htwl.htwl_sp.hspi_sp.htypes.hmisc.hpm_send.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.h thread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8pm_send.c9(|2N/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\twl.htwl_sp.hspi_sp.hpm.hspi.htype.hconfig.hspi.hpxi.hpm_common.htypes.hmisc.hpm_pmic.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8pm_pmic.c9d|> } |&.|}G T|x|&"2  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\mcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hspi.hcdc_api.hcdc_dsmode_access.hcdc_twlmode_access.hspi.hcdc_reg.hcdc.hcodecmode.htypes.hmisc.hpm_shutdown.h global.h pm_selfBlink.h pm_utility.h pm_common.h pm_pmic.h emulator.h system.h pm.htype.h config.h twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h command.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_api.h"sndex_common.h#card.hcommon.h$eeprom.h$flash.h$fram.h$backup.h$dma.hexMemory.hhash.h$types.h$device.hpullOut.h$fs.htypes.h%rom.h$hook.h%api.h%archive.h%file.h%romfat.h%overlay.h%fatfs.hsystemWork.hthread.h api.h&command.h'types.h&gx.hgx_sp.hlcd.h!wm.h(wm_sp.h)twl_hybrid.h*version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.h*ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.hnwm.hnwm.h4wm.hnwm_sp.h5twl.h*scfg.hscfg.h6mmap_shared.hscfg_private.h7mmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8i2c.h9types.h8control.h9dsp.hexi.hgenPort.h:memorymap.hcommand-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines);pm_utility.c<|8:&&&     ~G~6&?'  '''6''~&' |>D|0&F| ||'  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\mcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hglobal.hgenPort.hpm.hspi.htype.hconfig.hspi.h exi.h pxi.h types.h misc.h pm_utility.h pm_sleep.h pm_common.hpm_pmic.h pm_send.h twl.h twl_sp.h spi_sp.h pm_sp.h twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.h instruction_ex.h!type_ex.h snd.hsnd.h main.hcommand.hwork.harmArch.h"mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h#sndex_common.h$card.h common.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.h types.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.h gx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.h version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.h wvr_common.h-wvr_sp.h.ctrdg.h ctrdg_common.h/ctrdg_backup.h0nitro.h ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.h mi.h os.h math.h rand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.h nwm.hnwm.h4wm.h nwm_sp.h5scfg.hscfg.h6mmap_shared.hscfg_private.h7system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hmemorymap.hcommand-line defines):twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines):pm_sleep.c;D|0~|. u $.q & 8|  .'|&'&&}&N D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\src\types.hmisc.hpm_selfBlink.hpm_utility.hpm_common.hpm_pmic.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h genPort.h7types.h memorymap.h command-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8pm_selfBlink.c9$|G/.~/ D|`|\"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\src\ltdwram_end.hsection.hltdwram_begin.hltdmain_end.hltdmain_begin.hfatfs.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hmemorymap.hgenPort2.hglobal.hgenPort.hpm.hspi.htype.h config.h spi.h exi.h pxi.h codecmode.h types.h misc.h pm_shutdown.h pm_utility.h pm_common.h pm_pmic.h pm_send.h spi_sp.hpm_sp.htwl.htwl_sp.hioreg_OS.hmic_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.h fifo.h control.h!instruction.h!type.h gpio.h!fifo_ex.h"instruction_ex.h#type_ex.h"snd.hsnd.h main.hcommand.hwork.harmArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h%sndex_common.h&card.h common.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.h types.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(systemWork.h thread.hapi.h)command.h*types.h)gx.h gx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.h wvr_common.h/wvr_sp.h0ctrdg.h ctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.h mi.h os.h math.h rand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4std.h nwm.hnwm.h6wm.h nwm_sp.h7scfg.hscfg.h8mmap_shared.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hcommand-line defines)<twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)<pm_shutdown.c=\=}&&&&'? p|^(>}'' >}>}>}/'>}'&>}7/&.?}@@}'6@}~&&&& \ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\scfg.hioreg_OS.hmessage.hfifo.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6scfg_proc.c7|6'.|..||Nĩ|!`{7 ~?&&   D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\tp\src\tpex_reg.htp_sp.hspi_sp.htypes.htpex_sp.hcodecmode.htwl.htwl_sp.htypes.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8tp_sp.c9p|2&'}.&'.>&h|&.|~ &V?'&&'&'& z'& z l|&| & ~?~@|&'&/66&.   p t /7&/7&|'~'~< D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\tp\src\spi_sp.htypes.htp_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7tp_sampling.c8|.>&/ '~.& |&.|  w&  ~~^V&'~z& z~ 76&&~|.& |O z&& ~&~'! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\mic\src\mic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.htwl.htwl_sp.hioreg_OS.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8mic_sp.c9|;&.H|~ ' &'&&&&& &&~~'&~'&?&~&'& &&& $|&jq x{ȹ|'/6}7'|7&/ /'z'&z|| ||H|  2? D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\mic\src\spi_sp.hioreg_OS.htypes.hmic_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6memorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7mic_sampling.c8|9.>|~| ~'~~//&'Ծ|&.&|.>|~|7~~~7/&~ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\mic\src\code32.hcodereset.hmic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.hinterrupt.hioreg_OS.htwl.htwl_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)8mic_irq.c98||`|l|>% D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fs\common\src\archive.hfile.hhash.htypes.hmisc.hrom.hromfat.hcommand.hutil.hfs.hcommon.hpxi.hos.hmi.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.htypes.hdevice.hpullOut.htypes.hrom.hhook.hapi.hoverlay.hfatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.std.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7fs_api.c8x|m D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7card_api.c8|<ji&8|x||p D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\rom.hcard_spi.hnitro.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7card_common.c8||} D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\os.hcard_task.hnitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7card_task.c8|&&||/.~&'''|&.X|  y7.F!] D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\card_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7card_spi.c8|&}67P|,7 |'/|~'&&&' d|&..&|.&.&|&G&X|$ |'>66,|&/'|.&&  |.' t.&6& |.' t.&6& `|.'~77 |.'~~&|.'~~&(|'' |'} {~}.&  ] D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hrom.hpullOut.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7card_rom.c8|{'}|} 4||&& T|`|'m D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\ARM7\src\card_common.hnitro.hcard_rom.hcard_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7card_command.c8t|-7~&&(&'6666....|O@|/( b D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\card\ARM7\src\os.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.hcard_rom.hctrdg.hpullOut.hrom.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7card_sp_pullOut.c88|6{?&|'V|//0|' &7|}}|/~'& ||w > D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\i2c\ARM7.TWL\src\ltdwram_end.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.htwl.hsection.hltdwram_begin.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h scfg_private.h3system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7i2c_instruction.c8A}}'8|>}'|z|&&| >}'`|  x|  |  |  | &| .NNF6 //OOO7////|     // 7OOOG| F666 } }/OOO ///&F |  .///OOOF 8| D| G/OOO/////OOO7/d|p|/OOO///// /|.D|GNNNN.NNNN.NNNN.NNNNF||/L.|F{6>>?x  |F>?x   |{. &|{.&`|?V& |~/z&  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\twl.htwl_sp.hspi_sp.hcdc_twlmode_access.hspi.hcdc_reg.htypes.hmisc.hcdc_api.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4system.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8cdc_twlmode_access.c9<| P|/&|..|& |&.0|&&T|&|&.&||~~&.&|..|~~&&&T|..|&| zN# D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\memorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hcodecmode.hpm.hspi.htype.hconfig.hspi.h cdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hsndex_api.h init.h spinLock.h emulator.h message.h system.h twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hpm_common.hioreg_PAD.hpm_common.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.h command.h global.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.h api.h%command.h&types.h%gx.h gx_sp.hlcd.h!wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.h wvr_common.h,wvr_sp.h-ctrdg.h ctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.h mi.h os.h pxi.h math.h rand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.h types.h std.h nwm.hnwm.h3wm.h nwm_sp.h4twl.h)scfg.hscfg.h5mmap_shared.hscfg_private.h6mmap_wramEnv.hmmap_wram.hcamera.hfifo.h7util.h7i2c.h8types.h7control.h8dsp.hexi.h genPort.h9command-line defines):twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines):sndex_request.c;|&~''|  |{~'7~/&~&&'| s' H|$>| ~~}~/r66G}'z 76w '{ G}&.&&.~'~. ~ ~ 6 v>6 '6?/77777&7&6 '&.6  v.z&?d|>|{|P|G&P D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htwl.htpex_reg.htp_sp.hspi_sp.htpex_sp.htwl_sp.htypes.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)9tpex_sp.c:|'$|/6?'& .  V D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htpex_reg.hspi_sp.htypes.htp_sp.htwl.htwl_sp.htpex_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)9tpex_sampling.c:|1 | 8|} `||||||| |(|D| ~&/~7,/}&uz~~''VN  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\codecmode.hsndex_api.htwl.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl_sp.hioreg_OS.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.h system.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8micex_sp.c9|*'&&&'&G&&..&~~y|F|'&{&&&''~'&G&{{&F' ' \}V}' .v. 7& }&&&f~yko~.&?~.& & (}& u}.&&'}&     D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\code32.hcodereset.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl.htwl_sp.hioreg_OS.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8micex_irq.c9}}}}d}}' ?/}  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmemorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h scfg_private.h5system.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)9mcu_intr.c:@D}F&~~V&N@E}|lE}~/E}E}.'4F}'''lF}{{{F}fF}q tw/'/f&}~ G}G}& D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8mcu_control.c9H}//{1 D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\memorymap.hmemorymap_sp.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h mi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7nvram_sp.c8 }7~ }~    $& & '&/~'&/~O  }/6&'6.'6.'6>'6>'6'6'667}}~4}${k!H D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\spi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)7nvram_instruction.c8}!/>}&.}1/>0}/?.}{'..}&&'& }&.}{'...}&&'& }||{{{'.~&.- }||{{{'.~&.- }|~'>}|~'>}/>P}/>}/>}/>.~. l}/>  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hfifo_ex.hemulator.hgenPort.hpxi.hfifo.hinstruction.hcontrol.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.htype.hgpio.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.hthread.hapi.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4i2c.h5types.h4control.h5dsp.hexi.htypes.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)6control.c7}&/.&&&L}?~.&W }OG ,}Z}&/&~' J} NP}9~rsrO~^&.  $}~'$}/~&.N" D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hgenPort.hgpio.hinstruction.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.htype.hfifo_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h types.hmemorymap.hcommand-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6instruction.c7 %}+.NP%} & x xOt&}6&}N&}6'}60'}Nh'} z6'} zND(}z6(}zN)}Gz6x)}GzN)}6*}NH*}6t*}N*}6*}N+}6<+}N|H}6H}76H}ON@I}6lI}NI}6I}Nt+}Tr x},} T"`  fh y}-}6&&T D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\rtc\ARM7\src\code32.hcodereset.hioreg.hgpio.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)6gpio.c7-}(0.}d.}.}d/}  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apistat.c;'G~..pG~&n~}&..>&&&'{'6# D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtlowl.c;`+} '~7~.7 >'opq &&&~.'\~67' .&`/O7& v&&&&&&&&&&/W4~& 6/}~}&4~> ~/؉ y}, {.x& D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apickdsk.c;|~&||}'}.'.&&{!_d g}'.&/.&y.} .?'&&'.&//.&.''& u( &&&'&'&&&~&&&&&&&'&'&&'&&'&'&&&&/&.&}' }/&/}&./%'.~./~{F.,`z&&&&'~&&6D7....>&..G/&7..Ni/&.7/z'/..N&..N  q/../N~( /&&'>|r 7&F'/|/ y y ~,//'?....& l|o O~y  '06']#'H }q p''~G >?/&& lw66&.....&7..N } o/&.&/7..O&..N  q/../N '>  b/7'.&~.F.H /&&&& Ԣ ~>6&/T 6$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apiwrite.c;l)}~|G}~7?~'~ &y y&}rjN/6~{{ } {~V.  |y}.&  ~~|} zig'~~~}}~ }...O. &&&&  ?|}~'7~?7~>'}~G$&7.>.'6~. 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D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ltdwram_end.hsection.hltdwram_begin.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apicnfig.c;}&~|ceee~~~~ȲF~'  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rttermin.c;,&H&&&t'.ܳ v~} //~>  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs_target_os.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutbyte.c;`~6#.ش 760%T! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutil.c;H'.7&/?.&'&X|.&7G&6&DrF6zF.&8zd~x' D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilio.c;Ox}/&&?~&GF!G~7~&z~ & ~n&'/}&8 &/~~~xy&|}x{} 77O6}z}'.& O|y}$'~&zw y '& O~ W G~~ _~|}&/~ y'} &>mj  /~_} '}}&$~7   v/F&}} 7&' FF. .'..6., 6&| ~j&6_&&&.     '/}'>'6t ''~~ /&//< .yz}}~/&&.'| & " D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdevio.c;/F{FT7'>{>/>&>`/?G&'0 7.t7&G~_D/| '{.W~|L ' }6W~ 'x}.W~|' }.W~ ( D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtvfat.c;h.z'}'0R$\'jo'7'.. 7&7'7F&'/6&d~ >/7/s x/?/7'//. 66.p ?~'~6'.,>P&'z x y''&z''z?,'&.,'&.,'&. u'F0.'{y Fz''Vz''&Fz 7'.7'.7'.&.&/&{y$'&>'&&6 <~ l?~~t?&|..76w /'~}O&x~' }    '.n .FN7?}F.D6~&  &&>~.&& u F&/ %, X       P  } z}p'&&$&z&''/6]  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilmv.c; ?}}?~&GG6&p& D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdrobj.c;&~..&& .&y  i6> F>'?>?? 6.7/&?~>'6.7>'6.&/ y>L'|&>~ 7/ >~~|O.>> t>>>>>~~ '&' w>>|'>>7~>/// &>F&///&'/6.y/&./ u vxx(&. vx ~ x~~8''&?'/''&.7> O}&&&LF&&&  0 {~&> Gw}/'0 .''./  }& l   F \" D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apifrmat.c; ~ u.. 7~& O OT7~&{w yt &'/ $.}6} . }~g w|}z}|  ~ 76xl  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9csstrtab.c;' F! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat16.c;4&. 7~ s &> .~ h  ~/'~ u  ~''&&.}'  //}6$> 6.. " D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat32.c;.y77  6~~7~ F'hO&&.x.>N\  .  /'~ u  ' ~''&&&&&&..}'/.&&&&//~~'&6$> 6/_>8  T l &7&&&&&&.O~&'4 \ &'/ '{'~  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apigfrst.c;P //'&.0$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9csunicod.c;$ v&}85&x>&'  G~D&&}|64&&h&&<.66{7|{6/&%&6' & &Xl'&.&'}~'&}&~}/x > '.7 }|}>% }|'?.~~~.>&~'{}$7//(' w''l& D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfatxx.c;H &. ~> . 66666/.6'6~ G}~&@~.6>.'47|6/G  6x~| 7  l 6&~.{7/j  {67~|&~,V,&,V~&,&|}& t?'?~".'>}. W # 7&.}}N~.N~}. ./0%x{&~~ %7>%'~'H&&^~&H'W|'W'V'. w6.(. w6.p  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinfo.c;))&/&)~~}t*7  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\portconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinit.c;*'~~&~ +....G,/'&  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs_target_os.hportconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfs_naming_convention.hrtc.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9portkern.c;P,\,h,t,,,:.&&6..{'T-/~&.  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apimkdir.c;- ?}}}?~_&~FN y6/} & t& &a" D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9apirealt.c;$0(/~}x0_|~~7/{|  xy7 z $&&/|&&'&'~| ~$>}'&'6..| ~/~~/~'&5 { V}  |/&)& D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9prblock.c;7,VL73f7 /..7.~66}&'8 . v}&&~&W~&|.&8.?6. 96}&&&p9./.&'~&~&|.: v'&&&$;&\;>;6 x}; 7'&}h< |&'{~/'.= }.t w6/&& F&>6{|~>./D?&'&.{}@'x .'&&m.&' '.&&&~'W}{} &C4D .67{~F>. E }@EE .'.Ftg}>L" D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtkernfn.c;F6? G"&>'>./' {}7/6$H?7?}g77HHI&&&./}''& I& J^HJ | {&~>  y'}.& g~ hL.}&..&$.& TM&&..&~.&   D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9drdefault.c;\NhN(..N>_/z&   D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9drfile.c;O^'>F& P />>?/ooz &y&& Sxv xt  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\drdefault.hportconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9attach.c;TF~/~}~ wx&d&V/~Dj{}}& D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_append.c;0X4&hX^XG~}G./7'N~~&&. XZ/&/W~~'&[&. {&7&/'h\.7/&O~0] .}&}^|}{}/D_ s.~}}~6~~|}z x7$ } ~''~'a~/aLb}&{{y7~&~G~?~&O}}&zz{.'6&8e ?}}?~&G~' & &f ~7}/ >~~ u  t>>> &' w>O.>7zi ?~~~&& }&! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_vfat_append.c;j6z'}'4N(X'fk'O'.. 7&7'7F&'/6&2$! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_api.c=Dn?' n?   .& 8o? o&o&o|| ,p~}. tp|z{ p|z{ Tq|z{ q|z{ 4r~>~~~yz&x|~~&ls~} "3! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ltdwram_end.hsection.hltdwram_begin.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hexi.hgenPort.h:types.hmemorymap.hcommand-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_cache.c=s&s&s.Nt|z{ t|z{ hu }/~{  *! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ltdwram_end.hsection.hltdwram_begin.hdma.htypes.hlo.htypes.hmisc.hhi.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.h rtfsconf.hrtfs_naming_convention.hsdmc.h sdmc.hsdif_reg.hsdmc_config.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.h instruction.h type.hgpio.h fifo_ex.h!instruction_ex.h"type_ex.h!snd.hsnd.hmain.h#command.h#global.h#work.h#armArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.h#capture.h#bank.h#data.h#mml.h#seq.h#midiplayer.h#channel.h#exchannel.h#util.h#sndex_api.h%sndex_common.h&card.hcommon.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.htypes.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(fatfs.hsystemWork.hthread.hapi.h)command.h*types.h)gx.hgx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.hwvr_common.h/wvr_sp.h0ctrdg.hctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.hmi.hos.hpxi.hmath.hrand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4misc.htypes.hstd.hnwm.hnwm.h6wm.hnwm_sp.h7scfg.hscfg.h8mmap_shared.hioreg.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hexi.hgenPort.h<memorymap.hcommand-line defines)=twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch workaround.h>symbols.h>command-line defines)=sdmc_thread.c?Pv7....&v,w'~xw/w G7.?&6 x& Axy..//...WFW'$}28{}'~{\} .6&G~~/|{?}.}||'y& |~ so|b }}.&&p  t&&r '&,}| |7''~}& s..  }~  ~{&~~&q. 6&.G&  }^'$ 'T { y/&6.6. X~| O'?$|~  |w }}.&' u vn d   t&&r 'Z(X)}DW6'~&../. &'}~ D |&}./x x|...&6/676&.G#& |'H6666VV666VV $ 0$rv|&VFN ~k& l 4|' ~  &Y! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\code32.hcodereset.hltdwram_end.hsection.hltdwram_begin.hcode32.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.hioreg.h scfg_private.h7misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hexi.hgenPort.h:types.hmemorymap.hcommand-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch workaround.h<symbols.h<command-line defines);sdmc_intr.c=J}HJ}'>؜'$'P'&F.6~~~z  !'~~. .ȟ~... t& u z'6&/..P v'6&..~% u z'6./..7~% v'6...7|>.7'>.7T->.7̤->.7D'->.7̥>|~~~8-.G &&&7~~|/ 6/&''& "t86Xs#l} . t{&76&6.76/.'q'a"> . .G'  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h<symbols.h<command-line defines);sdif.c= &'6'|& }} &&&''}} 6&76  }'6 l vr&&&.&.&/6 |{~&&.&..6P&'.&||&66 &7/6 &'/6 \|'|&'6(|.6666666 6d&76&666666 6&7 IJ&'6<&'/6.&'60 }} vu}&6 p  .6&?&'/66&?&'/66,.}6 &q z|$|.&6&$&&'>'>' &76>6  >4 .h   >̺ &&&&&&P }}7}} 6   .&'6#  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h<symbols.h<command-line defines);drsdmc.c= u{F$  &6/{w{} v'~>~'~~}y'6~ l.& v"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h<symbols.h<command-line defines);drnand.c=L &/.G~&}|z.~~~~}}| wyx?.M  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\spi.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h8symbols.h8command-line defines)7sdmc_flags.c9../&8&.& .'&(r'~  &.6&&0..6&& ~ !! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h<symbols.h<command-line defines);drnand_aes.c=\? vO{{6  >|G....l! D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htypes.hresource.hfatfs.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&systemWork.hthread.hapi.hcommand.h'gx.hgx_sp.hlcd.h"wm.h(wm_sp.h)twl_hybrid.hversion_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.hctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.htypes.hstd.hnwm.hnwm.h3wm.hnwm_sp.h4scfg.hscfg.h5mmap_shared.h ioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9types.hmemorymap.hcommand-line defines):twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.hsymbols.hcommand-line defines):fatfs_resource.c;9zN&F&} ~&z|.O}H|&xz.O0$3" D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rsvwram_end.hsection.hrsvwram_begin.hsdif_reg.htwl.hsdmc_config.hrtfs.hrtfs.hsdmc.hdrfile.hrtfs_twl_append.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.h mcu.htypes.h unicode.h attach.hrtfspro.hcsstrtab.hportconf.h rtfsconf.hrtfs_naming_convention.hresource.h request.h format_rom_certificate.hformat_rom.hfatfs.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.h ioreg_SPI.hpm.h pm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.h!rtc.hrtc.hfifo.h"control.h#instruction.h#type.h"gpio.h#fifo_ex.h$instruction_ex.h%type_ex.h$snd.hsnd.hmain.h&command.h&global.h&work.h&armArch.h'mmap_global.hioreg_SND.hmmap_global.halarm.h&capture.h&bank.h&data.h&mml.h&seq.h&midiplayer.h&channel.h&exchannel.h&util.h&sndex_api.h(sndex_common.h)card.hcommon.h*eeprom.h*flash.h*fram.h*backup.h*dma.hexMemory.hhash.h*types.h*device.hpullOut.h*fs.htypes.h+rom.h*hook.h+api.h+archive.h+file.h+romfat.h+overlay.h+systemWork.hthread.hapi.h command.h,gx.hgx_sp.hlcd.h'wm.h-wm_sp.h.twl_hybrid.hversion_wl.h/WlLib.h0WlCmd.h0WlFrame.h0WlBuf.h0WlCmdLabel.h0WlStaList.h0WlParam.h0wvr.hwvr_common.h1wvr_sp.h2ctrdg.hctrdg_common.h3ctrdg_backup.h4nitro.hctrdg_flash.h4ctrdg_sram.h4ctrdg_task.h4ctrdg_sp.h5memorymap.hmi.hos.hpxi.hmath.hrand.h6qsort.h6math.h6fft.h6fx.h7checksum.h6crc.h6dgt.h6misc.htypes.hstd.hnwm.hnwm.h8wm.hnwm_sp.h9scfg.hscfg.h:mmap_shared.hscfg_private.h;system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h<util.h<emulator.hi2c.h=types.h<control.h=dsp.hexi.hgenPort.h>memorymap.hcommand-line defines)?twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h symbols.h command-line defines)?fatfs_command.c@@&>&,z} v s &yyO'('|//.?'|6s~G&|t .~  W(&G&~G?O'~'~$~'/&}~' || }~> ~}'.&.> .7.76. 7~ $F..&6&/ y$ @,F6 ~} ~ ~7& |~?|' 6'~'&~' /~& 6'~''~ '~ s s`  .z~}66& d  &...'4   z&{.6/   |y~'.&6  & X   '&  & 4  &    '&  ~~ v {~|'6~.>  ' .}~~ ~|. ~&/&' .~|{.  ~|. ~&/& & `' ~~.&/.` ' ' ~~|~G~~g}''  ~^&/66P / '~/.7 t7W~{}F z& z&  z&  z& }F z& ? z& ? z& ? z& ?('~ }'~''~.7~y'~'~~~x}~~~&?>G~G~~&.{$~&'>&.6G&&.7~&''" &. .6'~'/~| }77/? ~    6&ox&&/'67.. `&.&$&&$&/$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_request.c9&& Nd/y|}6~' Dc y'~6'> D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\types.hrequest.hfatfs.htwl.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_thread.c90:&~6'|.'~~'~'~z    D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_api.c9F'\ .'~ $$Q  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hinterrupt.hioreg_AES.hdma.htypes.hlo.htypes.hmisc.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.hmemorymap_sp.hmi.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8aes_lo.c90&D~''/ &&xx | {4`V660@P>p| V 6f#- D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hformat_rom_certificate.hformat_rom.hinterrupt.hmutex.hpxi.hmath.hlo.htypes.hdgt.hmessage.haes_fifo.hhi.hdma.h types.hmisc.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.h pad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.hscfg_private.h5system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)9aes_hi.c:$ .'` ~&..~' .&   {|{}zx F F!7"/t/ " 6~ $//' .7/' ~ ' /76 /7 }' /{~zx '6 /}'~~&}@|&'   w ~z|7 ~ x&../ }** ' &.&} , ?, /'&, -   D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hfifo.hsection.hltdmain_begin.hdma.htypes.hlo.htypes.hmisc.hdgt.hmessage.haes_fifo.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines)9aes_fifo.c:-F\-F.~&.&.'$.V'p. D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hsection.hltdmain_begin.htypes.hhi.htypes.hmisc.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_secure.hmsl_rsize_t.hstdio_api.hsize_t.hnull.heof.hwchar_t.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8aes_common.c9.< y~/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wvr\ARM7.TWL\src\wmsp_mac.hWlLib.hnitro.hwm_private.hwm.hos.htypes.hwmsp_private.hwvr.hioreg.hioreg.hmi.hos.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1nwm_sp.h2twl.hscfg.hscfg.h3mmap_shared.h scfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7types.hmemorymap.hcommand-line defines)8twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mchcommand-line defines)8wvr_sp.c9@}  D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7.TWL\common\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DS V2.0_SP2_patch3\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_1\working\TwlSDK\build\libraries\wm\ARM7\src\wram_end.hsection.hwram_begin.hltdmain_end.hsection.hltdmain_begin.hos.hwmsp_private.hmemorymap.htypes.hgenPort2.hwmsp_common.hwmsp_mac.hWlLib.hnitro.hwm_private.hwm.htypes.htwl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_secure.h msl_rsize_t.h stdio_api.h size_t.h null.h eof.h wchar_t.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.hstd.hnwm.hnwm.h3nwm_sp.h4twl.hscfg.hscfg.h5mmap_shared.hioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9command-line defines):twl.h.16M.ARM7.CODE_ARM.CW.CW_FORCE_EXPORT_SUPPORT.CW_MAJOR_VER-2.FINALROM.LINK_ISTD.TS.TWL.TWLLTD.C.mch command-line defines):wmsp_system.c;d5}}'~ &>  >qF_start_LtdMainParams_start_LtdModuleParams_start_BuildParams7_start_ModuleParams_ZTISt15basic_streambufIcSt11char_traitsIcEE_ZTISt12strstreambuf_ZTSSt12strstreambuf-_ZTSSt15basic_streambufIcSt11char_traitsIcEEl_ZTVSt12strstreambuf_ZTISt9exception?_ZTINSt3tr16detail25shared_ptr_deleter_commonE_ZTINSt6detail14default_deleteIA0_cEE_ZTISt8ios_base_ZTINSt8ios_base7failureE_ZTSSt8ios_base(_ZTINSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE_ZTSSt9exception_ZTVSt8ios_base_ZTVSt9exception_ZTVNSt8ios_base7failureE_ZTSNSt8ios_base7failureEF_ZTVNSt3tr16detail25shared_ptr_deleter_commonE_ZTVNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE_ZTSNSt6detail14default_deleteIA0_cEE_ZTSNSt3tr16detail25shared_ptr_deleter_commonE^_ZTSNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE t_ZTSSo_ZTSSi2ninit_cnt_sPindex_iwinit_cnt_s_ZTISt8ios_base_ZTINSt3tr16detail25shared_ptr_deleter_commonE_ZTISt9exception _ZTISt15basic_streambufIcSt11char_traitsIcEEL_ZTINSt6detail14default_deleteIA0_cEE_ZTISt15basic_streambufIwSt11char_traitsIwEE_ZTINSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE!_ZTIN10Metrowerks16console_inputbufIcSt11char_traitsIcEEEm_ZTIN10Metrowerks11bufferedbufIwSt11char_traitsIwEEE_ZTIN10Metrowerks16console_inputbufIwSt11char_traitsIwEEE_ZTISt9basic_iosIcSt11char_traitsIcEE8_ZTIN10Metrowerks17console_outputbufIwSt11char_traitsIwEEE_ZTISt9basic_iosIwSt11char_traitsIwEE_ZTIN10Metrowerks17console_outputbufIcSt11char_traitsIcEEE _ZTSSt8ios_base,_ZTIN10Metrowerks11bufferedbufIcSt11char_traitsIcEEEs_ZTISt13runtime_error_ZTSSt9exception_ZTVSt9basic_iosIcSt11char_traitsIcEE_ZTVSt9basic_iosIwSt11char_traitsIwEE._ZTSSt13runtime_errorV_ZTVSt9exceptiony_ZTVSt13runtime_error_ZTISo_ZTVNSt3tr16detail25shared_ptr_deleter_commonE_ZTVNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEEY_ZTISir_ZTISt13basic_ostreamIwSt11char_traitsIwEE_ZTISt13basic_istreamIwSt11char_traitsIwEE_ZTSSt9basic_iosIcSt11char_traitsIcEE$_ZTSSt9basic_iosIwSt11char_traitsIwEE\_ZTSNSt6detail14default_deleteIA0_cEE_ZTSSt13basic_ostreamIwSt11char_traitsIwEE_ZTSSt13basic_istreamIwSt11char_traitsIwEE _ZTVSi' _ZTVSt13basic_ostreamIwSt11char_traitsIwEEd _ZTVSt13basic_istreamIwSt11char_traitsIwEE _ZTVSo _ZTSSt15basic_streambufIcSt11char_traitsIcEE _ZTSSt15basic_streambufIwSt11char_traitsIwEEN _ZTSNSt3tr16detail25shared_ptr_deleter_commonE _ZTSN10Metrowerks11bufferedbufIwSt11char_traitsIwEEE _ZTSN10Metrowerks11bufferedbufIcSt11char_traitsIcEEE4 _ZTSN10Metrowerks16console_inputbufIcSt11char_traitsIcEEE _ZTSN10Metrowerks16console_inputbufIwSt11char_traitsIwEEE _ZTSN10Metrowerks17console_outputbufIwSt11char_traitsIwEEE _ZTSN10Metrowerks17console_outputbufIcSt11char_traitsIcEEEf _ZTVSt15basic_streambufIcSt11char_traitsIcEE cout clog cerr wcout wclog wcerr2 _ZTVN10Metrowerks16console_inputbufIwSt11char_traitsIwEEE~ _ZTVSt15basic_streambufIwSt11char_traitsIwEE _ZTVN10Metrowerks16console_inputbufIcSt11char_traitsIcEEE cinwcin_ZTSNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE_ZTVN10Metrowerks17console_outputbufIwSt11char_traitsIwEEE?_ZTVN10Metrowerks11bufferedbufIwSt11char_traitsIwEEE_ZTVN10Metrowerks17console_outputbufIcSt11char_traitsIcEEE_ZTVN10Metrowerks11bufferedbufIcSt11char_traitsIcEEE(_ZTINSt3tr16detail25shared_ptr_deleter_commonE_ZTINSt6detail14default_deleteIA0_cEE_ZTISt9exception9_ZTISt11logic_error__ZTISt12out_of_range_ZTISt12length_error_ZTINSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE _ZTSSt9exception._ZTSSt11logic_errorT_ZTSSt12out_of_range{_ZTSSt12length_error_ZTVSt9exception_ZTVSt12out_of_range_ZTVSt12length_error_ZTVSt11logic_error9_ZTVNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE_ZTVNSt3tr16detail25shared_ptr_deleter_commonE_ZTSNSt6detail14default_deleteIA0_cEE_ZTSNSt3tr16detail25shared_ptr_deleter_commonEQ_ZTSNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE-E defer_locktry_to_lockn*_ZTINSt6detail14default_deleteIA0_cEE_ZTINSt3tr16detail25shared_ptr_deleter_commonE_ZTISt9exception=_ZTIN10Metrowerks21thread_resource_errorEy_ZTISt12length_error_ZTINSt3tr117bad_function_callE_ZTISt11logic_error_ZTIN10Metrowerks10lock_errorE)_ZTINSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE_ZTSSt9exception_ZTSSt11logic_error_ZTSSt12length_error_ZTVSt12length_error_ZTVN10Metrowerks21thread_resource_errorEZ_ZTVSt11logic_error_ZTVSt9exception_ZTVNSt3tr117bad_function_callE_ZTVN10Metrowerks10lock_errorE_ZTVNSt3tr16detail25shared_ptr_deleter_commonEG_ZTVNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE_ZTSN10Metrowerks10lock_errorE_ZTSNSt3tr117bad_function_callE_ZTSNSt6detail14default_deleteIA0_cEE@_ZTSN10Metrowerks21thread_resource_errorE|_ZTSNSt3tr16detail25shared_ptr_deleter_commonE_ZTSNSt3tr16detail18shared_ptr_deleterIcNSt6detail14default_deleteIA0_cEEEE% OSi_IrqThreadQueueGOS_IRQTable2OS_IRQTableOSi_IrqCallbackInfo ;M% !OSi_SystemCallbackInSwitchThreadOSi_RescheduleCountOSi_CurrentThreadPtrOSi_IsThreadInitializedlOSi_StackForDestructorOSi_ThreadInfoOSi_IdleThreadStackOSi_IdleThread!OSi_LauncherThreadX >OSiHeapInfo 9BOSi_NeedResetTimerOSi_TickCounter e ]$OSi_LtdMainParamst& q!gMMIi_NDmaConfig& [ <)PADi_XYButtonAvailable   @K sSurroundDecaysMasterPansOrgPansOrgVolume@_SNDi_DecibelSquareTableSNDi_DecibelTable u&s0|!SNDi_SharedWorkSNDi_Work9> PMi_StatusPMi_InitializedPMi_Workv PMi_LEDStatus>PMi_BlinkPatternNoPMi_BlinkPatternData+ ;$MATH_SHA256iConst @ H 1*~#cardi_common 1!cardi_rom_base)$'I2CiSlowRateTable|0} U -<?Q1g_VersionpBusContextirqHelperStack07!.g_sdio_settingl,g_pRecvMsgBufferAhcdDmaNo|g_recvMesgg_pMsgBufferg_mesg2dpcTaskStack>0r- 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FATFSi___fat_hash_table_18FATFSi___fat_primary_index_3gFATFSi___fat_hash_table_3FATFSi___fat_hash_table_4FATFSi___fat_primary_index_7FATFSi___fat_primary_cache_0FATFSi___fat_hash_table_7IFATFSi___fat_hash_table_8uFATFSi___fat_hash_table_9FATFSi___fat_hash_table_2FATFSi___fat_primary_index_2FATFSi___fat_primary_cache_2+FATFSi___mem_block_hash_table[FATFSi___rtfs_user_tableRtfsMyMutexBufFATFSi___mem_file_poolFATFSi___fat_buffer_5FATFSi___fat_buffer_4GFATFSi___fat_buffer_3oFATFSi___fat_buffer_1FATFSi___fat_buffer_0FATFSi___fat_buffer_9FATFSi___fat_buffer_8FATFSi___fat_buffer_77FATFSi___fat_buffer_6_FATFSi___mem_drobj_poolFATFSi___fat_buffer_2FATFSi___mem_finode_poolFATFSi___mem_block_pool FATFSi___mem_drives_structures$*$>AFATFSi_prompt_tableFATFSi_string_table &!FATFSi_print_buffer!#FATFSi_fatxx_d@<FATFSi_current_pdrFATFSi_enabled_drivers'FATFSi_polled_signalv  { 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