#include <revolution/os.h>void ICFreeze ( void );None.
None.
Current contents of the L1 instruction cache are locked and will not be invalidated. Hits are still serviced but misses go straight to the L2 instruction cache or 60x bus.
In PowerPC architecture jargon, this feature is referred to as locking the instruction cache. Under Revolution, we use freeze to distinguish between the locked cache and DMA features.
Cache Functions,
ICUnfreeze, DCUnfreeze, DCFreeze
2006/03/01 Initial version.
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