// Performance monitoring counters API

/*---------------------------------------------------------------------------*
  Project:     PMCPU Library
  File:        pmcpu.c

  Copyright (C) Nintendo.  All rights reserved.

  These coded instructions, statements, and computer programs contain
  proprietary information of Nintendo of America Inc. and/or Nintendo
  Company Ltd., and are protected by Federal copyright law.  They may
  not be disclosed to third parties or copied or duplicated in any form,
  in whole or in part, without the prior written consent of Nintendo.
 
 *---------------------------------------------------------------------------*/


#include <cafe.h> 
#include <stdio.h> 
#include <stdlib.h> 
#include <cafe/os/OSPerformanceMonitor.h>  
#include <cafe/pmcpu.h> 

void PMCPUSetGroup(PMCPUGroup *pmc_g, u32 e1, u32 e2, u32 e3, u32 e4) {
  u32 pm_mask = 0; 		
  pmc_g->pmc_e1     = e1; 	
  pmc_g->pmc_e2     = e2; 
  pmc_g->pmc_e3     = e3;
  pmc_g->pmc_e4     = e4; 
  
  if(pmc_g->pmc_e1) {
    pm_mask    |= PM_MASK_MMCR0; 
  }
  if(pmc_g->pmc_e2) {
    pm_mask    |= PM_MASK_MMCR0; 
  }
  if(pmc_g->pmc_e3) {
    pm_mask    |= PM_MASK_MMCR1;
  } 
  if(pmc_g->pmc_e4) {
    pm_mask    |= PM_MASK_MMCR1;
  } 
  pmc_g->pm_mask = pm_mask;  
} 


void PMCPUStartGroup(PMCPUGroup *pmc_g) { 
  u32 pm_mask=0;
  u32 mmcr0_val=0; 
  u32 mmcr1_val=0; 

  if(pmc_g->pmc_e1) {
    pm_mask    |= PM_MASK_MMCR0; 
    mmcr0_val  |= pmc_g->pmc_e1; 
  }
  if(pmc_g->pmc_e2) {
    pm_mask    |= PM_MASK_MMCR0; 
    mmcr0_val  |= pmc_g->pmc_e2;
  }
  if(pmc_g->pmc_e3) {
    pm_mask    |= PM_MASK_MMCR1;
    mmcr1_val  |= pmc_g->pmc_e3; 
  } 
  if(pmc_g->pmc_e4) {
    pm_mask    |= PM_MASK_MMCR1;
    mmcr1_val  |= pmc_g->pmc_e4; 
  } 
  pmc_g->pm_mask = pm_mask;  
  OSSetPerformanceMonitor(pm_mask, mmcr0_val, mmcr1_val, 0, 0, 0, 0); 
} 
    
void  PMCPUStopGroup(PMCPUGroup *pmc_g) {
  OSSetPerformanceMonitor(pmc_g->pm_mask, 0, 0, 0, 0, 0, 0); 
} 


void  PMCPUReadGroup(PMCPUGroup *pmc_g) { 
  if(pmc_g->pmc_e1) 
    pmc_g->pmc1 = __MFSPR(UPMC1); 
  if(pmc_g->pmc_e2) 
    pmc_g->pmc2 = __MFSPR(UPMC2); 
  if(pmc_g->pmc_e3) 
    pmc_g->pmc3 = __MFSPR(UPMC3); 
  if(pmc_g->pmc_e4) 
    pmc_g->pmc4 = __MFSPR(UPMC4);
}  
  
void  PMCPUResetGroup(PMCPUGroup *pmc_g) {
  u32 pmc_mask=0; 

  if(pmc_g->pmc_e1) 
    pmc_mask |= PM_MASK_PMC1; 
  if(pmc_g->pmc_e2) 
    pmc_mask |= PM_MASK_PMC2;
  if(pmc_g->pmc_e3)
    pmc_mask |= PM_MASK_PMC3; 
  if(pmc_g->pmc_e4)
    pmc_mask |= PM_MASK_PMC4; 
  
  OSSetPerformanceMonitor(pmc_mask, 0, 0, 0, 0, 0, 0); 
} 

void PMCPUResetStartGroup(PMCPUGroup *pmc_g) { 
  u32 pm_mask=0;
  u32 pmcr_mask=0; 
  u32 mmcr0_val=0; 
  u32 mmcr1_val=0; 

  if(pmc_g->pmc_e1) {
    pm_mask    |= PM_MASK_MMCR0; 
    mmcr0_val  |= pmc_g->pmc_e1; 
    pmcr_mask  |= PM_MASK_PMC1; 
  }
  if(pmc_g->pmc_e2) {
    pm_mask    |= PM_MASK_MMCR0; 
    mmcr0_val  |= pmc_g->pmc_e2;
    pmcr_mask  |= PM_MASK_PMC2; 
  }
  if(pmc_g->pmc_e3) {
    pm_mask    |= PM_MASK_MMCR1;
    mmcr1_val  |= pmc_g->pmc_e3; 
    pmcr_mask  |= PM_MASK_PMC3; 
  } 
  if(pmc_g->pmc_e4) {
    pm_mask    |= PM_MASK_MMCR1;
    mmcr1_val  |= pmc_g->pmc_e4; 
    pmcr_mask  |= PM_MASK_PMC4; 
  } 
  pmc_g->pm_mask = pm_mask;  
  OSSetPerformanceMonitor(pm_mask|pmcr_mask, mmcr0_val, mmcr1_val, 0, 0, 0, 0); 
}