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L3!Psg3M M !KL&|mx]֕^Qb #7ZA.4Q7_ /15Sh_{>| oDIwm ?cZ?kTx2QI=+6}m7%E&!Kz '0 P$ L@xд(Xص0`ض Lh0\t8ܷ\<Xpظ (D`|̹$<\xܺ8\x(@`|Լ4XtȽ(@XxȾ ,Ppؿ0Ll$@`|$Dd 4X0Lh  ( p  0L\  h8Ph$@\xH<< =L==(>h> 4<Ԑ<hȒL<Xl0`D@pؙd|Dpܛ<L؝, (\Ġ(h0`TģtttDl(`&M@ %4Akw 1 < G U\jxzP CV356'7/87:j=r>wFGIJKMNOZ[abefhiklmnpqrsv$w)y1z6>CKSX`hpu}fc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\addrinterface.obj:<` x xMicrosoft (R) Optimizing Compiler=cwdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windowsclC:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\bin\x86_amd64\cl.execmd-Od -IC:\nintendo\trunk\system\include -IC:\nintendo\trunk\system\src\tool\gfx\include -IC:\nintendo\trunk\system\src\tool\gfx\projects\offline\ -IC:\nintendo\trunk\system\src\cos\gfx\tcl -IC:\nintendo\trunk\system\src\cos\gfx\gx2 -IC:\nintendo\trunk\system\src\cos\gfx\tcl\headers\private\TCore -DADDR_R600_BUILD -DLITTLEENDIAN_CPU -DWIN64 -DDEBUG -D_UNICODE -DUNICODE -Gm -EHs -EHc -MTd -Foc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\ -Fdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb -W1 -WX -c -Zi -TP -wd4819 -wd4996 -nologo -errorreport:prompt -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\include" -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\atlmfc\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -Xsrc..\..\..\..\..\cos\gfx\tcl\addrinterface.cpppdbc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb22-(AddrCreate8@OpAddrCreateInHOpAddrCreateOut OreturnCode2E @(AddrDestroy8@OhLib OreturnCode(OpLib>t]X(PAddrComputeSurfaceInfo8@OhLibHOpInPOpOut(OpLib OreturnCodeFL]X(AddrComputeSurfaceAddrFromCoord8@OhLibHOpInPOpOut(OpLib OreturnCodeF$ ]X(0AddrComputeSurfaceCoordFromAddr8@OhLibHOpInPOpOut(OpLib OreturnCode: ]X(AddrComputeHtileInfo8@OhLibHIOpInPKOpOut(OpLib OreturnCodeF ]X(AddrComputeHtileAddrFromCoord8@OhLibH[OpInP]OpOut(OpLib OreturnCodeF ]X(AddrComputeHtileCoordFromAddr8@OhLibHiOpInPkOpOut(OpLib OreturnCode:l ]X(AddrComputeCmaskInfo8@OhLibHSOpInPUOpOut(OpLib OreturnCodeFD ]X(`AddrComputeCmaskAddrFromCoord8@OhLibHbOpInPdOpOut(OpLib OreturnCodeF]X(AddrComputeCmaskCoordFromAddr8@OhLibHpOpInPrOpOut(OpLib OreturnCode:]X(@AddrComputeFmaskInfo8@OhLibHOpInPOpOut(OpLib OreturnCodeF]X(AddrComputeFmaskAddrFromCoord8@OhLibH$OpInP&OpOut(OpLib OreturnCodeF]X( AddrComputeFmaskCoordFromAddr8@OhLibH+OpInP-OpOut(OpLib OreturnCode64a \"AddrGetVersion8@OhLib(uOversion OpLib6c ^(AddrUseTileIndex8@OhLib(tOuseTileIndex OpLibB]X(pAddrExtractBankPipeSwizzle8@OhLibHOpInPOpOut(OreturnCode OpLibB|]X(AddrCombineBankPipeSwizzle8@OhLibHOpInPOpOut(OreturnCode OpLib>L]X(PAddrComputeSliceSwizzle8@OhLibHOpInP OpOut(OreturnCode OpLib>YT(ElemFlt32ToDepthPixel8@OhLibHwOpInPyOpOut(OreturnCode OpLib>YT( ElemFlt32ToColorPixel8@OhLibH~OpInPOpOut(OreturnCode OpLib:|w(ElemGetExportNormHPOhLibXOpIn0tOenabled(OpLib OreturnCode>]X( AddrConvertTileInfoToHW8@OhLibH2OpInP4OpOut(OpLib OreturnCode:X]X( AddrConvertTileIndex8@OhLibH9OpInP;OpOut(OpLib OreturnCode6 ]X( AddrGetTileIndex8@OhLibH@OpInPBOpOut(OpLib OreturnCode6N IP!AddrLib::DestroyH POthis: !AddrLib::GetVersion Othis>> 9!AddrLib::UseTileIndex  Othis(tOindex@24/02)4-5`E TF GIK(L2N4P<S@T`P] Tkl"n*p2rJtLvTyXz`] T"*2JLTX`0] T"*2JLTX`] T"*2JLTX`] T"*2JLTX`] T"*2JLT"X#`] T;<">*@2BJDLFTIXJ``] T[\"^*`2bJdLfTiXj`] T|}"*2JLTX`@] T"*2JLTX`] T"*2JLTX` ] T"*2JLTXXaL  B J X\XcL  B"J$Z'^(`p] T89;*=2?JALCTFXG`] TWXZ*\2^J`LbTeXf`P] Tvwy*{2}JLTX`Y T*2FHPT` Y T*2FHPTp| d%-5HJRsw` ] T"*2JLT X ` ] T"!*#2%J'L)T,X-` ] TAB"D*F2HJJLLTOXP?*G8گ+S׾0 v 8+bQb #Z?kTx2QI=+6}m';jʝn`!XI7rHzpG| z2 E^zr. L3!Psg3M M !KL&|mx]֕^7ZA.4Q7_ /15Sh_{>| oDIwm ?c7%E&!Kz0P!NH$ I0!H$ 0!>H$ 90Lt$PtHh,Pp0\t8\  ( p  \  H<< =L==(>h>4<Ԑ<hȒL<Xl0`D@pؙd|Dpܛ<L؝, (\Ġ(h 0TģtttDl8] T"*2JLTX`] T"*2JLT"X#`] T;<">*@2BJDLFTIXJ``] T[\"^*`2bJdLfTiXj`] T|}"*2JLTX`@] T"*2JLTX`] T"*2JLTX` ] T"*2^c:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\addrlib.obj:<` x xMicrosoft (R) Optimizing Compiler=cwdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windowsclC:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\bin\x86_amd64\cl.execmd-Od -IC:\nintendo\trunk\system\include -IC:\nintendo\trunk\system\src\tool\gfx\include -IC:\nintendo\trunk\system\src\tool\gfx\projects\offline\ -IC:\nintendo\trunk\system\src\cos\gfx\tcl -IC:\nintendo\trunk\system\src\cos\gfx\gx2 -IC:\nintendo\trunk\system\src\cos\gfx\tcl\headers\private\TCore -DADDR_R600_BUILD -DLITTLEENDIAN_CPU -DWIN64 -DDEBUG -D_UNICODE -DUNICODE -Gm -EHs -EHc -MTd -Foc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\ -Fdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb -W1 -WX -c -Zi -TP -wd4819 -wd4996 -nologo -errorreport:prompt -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\include" -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\atlmfc\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -Xsrc..\..\..\..\..\cos\gfx\tcl\addrlib.cpppdbc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb6  IAddrLib::AddrLib(0Othis6$IAddrLib::AddrLib(0Othis8OhClient:{JAddrLib::~AddrLibHPOthisF~`AddrLib::~AddrLib'::`1'::dtor$0 6PKAddrLib::CreatehpOpCreateInxOpCreateOut(OpLib OreturnCodeL0tOinitValidBxs0NAddrLib::SetAddrChipFamily8@OthisHuOuChipFamilyPuOuChipRevision Ofamily:8  NAddrLib::GetAddrLibOhLibB 7-NAddrLib::ComputeSurfaceInfoOthisOpInOpOut@OreturnCode< NOxOelemModetuOexpandXpuOsliceFlagsluOwidthhuOheightPOtileInfoNullHuOexpandYDuObppJ rhVAddrLib::ComputeSurfaceAddrFromCoord(@OthisHOpInPOpOut0OreturnCode uVOtileInfoNull@OinputJ rhWAddrLib::ComputeSurfaceCoordFromAddr(@OthisHOpInPOpOut0OreturnCode WOtileInfoNull@wOinputF RH YAddrLib::ComputeSliceTileSwizzleOthisOpIn OpOut0OreturnCode uY`OtileInfoNull8NOinputFPFpZAddrLib::ExtractBankPipeSwizzleOthisOpInOpOut0OreturnCodeZPOtileInfoNull8OinputF,{[AddrLib::CombineBankPipeSwizzleOthisOpInOpOut0OreturnCode (5\`OtileInfoNull8OinputB8!`]AddrLib::ComputeFmaskInfoOthisOpInOpOut0OreturnCode04]hOtileInfoNull8gOinputJ(^AddrLib::ComputeFmaskAddrFromCoord8@OthisH$OpInP&OpOut OreturnCodeJ/_AddrLib::ComputeFmaskCoordFromAddr8@OthisH+OpInP-OpOut OreturnCodeB6p`AddrLib::ConvertTileInfoToHWHPOthisX2OpIn`4OpOut0OreturnCodeB71=0aAddrLib::ConvertTileIndex`pOthisx9OpIn;OpOut0OreturnCodewaHOhwInput8yOhwOutput>P}xDpbAddrLib::GetTileIndex8@OthisH@OpInPBOpOut OreturnCodeF]cAddrLib::ComputeSurfaceThickness dcAc$LN3Jc$LN2 ]OtileModeuOthicknessBXMcAddrLib::ComputeHtileInfo0Othis8IOpIn@KOpOuttOisWidth8tOisHeight8OreturnCode TdOtileInfoNullOinputBdW`fAddrLib::ComputeCmaskInfoOthisSOpInUOpOutpOreturnCode\`fOtileInfoNullxOinputJlb_hAddrLib::ComputeHtileAddrFromCoord0Othis8[OpIn@]OpOutxtOisWidth8ttOisHeight8pOreturnCodehGiOtileInfoNullOinputJqgmkAddrLib::ComputeHtileCoordFromAddr(@OthisHiOpInPkOpOutxtOisWidth8ttOisHeight8pOreturnCodekOtileInfoNullOinputJfmAddrLib::ComputeCmaskAddrFromCoordOthisbOpIn dOpOutpOreturnCodemOtileInfoNullxOinputJ toAddrLib::ComputeCmaskCoordFromAddr Othis(pOpIn0rOpOutpOreturnCodeoOtileInfoNullxOinputNXqAddrLib::ComputeTileDataWidthAndHeight8@OthisHuObppPuOcacheBitsX`OpTileInfo`uOpMacroWidthhuOpMacroHeight(uOheight$uOwidth uOpipesVLa\PrAddrLib::HwlComputeTileDataWidthAndHeightLinear Othis(uOpMacroWidth0uOpMacroHeight8uObpp@`OpTileInfoB!3.FrAddrLib::ComputeHtileInfoxOthisuOpitchInuOheightInuOnumSlicestOisLineartOisWidth8tOisHeight8`OpTileInfouOpPitchOutuOpHeightOut#OpHtileBytesuOpMacroWidthuOpMacroHeight#OpSliceBytesuOpBaseAlignhxOcacheBits`#OsliceBytesXuOmacroWidthTuOpipesPuObaseAlignH#OsurfBytesDxObpp@uOmacroHeight2p"O J"uPowTwoAlign8 @uOxHuOalign."RMp"`uIsPow2  uOdim2X# (uSafeAssign uOpLValuOrVal2#! )uSafeAssign #OpLVal#OrValFp$:5 vAddrLib::ComputeCmaskBaseAlign(0Othis8`OpTileInfoB0%DC`vAddrLib::ComputeCmaskBytesOthisuOpitchuOheight uOnumSlicesB'zuPvAddrLib::ComputeCmaskInfoxOthisuOpitchInuOheightInuOnumSlicestOisLinear`OpTileInfouOpPitchOutuOpHeightOut#OpCmaskBytesuOpMacroWidthuOpMacroHeightuOpBaseAlignuOpBlockMaxhuOcacheBits`#OsliceBytesXuOmacroWidthTuObaseAlignPuOmaxBlockMaxH#OsurfBytes@uOblockMax<uObpp8uOmacroHeight4OreturnCode0uOsliceJD)0yAddrLib::ComputeXmaskCoordYFromPipeX`OthishuOpipepuOx<uOpipeBit18uOyBit04uOpipeBit00uOxBit1,uOyBit1(uOnumPipes$uOxBit0 uOyN-PzAddrLib::HwlComputeXmaskCoordFromAddr Othis(#Oaddr0uObitPosition8uOpitch@uOheightHuOnumSlicesPuOfactorXtOisLinear`tOisWidth8htOisHeight8p`OpTileInfoxuOpXuOpYuOpSliceuOmacroXuOelemBitsuOheightAligneduOgroupBitsuOnumGroupBits#ObitAddruOmicroTileCoordYuOmicroX#OmacroIndexuOmicroIndexuOmacrosPerSliceuOpitchAligneduOnumPipeBitsuOmacroYuOtilesPerMacrouOpipesuOnumPipes#OelemOffsetuOmacroTilePitchuOmicroNumberuOmacroZuOmacrosPerPitch#OmacroNumberuOpipeuOmacroTileHeight#OtotalBytesuOmicroY*<.^Yp"Log28 @uOx uOyN2pAddrLib::HwlComputeXmaskAddrFromCoord(0Othis8uOpitch@uOheightHuOxPuOyXuOslice`uOnumSliceshuOfactorptOisLinearxtOisWidth8tOisHeight8`OpTileInfouOpBitPositionuOpixelOffset#OaddruOpixelBytesPerRow#OoffsetHiuOelemBitsuOnewHeightuOmacroTileIndexXuOnumGroupBits#OmacroTileOffsetuOpixelOffsetX#OoffsetLo#OsliceOffsetuOnewPitch#OsliceBytesuOnumPipeBitsuOmacroTilesPerRowuOmacroTileBytes#OtotalOffsetuOpixelOffsetYuOnumPipesuOmacroTileWidthuOmacroTileIndexY#OtotalBytesuOpipeuOmacroTileHeight#OgroupMaskR`4 AddrLib::ComputeSurfaceAddrFromCoordLinear8@OthisHuOxPuOyXuOslice`uOsamplehuObpppuOpitchxuOheightuOnumSlicesuOpBitPosition #Oaddr#OsliceOffsetOsliceSize#OpixOffset#OrowOffsetR6AddrLib::ComputeSurfaceCoordFromAddrLinear Othis(#Oaddr0uObitPosition8uObpp@uOpitchHuOheightPuOnumSlicesXuOpX`uOpYhuOpSlicepuOpSampleOsliceSizeOlinearOffsetVl9AddrLib::ComputeSurfaceCoordFromAddrMicroTiledOthis#OaddruObitPositionuObppuOpitchuOheightuOnumSamples]OtileModeuOtileBaseuOcompBits uOpX(uOpY0uOpSlice8uOpSample@uOmicroTileType"HtOisDepthSampleOrderuOpixelOffsetuOpixelCoordXuOpixelCoordZuOpixelCoordSuOmicroTileBitsuOsliceIndex#ObitAddruOmicroTileCoordY#OrowBitsuOpixelCoordY|uOmicroTileCoordX"xuOmicroTileThicknessp#OsliceBitsBD:OJAddrLib::ComputePipeFromAddr8@OthisH#OaddrPuOnumPipes$uOgroupBytes uOpipeR</AddrLib::ComputePixelIndexWithinMicroTileh < $$LN11$LN10?$LN9$LN8$LN7pOthisxuOxuOyuOzuObpp]OtileModeuOmicroTileTypeHuOpixelBit6DuOpixelBit8@uOpixelBit7<uOthickness8uOpixelBit24uOpixelBit40uOpixelNumber,uOpixelBit3(uOpixelBit0$uOpixelBit5 uOpixelBit1>\>a\AddrLib::PadDimensions8@OthisH]OtileModePuOpadDimsXtOisCube`tOcubeAsArrayhuOpPitchpuOpitchAlignxuOpHeightuOheightAlignuOpSlicesuOsliceAlign uOthickness.>>9p"0NextPow2  uOdimuOnewDim>t?61AddrLib::IsMacroTiled ]OtileModetOmacroTiled:?.)AddrLib::IsLinear ]OtileMode:@AddrLib::Bits2Number(0uObitNumuOnumberpObits_ptruOi>(BAddrLib::ComputeMipLevelX`OthishuOpWidthpuOpHeightxuOpNumSlicesOflagsOformatuOmipLevel@tOhwlHandled@$BLuOwidthHuOheightDuOslices*B. )"ДMax  uOvalue1(uOvalue2B,D3.AddrLib::ComputeBCMipLevel8@OthisHuOpWidthPuOpHeightXuOpNumSlices`OflagshOformatpuOmipLevel tOhandledB(DQ,uOwidth(uOheight$uOslices>DPAddrLib::HwlSetupTileCfgOthistOindex`OpInfo OpMode(OpType:E pAddrLib::GetNumPipesOthis`OpTileInfoB(FAddrLib::ComputeQbStereoInfo Othis(OpOuttOsuccessBlG{AddrLib::Flt32ToDepthPixel@POthisXwOpIn`yOpOut OreturnCode,FhG20uOdepthBits,uOdepthBase(uOstencilBase$uOstencilBitsB,H0AddrLib::Flt32ToColorPixel@POthisX~OpIn`OpOut0OreturnCode>H}AddrLib::GetExportNorm8@OthisHOpIn$tOenabled OreturnCode>IDpAddrLib::HwlGetTileIndex Othis@OpInBOpOutNJ6 1AddrLib::`scalar deleting destructor'( 0OthisBJ $КAddrElemLib::SetConfigFlags OthisOflags:KAddrLib::GetElemLib OthisFKAddrLib::GetSliceComputingFlags OthisFL AddrLib::GetFillSizeFieldsFlags OthisNL, '!@AddrElemLib::IsDepthStencilTilePlanar  Othis0 I$efg0I$~8J,!-q8PK$,2LTsGp!#0<|P0NxD:[gs0N $() *PN7GDCD F2IRKZPkRsU~_abc efh*j@l\nkpzrtwx~%3[m'6EYk%0F\rBWfQSZ) - Vr 2"R$Z(e*-/148&:3=:?dChDWrVW Y2\R^Zbedgiknr&t3w:yd}h~YR 2RZe{DHpZP 2RZe{BF[ 2R Ze{"(w,{-`]?@ B2ERGZKeM{PRTWZ\_$a2c\e^gsi{no^ t*DLSx_ t*DLSxpp` d*DLS0a7+H P[ -!1"`pb} T457*:D<L@SBtExFhc \UVXA_H`JcQdSfZj]kc#W@O_`f 2RZe -8hl Q #%1'@*P-/2?^CbEkqVW YQZ\_aegjl1n@qPtvycgm 2RZe -8o  2RZe -8pq d*+,--I2e4v5689?@Pra4UV6WJX\Yr3x<emwA*.8uOx,5 93:J;8`uRx,&M8ux, 8u!x, 0 v:$50`vD$Cvz '/9l n.AY#$&(-/1347(9)=F?PAXB`EqGuH0yZbd&hSp[q`zk|v~ XPz(L)7_x } c#q$*14 6C8g9;<>?A8BbC}FGIJ=KNNTV`^x T/7>HSUYp-trv%w0x<yHSeozZr+BjC Z       F   h  \; < (> G? W@ `B ~D E G H XLa b )c Ce af g h i   & 1 < G b |   9 U    U n      @O4   F J hJ\! ( ) '* /- ?1 M3 [5 8 9 : ; < = > @ A B C )D 9E JF OI ZJ gK uL M N O Q R S T U V W Y Z [ )\ 7] G^ X_ Za eb rc d e f j l m n o p q t v w +z 0| Q~ \ j x        + / a  $ E L T a | ~  - 4 X \ p0>x d!#,469H6<   ' . 1 0.$  ) p d* + / )1 D3 4 5 7 9 ; < P T ,V G\ c] a c e g h i k *l >n Op cs ut u w | ~       0Д.x$y z){3  6 A L W b p    " * . 0P$   0p$   t   % J      ("+ , . +1 E3 M7 X; < = > ? A D E J K L M O P R S T [ 4] <^ Da Ob Zd fe rf ~g j k `0 Tz { } + E M T h \    - : B I y } ?SQ| E,,Ua׾0 v 8+bQb #Z?kTx2QI=+6}m';jʝn`!XI7rHzpG| z2 E^zr. L3!Psg3M M !KL&|mx]֕^7ZA.4Q7_ /15Sh_{>| oDIwm ?c7%E&!Kz0pH$0К0$ 0H$0H$BCD0 H$HIJ0@,0$ 'D@`Dt0d 4\,d8h$8l$P 0Xl<h0\t8\ 0Tx,Pt(L<Xt(xȾ ,  ( p  \  pH<< =L==(>h>4<Ԑ<hȒL<Xl0`D@pؙd|Dpܛ<L؝, (\Ġ(h 0TģtttDl0T  ' . 1 0.$  ) p d* + / )1 D3 4 5 7 9 ; < P T ,V G\ c] a c e g bc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\addrobject.obj:<` x xMicrosoft (R) Optimizing Compiler=cwdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windowsclC:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\bin\x86_amd64\cl.execmd-Od -IC:\nintendo\trunk\system\include -IC:\nintendo\trunk\system\src\tool\gfx\include -IC:\nintendo\trunk\system\src\tool\gfx\projects\offline\ -IC:\nintendo\trunk\system\src\cos\gfx\tcl -IC:\nintendo\trunk\system\src\cos\gfx\gx2 -IC:\nintendo\trunk\system\src\cos\gfx\tcl\headers\private\TCore -DADDR_R600_BUILD -DLITTLEENDIAN_CPU -DWIN64 -DDEBUG -D_UNICODE -DUNICODE -Gm -EHs -EHc -MTd -Foc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\ -Fdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb -W1 -WX -c -Zi -TP -wd4819 -wd4996 -nologo -errorreport:prompt -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\include" -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\atlmfc\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -Xsrc..\..\..\..\..\cos\gfx\tcl\addrobject.cpppdbc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb>43AddrObject::AddrObjectOthis><: 9AddrObject::AddrObjectOthisOhClient> AddrObject::~AddrObjectOthis>oj@AddrObject::ClientAllocHP#OobjSizeXOhClient OpObjMemDa(OallocInput>(&!AddrObject::AddrMalloc(0Othis8#OobjSize>^YAddrObject::ClientFreeHPOpObjMemXOhClient,A ]OfreeInput:| &!`AddrObject::AddrFree(0Othis8OpObjMem> "AddrObject::operator new(0#OobjSize8OhClientB "AddrObject::operator delete(0OpObjMem8OhClientB< + &AddrObject::operator delete8@OpObjMem )OpObjB # "0AddrObject::SetupSysMemFuncsOallocSysMemOfreeSysMem> `AddrObject::DebugPrintX`OthishOpDebugString g@pOap OdebugPrintInputNH 6 1AddrObject::`scalar deleting destructor'( 0Othis(4'.((:546( ABp@o dGHJ!N3O;PCQKRUTeWjX0&$\]!^`^ Tcdh j2k:lDmNoYr0`&$vw!x0"$0"$8+, &80#, "p` d$.@HR`u8׾0 v 8+b@e6c';jʝn`!XI7rHzpG| z2 E^zr. L3!Psg3M M !KL&|mx]֕^7ZA.4Q7_ /15Sh_{>| oDIwm ?cHp8\0\t80X  ( p  \  H<< =L==(>h>lL0ؙ|ܛ< \Ġģoj@AddrObject::ClientAllocHP#OobjSizeXOhClient OpObjMemDa(OallocInput>(&!AddrObject::AddrMalloc(bc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\r600addrlib.obj:<` x xMicrosoft (R) Optimizing Compiler=cwdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windowsclC:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\bin\x86_amd64\cl.execmd-Od -IC:\nintendo\trunk\system\include -IC:\nintendo\trunk\system\src\tool\gfx\include -IC:\nintendo\trunk\system\src\tool\gfx\projects\offline\ -IC:\nintendo\trunk\system\src\cos\gfx\tcl -IC:\nintendo\trunk\system\src\cos\gfx\gx2 -IC:\nintendo\trunk\system\src\cos\gfx\tcl\headers\private\TCore -DADDR_R600_BUILD -DLITTLEENDIAN_CPU -DWIN64 -DDEBUG -D_UNICODE -DUNICODE -Gm -EHs -EHc -MTd -Foc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\ -Fdc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb -W1 -WX -c -Zi -TP -wd4819 -wd4996 -nologo -errorreport:prompt -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\include" -I"C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\atlmfc\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -I"C:\Program Files\Microsoft SDKs\Windows\v6.0A\include" -Xsrc..\..\..\..\..\cos\gfx\tcl\r600addrlib.cpppdbc:\nintendo\trunk\system\src\tool\gfx\projects\offline\gx2windows\x64\Debug\vc90.pdb6 )0AddrR600HwlInit(0OhClient>8ZU)PR600AddrLib::R600AddrLib(0)Othis8OhClientJD? )R600AddrLib::HwlComputeSurfaceInfo8@ )OthisHOpInPOpOut OretCodeR )R600AddrLib::HwlComputeSurfaceAddrFromCoord8@ )OthisHOpInPOpOut OretCodeR|w )R600AddrLib::HwlComputeSurfaceCoordFromAddr8@ )OthisHOpInPOpOut OretCodeFp z)@R600AddrLib::ComputeSurfaceInfo8 $LN4$LN3$LN2@ )OthisHOpInPOpOutuOnumSamplesuOpBaseAlign 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򁉜=VJ<:*}*u蘒N :IY NevJ%jNdِN %zH <&'*,-.0 $?@ADDO,ؑpTF@D̖ܖPlƠܛ,|\ğ\lĢxDTK_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 Rf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\printf.obj:<` x xMicrosoft (R) Optimizing Compiler"=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR- -EHs -EHc -Gm- -GL- -GS -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\oak\Inc -If:\dd\public\vc\inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -MT -TC -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\printf.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V2" #V__enable_percent_n)SA_No)SA_Maybe)SA_Yes)SA_Read!LPWSTRPUWSTR_C. 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-wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -MT -TC -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\vfprintf.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V2)SA_No)SA_Maybe)SA_Yes)SA_Read!LPWSTRPUWSTR_C6 H@~, vfprintf_helper@‹$LN24$LN23 $LN26v,Ooutfn OstrOformatOplocinfopOap<tObuffing8tOretval0 Ostream\ @tO_Expr_val\ b DtO_Expr_val\ m PtOfnH O_Stream c# TtO_Expr_val> vfprintf_helper$fin$00‹$LN24$LN23 $LN26v,Noutfn NstrNformatNplocinfopNap<tNbuffing8tNretval0 Nstream Ӌ@tN_Expr_val @ rDtN_Expr_val m)PtNfnH N_StreamD c3TtN_Expr_val2p B=u, _vfprintf_l8@ OstrHOformatPOplocinfoXpOap6$B=u,@ _vfprintf_s_l8@ OstrHOformatPOplocinfoXpOap6B=u, _vfprintf_p_l8@ OstrHOformatPOplocinfoXpOap.l;6, vfprintf8@ OstrHOformatPpOap2;6, vfprintf_s8@ OstrHOformatPpOap2;6,` _vfprintf_p8@ OstrHOformatPpOapaI HS+@ 2N˫/ofyRN;|4XI:P ˑQ8Y躉I[>1szhfRpNno_BqN ; 򁉜=VJ<:*}*u蘒N :IY NevJ%jNdِTVjeF%2sN %zX^V!!܈PsOI'"IPܵ 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-If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\oak\Inc -If:\dd\public\vc\inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -MT -TC -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\vsnprint.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V2)SA_No)Rf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\vsnprnc.obj:<` x xMicrosoft (R) Optimizing Compiler"=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR- -EHs -EHc -Gm- -GL- -GS -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST 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-Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc 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-If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\oak\Inc -If:\dd\public\vc\inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -MT -TC -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\memcpy_s.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V2)SA_No)SA_Maybe)SA_Yes)SA_Read!LPWSTRPUWSTR_C. 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-Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\oak\Inc -If:\dd\public\vc\inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -MT -TC -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\memmove_s.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V2)SA_No)SA_Maybe)SA_Yes)SA_Read!LPWSTRPUWSTR_C2 ,V memmove_sX`Odsth#OsizeInBytesp*Osrcx#Ocount\8 V 0tO_Expr_val\l SW 4tO_Expr_val\ W 8tO_Expr_valPI:P ˑQ8Y躉I[>1szhfRJ<:*}*u蘒/LnjٟdQKPC'HU6Lp<дC% Lba arǃP cT5b A VKNYS#u.O]vu=q*PsOI'"IPܵ Š{P$JM0;4Xw*MD4fO( ^sdM^Iakytp[O:ac|M  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_bad_alloc_Message2 *8 operator newHP#Osize OpV8  :VnomemB 9 4209 std::bad_alloc::bad_alloc( 0-Othisb `operator new'::`6'::`dynamic atexit destructor for 'nomem''( uV$S1vvK5ALo$-wj^)~?;Nw`lUr3{EvwEH{?mi ~wc[|ye R کV1馘K}2w{b?@BC(09 90~/l  ( p  \  H<< =L==(>h>lp0ؙ\pPoft (R) Optimizing Compiler*=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ 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P,Q RTUH@ 3P<Z[]!_#a.c8 P,i jlmH 3P<rsu!w#y.{8` P, H 3P<!#.8@ P, H 3P<!#.8 P, H 3P<!#.8 P, H 3P<!#.8 P, H 3P<!#.8 P, H` 3P<!# . 8 P, H@ 3P<!#!.#8 P,) *,-H 3P<235!7#9.;0` *P$@A%B0  P$GH I0 AP$O P<Q0 7P$UV2W00 AP$] ^<_0 ;P$de6fh  ( p  \  H<< =L==(>h>\x1d,ؑ, p@\\̖ܖPl̛,|\ğ\p\$lĢDxD@T,H`|0Ld4Ph_b! ٮhLba arǃMD4fO( ^sdpNno_BqJS wS?AڣȉuO[dqq!oo6+kP cT5b A VKNYS#u.RN;|4X~S{ۛ]ZF|M  $HX*zEH?E.iJU2N˫/ofyN :IY Fi*{yȧyFihoJLy9cKMiQkڰ'W<$QX`' e\BK&mum՗_nVvM'UotQ 6$>Im!a$xN ; 򁉜=VaI HS+@ O]vu=q*I:P ˑQ8Y躉 C?ݦeG酃KW" I[>1szhfR8P U,7 89P:0`P $?@A0P &$GH!I0P $N OP0P &$VW!X0Q $] ^_0 Q &$ef!g0PQ $l mn0pQ &$tu!v0Q ${ |}0Q &$!0Q $ 0R &$!0@R $ 0`R &$!0R $ 0R &$!0R $ 0S &$!00S $ 0PS &$!0S $ 0S &$!0S $ 0S -$ (0 T J$E0pT @$ ;0T J$E0U @$  ; t  ( p  \  H<< =L==(>h>\xd,ؑ, p@\\̖ܖPlؙ̛,|\ğ\p\$lĢDxD@T (D`x0Hd|4LhdQKtK@ixnEaDxLba arǃz3&XMD4fO( ^sdpNno_BqQ]@u{3JJS wS?Aڣȉ6+kP cT5b A VKNYS#u.RN;|4X~S{ۛ]Zf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\atodbl.obj:<` x xMicrosoft (R) Optimizing Compiler:=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\atodbl.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V22 (q - _atodbl_l :O -OdpOstrOplocinfoh,O_loc_updateX-Old12HOEndPtrDuOretval1@,Oretval2. % -P _atodbl(0 -Od8pOstr2 (t- _atoldbl_l :O-OdpOstrOplocinfoh,O_loc_updateX-Old12HOEndPtrDuOretval1@,Oretval2. % - _atoldbl(0-Od8pOstr2, (q-@ _atoflt_l :O-OdpOstrOplocinfoh,O_loc_updateX-Old12HOEndPtrDuOretval1@,Oretval2. % -Э _atoflt(0-Od8pOstr>RSJ/{nMD4fO( ^sdpNno_BqK&mum՗_nVvQ-FwJN %z!{煉}˛aLp<дC% A@UbA&lT{~=>) ^>OAz8 !\9Kin8:q"&XhCNevJ%jNdِ0BCdN)UF<9H 7V>6+kPC'HU6rRqw9㮯Ij$R#c(#6 "CJS wS?AڣȉO]\W2ebGCuO[dqq!ooPsOI'"Im!a$xN ; 򁉜=VaI HS+@ O]vu=q*I:P ˑQ8Y躉 C?ݦeG酃KW" I[>1szhfRM^Iakytp[O:acJ<:*}*u蘒g=b_͹.E園Wh=\syO?%34ƕHP cT5b A VKNYS#u.yFihoJLy9cKMiQkڰ'W<$QX`' e\B/LnjٟdQKtK@ixnEaDxLba arǃ ((+0,8/J789:;<=>? @,A7BUDqE0P %$IJ K S(V0W8ZJabcdefghij/k:lXnto0 %$st u@ }(08J ,7Uq0Э %$   ( p  \  H<< =L==(>h>\x4Od,ؑ, p@\\̖ܖPlƠ,|\ğ\p\$lĢDxD@TTl(t- _atoldbl_l :O-OdpOstrOplocinfoh,O_loc_updateX-Old12HOEndPtrDuOretval1@,Oretval2. % - _atoldbl(0-Od8pOstr2, (q-@ _atoflt_l :O-OdpOstrOplocinfoh,O_loc_updateX-Old12HOEndPtr^f:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\iswctype.obj:<` x xMicrosoft (R) Optimizing Compiler:=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\iswctype.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V22-_iswctype_lx!Oc!OmaskOplocinfo@!Od~H,O_loc_update.x -iswctypeX`!Och!Omaskt E@!Od2 "-`is_wctype(0!Oc8!OmaskMD4fO( ^sdpNno_BqK&mum՗_nVvQ-FwJQ]@u{3JN %zLp<дC% A@UbA&lJS wS?Aڣȉ{bxnɢByO*xo5uO[dqq!ooTVjeF%2s9Kin8:q"&XhCNevJ%jNdِrRqw9㮯Ij$R#c(#6 "C0BCdN)UF<9H 7V>6+kW^{"Ljg{4~Ce Im!a$xN ; 򁉜=VaI HS+@ O]vu=q*I:P ˑQ8Y躉 C?ݦeG酃KW" I[>1szhfRM^Iakytp[O:acJ<:*}*u蘒P cT5b A VKNYS#u.yFihoJLy9cKMiQkڰ'W<$QX`' e\B/LnjٟdQKtK@ixnEaDxLba arǃx lBE$F0G?HaIcKuUVWYZh \`ac!e-gFjOuvyz0`"$$  ( p  \  H<< =L==(>h> \x1$L d,ؑ, p@\\̖ܖPl̛ܛd,|\ğ\p\$lĢDxD@TD`xs\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\iswctype.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V22Zf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\isctype.obj:<` x xMicrosoft (R) Optimizing Compiler:=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ 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򁉜=VaI HS+@ O]vu=q*I:P ˑQ8Y躉 C?ݦeG酃KW" I[>1szhfRM^Iakytp[O:acJ<:*}*u蘒>RSJ/{nP cT5b A VKNYS#u./LnjٟdQKtK@ixnEaDxLba arǃyFihoJLy9cKMiQkڰ'W<$QX`' e\BS8zG;޹4MD4fO( ^sdpNno_BqBj57':<=#?VAyCDEFGH I JL MDObP0D#$V WX  ( p  \  H<< =L==(>h>\xOd,ؑ, p@\\̖ܖPlƠ,|\ğ\p\$lĢDxD@TIf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\mbschr.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V22^f:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\mbsnbcmp.obj:<` x xMicrosoft (R) Optimizing Compiler:=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\mbsnbcmp.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V22` skq- _mbsnbcmp_l $testOs1Os2#OnOplocinfo8,O_loc_update4!Oc20!Oc1( XtO_Expr_val\ G \tO_Expr_val2 /*s- _mbsnbcmp(0Os18Os2@#OnK&mum՗_nVvQ-FwJ>OAz8 !\N %zLp<дC% A@UbA&l~LS3 S"Y<%`PC'HU6Q]@u{3J~QzȰ?9Kin8:q"&XhCNevJ%jNdِ~S{ۛ]ZF0BCdN)UF<9H 7V>6+kuO[dqq!ooIm!a$x>RSJ/{nN ; 򁉜=VaI HS+@ O]vu=q*I:P ˑQ8Y躉 C?ݦeG酃KW" I[>1szhfRM^Iakytp[O:acJ<:*}*u蘒P cT5b A VKNYS#u./LnjٟdQKtK@ixnEaDxLba arǃyFihoJLy9cKMiQkڰ'W<$QX`' e\BS8zG;޹4MD4fO( ^sdpNno_Bq s25&6-8?:S;>7?A C0DSF^HeIJLO:P]RhToUqWX[\/^8_P`Ubkc0 /$jk*l  ( p  \  H<< =L==(>h>\xOd,ؑ, p@\\̖ܖPlƠ,|\ğ\p\$lĢDxD@Tblic\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\mbsnbcmp.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V22^f:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\mbsnbicm.obj:<` x xMicrosoft (R) Optimizing Compiler:=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\cpp_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\mbsnbicm.cpdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcmtd.pdb_*COR_VERSION_MAJOR_V22` q-@ _mbsnbicmp_l= $testOs1Os2#OnOplocinfo8,O_loc_update4!Oc20!Oc1( ܊ XtO_Expr_val\ \tO_Expr_val2 /*s- _mbsnbicmp(0Os18Os2@#OnK&mum՗_nVvQ-FwJ>OAz8 !\N %zLp<дC% A@UbA&l~LS3 S"Y<%`PC'HU6Q]@u{3J)σg,αt9Kin8:q"&XhCNevJ%jNdِ~S{ۛ]ZF0BCdN)UF<9H 7V>6+kuO[dqq!ooIm!a$x>RSJ/{nN ; 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-If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\uncaught.cpppdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb" ;_bad_alloc_Message>L 0Nstd::uncaught_exception(hwc[|ye R کV1馘K}2=08ȩhӐBҍ=V`%Ls ̲#x  |j]PsOI'"IPܵ Š{P$JM0;4Xw*Nw`lUr3{EvwEH{?mi ~x*沙K҈h-w{h>\l0Rf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\xdebug.obj:<` x xMicrosoft (R) Optimizing Compiler.=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\xdebug.cpppdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb" :_bad_alloc_Message _DebugHeapTag2o5Eoperator newHP#OszXm5Otag`pOfilehtOline OpVE :fnomembp `operator new'::`5'::`dynamic atexit destructor for 'nomem''(6 61o5 Foperator new[](0#Osz8m5Otag@pOfileHtOline6 .)q5`Foperator delete(0Op8m5Otag@pO__formalHtO__formal:x 61q5Foperator delete[](0Op8m5Otag@pOfileHtOline> r5Fstd::_DebugHeapTag_func uf$S1H#x  |j]PC'HU6PT͍S닪Od;; l;ZcV`%Ls ̲vǾQb @w{h> lpؑ0 ؙ̖ܛ\\ p<X, -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\xdebug.cpppdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb" :_bad_alloc_Message _DebugHeapRf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\xlock.obj:<` x xMicrosoft (R) Optimizing Compiler.=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\xlock.cpppdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb s5gmtx :init 3ginitlocks& initlocks$initializer$_*COR_VERSION_MAJOR_V2F` [3Fstd::_Init_locks::_Init_locks8@3OthisL6G tOcountF [ V3@Gstd::_Init_locks::~_Init_locks8@3Othis 6`G tOcountJ\ [ V3Gstd::_Init_locks::_Init_locks_ctor8@3O_This X 6G tOcountJ [ V3Hstd::_Init_locks::_Init_locks_dtor8@3O_This` 6 H tOcount> * %`Hstd::_Lockit::_Lockit(0Othis> G BHstd::_Lockit::_Lockit(0Othis8tOkind> 3 .Hstd::_Lockit::~_Lockit(0OthisB   Istd::_Lockit::_Lockit_ctor(0O_ThisB ; 6@Istd::_Lockit::_Lockit_ctor(0O_This8tOkindB) $Istd::_Lockit::_Lockit_dtor(0O_ThisB)$Istd::_Lockit::_Lockit_ctor(0tOkindB )$Istd::_Lockit::_Lockit_dtor(0tOkindR!std::`dynamic initializer for 'initlocks''(V std::`dynamic atexit destructor for 'initlocks''(h9Kin8:q"&XhCNevJ%jNdِ0BCdN)UF<9H 7V>6+kĐ+ldǑm.=DRN;|4X|M  $HX*zE}oa_^ڲ5Im!a$xN ; 򁉜=VaI HS+@ O]vu=q*I:P ˑQ8Y躉Seկ_Mc C?ݦeG酃KW" I[>1szhfRPsOI'"M^Iakytp[O:acJ<:*}*u蘒IPܵ Š{P$JM0;4Xw*P cT5b A VKNYS#u./LnjٟdQKtK@ixnEaDxLba arǃx*沙K҈h-w{?"@=A8H3`,D EF.G0 I`$L MN8@I;`,Q RS6T0I)`$W X$Y0I)`$]^$_0I)`$cd$e !`1$0  ( p  \  H<< =L==(>h>xii,ؑF@ܖPlؙi̛Td,|h\ğ\lĢDxD@TX@d<h_Lockit::_Lockit_ctor(0O_ThisB ; 6@Istd::_Lockit::_Lockit_ctor(0O_This8tOkindB) $Istd::_Lockit::_Lockit_dtor(0O_ThisB)$Istd::_Lockit::_Lockit_ctor(0tOkindB )$Istd::_Lockit::_Lockit_dtor(0tOkindR!std::`dynamic initializer for 'initlocks''(V std::`dynamic atexit destructor for 'initlocks''(Rf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\xmutex.obj:<` x xMicrosoft (R) Optimizing Compiler.=cwdf:\dd\vctools\crt\postbuild\xmtclf:\binaries.amd64ret\bin\x86_amd64\CL.EXEcmd-c -nologo -Od -Oi- -Oy- -Gd -GR -EHs -EHc -Gm- -GL- -GS -TP -Fdf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb -Fof:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj\ -D_RTC -D_MBCS -D_MB_MAP_DIRECT -D_CRTBLD -D_FN_WIDE -DWINHEAP -D_CRT_CHECK_MANIFEST -D_STL_NOFORCE_MANIFEST -D_CRT_NOFORCE_MANIFEST -DWIN32_LEAN_AND_MEAN -D_WIN32_WINDOWS=0x501 -D-D-DNOSERVICE -DWIND32 -DWIN64 -DWIN32 -DNT_UP=1 -DDEVL=1 -D_WIN32_WINNT=0x0501 -D_WIN32_IE=0x0600 -DWINNT=1 -DNT_INST=0 -DCONDITION_HANDLING=1 -D__BUILDMACHINE__=SP -DNTDDI_VERSION=0x05020100 -D_AMD64_ -D_AMD64_SIMULATOR_ -D_AMD64_SIMULATOR_PERF_ -D_AMD64_WORKAROUND_ -D_WIN64 -DAMD64 -D_SKIP_IF_SIMULATOR_ -D_DEBUG -DDBG=1 -D_NEW_SDK=1 -DOFFICIAL_BUILD=0 -DBETA=0 -DFX_VER_PRIVATEBUILD_STR=DDBLD400 -DURTBLDENV_FRIENDLY=Debug -DFX_BRANCH_SYNC_COUNTER_VALUE=0 -D_MT=1 -FIddbanned.h -If:\dd\vctools\crt\postbuild\xmt -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\vctools\LangAPI\include -If:\dd\public\Internal\VCTools\include -If:\dd\public\vc\inc -If:\dd\public\vc\inc\atlmfc -If:\dd\vctools\nonship\inc -If:\binaries.amd64ret\inc -If:\binaries.amd64ret\atlmfc\include -If:\dd\public\sdk\inc -If:\dd\public\sdk\inc\internal -If:\dd\public\DevDiv\inc -If:\dd\public\ddk\inc -If:\dd\public\Internal\VSCommon\Inc -If:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\xmt_obj -If:\dd\public\vc\inc -If:\dd\public\oak\Inc -Zc:wchar_t -Zc:forScope- -Zi -W3 -wd4272 -wd4951 -wd4952 -wd4953 -wd4960 -wd4961 -wd4603 -wd4627 -FC -WX -Zl -Zp8 -GF -Gy -d1Binl -MT -Xsrcf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\xmutex.cpppdbf:\dd\vctools\crt_bld\SELF_64_amd64\crt\src\build\amd64\libcpmtd.pdb" ;_bad_alloc_Message_*COR_VERSION_MAJOR_V2:xQ LMstd::_Mutex::_Mutex8@Othis:( #pMstd::_Mutex::~_Mutex(0Othis:`  Mstd::_Mutex::_Lock(0Othis:  Mstd::_Mutex::_Unlock(0Othis>L L GMstd::_Mutex::_Mutex_ctor8@O_This> ( #0Nstd::_Mutex::_Mutex_dtor(0O_This><  `Nstd::_Mutex::_Mutex_Lock(0O_ThisB  Nstd::_Mutex::_Mutex_Unlock(0O_ThisRD 3Nstd::_DebugHeapDelete<_RTL_CRITICAL_SECTION>(0*O_Ptr#x  |j]0BCdN)UF<PC'HU69H 7V>6+kPT͍S닪Od;;RN;|4X|M  $HX*zEH?E.iJU2N˫/ofy l;ZcN :IY V`%Ls ̲=Fd"uY}oa_^ڲ5Im!a$xaI HS+@ I:P ˑQ8Y躉I[>1szhfRJ<:*}*u蘒N %zLp<дC% A@UbA&lTVjeF%2sK&mum՗_nVvNw`lUr3{EvQ-FwJwEH{?mi ~wc[|ye R کV1馘K}2yFihoJLy9cKMWҊJyGiQkڰ'W<$Z ߉2NQX`' e\Bf1_'%,..aً: 7^Qr3TX^V!!܈9Kin8:q"&XhC.=-; x`NevJ%jNdِT]U'S^$G0MQ $ : G8pM( , #0M $ 0M $ 8ML ," #:$G%80N( ,( )*#+0`N $. /00N $3 458N (,7 8=?T  ( p  \  H<< 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GX2_STAT_CB_CC_IB_TB_FRAG_VALIDB_READYB:A@GX2_STAT_VGT_VGT_SPI_ESTHREAD_EVENT_WINDOW_ACTIVE"A!GX2_STAT_CB_CC_SF_FULLUGX2_CLEAR_DEPTH_D_REG*A@GX2_STAT_VGT_VGT_SPI_ESVERT_VALID"A"GX2_STAT_CB_CC_RB_FULL*A@GX2_STAT_VGT_VGT_SPI_ESVERT_EOV"U GX2_CLEAR_STENCIL_S_REG.A@GX2_STAT_VGT_VGT_SPI_ESVERT_STALLED"UGX2_CLEAR_BOTH_D_S_REG*A#GX2_STAT_CB_FC_RDLAT_FIFO_FULL2A@GX2_STAT_VGT_VGT_SPI_ESVERT_STARVED_BUSY"A$GX2_STAT_CB_CM_TQ_FULL&A%GX2_STAT_CB_LQUAD_NO_TILE2A@GX2_STAT_VGT_VGT_SPI_ESVERT_STARVED_IDLE&A&GX2_STAT_CB_CM_CACHE_HIT.A@GX2_STAT_VGT_VGT_SPI_ESVERT_STATIC2A@GX2_STAT_VGT_VGT_SPI_ESTHREAD_IS_EVENT*A'GX2_STAT_CB_CM_CACHE_TAG_MISS.A@GX2_STAT_VGT_VGT_SPI_ESTHREAD_SEND.A(GX2_STAT_CB_CM_CACHE_SECTOR_MISS*#GX2_SURFACE_FORMAT_TC_R8_UNORM2A)GX2_STAT_CB_CM_CACHE_REEVICTION_STALL*A @GX2_STAT_VGT_VGT_SPI_GSPRIM_VALID>A*GX2_STAT_CB_CM_CACHE_EVICT_NONZERO_INFLIGHT_STALL&#GX2_SURFACE_FORMAT_TC_R8_UINT*A @GX2_STAT_VGT_VGT_SPI_GSPRIM_EOV:A+GX2_STAT_CB_CM_CACHE_EVICT_NONRESIDENT_STALL*A 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GX2_SURFACE_FORMAT_TC_R5_G5_B5_A1_UNORM>A9GX2_STAT_CB_FC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL.A@GX2_STAT_VGT_VGT_SPI_VSVERT_STATIC2# GX2_SURFACE_FORMAT_TC_R4_G4_B4_A4_UNORM2# GX2_SURFACE_FORMAT_TC_A1_B5_G5_R5_UNORM2A:GX2_STAT_CB_FC_CACHE_READ_OUTPUT_STALL2A@GX2_STAT_VGT_VGT_SPI_VSTHREAD_IS_EVENT2A;GX2_STAT_CB_FC_CACHE_WRITE_OUTPUT_STALL.A@GX2_STAT_VGT_VGT_SPI_VSTHREAD_SEND2A@GX2_STAT_VGT_VGT_PA_EVENT_WINDOW_ACTIVE2AGX2_STAT_CB_CC_CACHE_HIT.A@GX2_STAT_VGT_VGT_PA_CLIPV_FIRSTVERT*A?GX2_STAT_CB_CC_CACHE_TAG_MISS*A@GX2_STAT_VGT_VGT_PA_CLIPV_STALLED.A@GX2_STAT_CB_CC_CACHE_SECTOR_MISS2A @GX2_STAT_VGT_VGT_PA_CLIPV_STARVED_BUSY.#GX2_SURFACE_FORMAT_TC_R16_G16_SNORM2A!@GX2_STAT_VGT_VGT_PA_CLIPV_STARVED_IDLE2AAGX2_STAT_CB_CC_CACHE_REEVICTION_STALL*A"@GX2_STAT_VGT_VGT_PA_CLIPV_STATIC>ABGX2_STAT_CB_CC_CACHE_EVICT_NONZERO_INFLIGHT_STALL.#GX2_SURFACE_FORMAT_TC_R16_G16_FLOAT*#GX2_SURFACE_FORMAT_D_D24_S8_UNORM:ACGX2_STAT_CB_CC_CACHE_EVICT_NONRESIDENT_STALL*A#@GX2_STAT_VGT_VGT_PA_CLIPP_SEND>ADGX2_STAT_CB_CC_CACHE_REPLACE_PENDING_EVICT_STALL&A$@GX2_STAT_VGT_VGT_PA_CLIPP_EOP>AEGX2_STAT_CB_CC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL.A%@GX2_STAT_VGT_VGT_PA_CLIPP_IS_EVENT2AFGX2_STAT_CB_CC_CACHE_READ_OUTPUT_STALL*#GX2_SURFACE_FORMAT_D_D24_S8_FLOAT.A&@GX2_STAT_VGT_VGT_PA_CLIPP_NULL_PRIM2AGGX2_STAT_CB_CC_CACHE_WRITE_OUTPUT_STALL2#GX2_SURFACE_FORMAT_TC_R11_G11_B10_FLOAT2A'@GX2_STAT_VGT_VGT_PA_CLIPP_NEW_VTX_VECT*A(@GX2_STAT_VGT_VGT_PA_CLIPP_STALLED6#GX2_SURFACE_FORMAT_TCS_R10_G10_B10_A2_UNORM2AHGX2_STAT_CB_CC_CACHE_ACK_OUTPUT_STALL2A)@GX2_STAT_VGT_VGT_PA_CLIPP_STARVED_BUSY6AIGX2_STAT_CB_CC_CACHE_WA_TO_RMW_CONVERSION&AJGX2_STAT_CB_CC_CACHE_FLUSH2A*@GX2_STAT_VGT_VGT_PA_CLIPP_STARVED_IDLE2#GX2_SURFACE_FORMAT_T_R10_G10_B10_A2_SNORM*AKGX2_STAT_CB_CM_MC_READ_REQUEST*A+@GX2_STAT_VGT_VGT_PA_CLIPP_STATIC*A,@GX2_STAT_VGT_VGT_PA_CLIPS_SEND*ALGX2_STAT_CB_FC_MC_READ_REQUEST*A-@GX2_STAT_VGT_VGT_PA_CLIPS_STALLED2#GX2_SURFACE_FORMAT_TCS_R8_G8_B8_A8_UNORM*AMGX2_STAT_CB_CC_MC_READ_REQUEST2A.@GX2_STAT_VGT_VGT_PA_CLIPS_STARVED_BUSY*ANGX2_STAT_CB_CM_MC_WRITE_REQUEST2#GX2_SURFACE_FORMAT_TC_R8_G8_B8_A8_UINT*AOGX2_STAT_CB_FC_MC_WRITE_REQUEST2A/@GX2_STAT_VGT_VGT_PA_CLIPS_STARVED_IDLE2#GX2_SURFACE_FORMAT_TC_R8_G8_B8_A8_SNORM*A0@GX2_STAT_VGT_VGT_PA_CLIPS_STATIC*APGX2_STAT_CB_CC_MC_WRITE_REQUEST2#GX2_SURFACE_FORMAT_TC_R8_G8_B8_A8_SINT6A1@GX2_STAT_VGT_RBIU_FIFOS_EVENT_WINDOW_ACTIVE2#GX2_SURFACE_FORMAT_TCS_R8_G8_B8_A8_SRGB6AQGX2_STAT_CB_CM_MC_READ_REQUESTS_IN_FLIGHT6#GX2_SURFACE_FORMAT_TCS_A2_B10_G10_R10_UNORM6ARGX2_STAT_CB_FC_MC_READ_REQUESTS_IN_FLIGHT*A2@GX2_STAT_VGT_RBIU_IM_FIFO_STARVED*A3@GX2_STAT_VGT_RBIU_IM_FIFO_STALLED6ASGX2_STAT_CB_CC_MC_READ_REQUESTS_IN_FLIGHT*A4@GX2_STAT_VGT_RBIU_DR_FIFO_STARVED6ATGX2_STAT_CB_CM_MC_WRITE_REQUESTS_IN_FLIGHT6AUGX2_STAT_CB_FC_MC_WRITE_REQUESTS_IN_FLIGHT*A5@GX2_STAT_VGT_RBIU_DR_FIFO_STALLED6AVGX2_STAT_CB_CC_MC_WRITE_REQUESTS_IN_FLIGHT*A6@GX2_STAT_VGT_RBIU_DI_FIFO_STARVED&AWGX2_STAT_CB_CC_SURFACE_SYNC*A7@GX2_STAT_VGT_RBIU_DI_FIFO_STALLED"A8@GX2_STAT_VGT_MC_LAT_BIN_0.AXGX2_STAT_CB_TWO_PROBE_QUAD_FRAGMENT.#GX2_SURFACE_FORMAT_TC_R32_G32_FLOAT.AYGX2_STAT_CB_SLOW_MODE_QUAD_FRAGMENT"A9@GX2_STAT_VGT_MC_LAT_BIN_16#GX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_UNORM6AZGX2_STAT_CB_DUAL_SOURCE_COLOR_QUAD_FRAGMENT"A:@GX2_STAT_VGT_MC_LAT_BIN_2"A[GX2_STAT_CB_DRAWN_QUAD"A;@GX2_STAT_VGT_MC_LAT_BIN_36#GX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_SNORM"A<@GX2_STAT_VGT_MC_LAT_BIN_4"A\GX2_STAT_CB_DRAWN_PIXEL"A=@GX2_STAT_VGT_MC_LAT_BIN_5*A]GX2_STAT_CB_DRAWN_QUAD_FRAGMENT"YDESCKIND_IMPLICITAPPOBJ"A>@GX2_STAT_VGT_MC_LAT_BIN_62A^GX2_STAT_CB_BLENDER_RAW_HAZARD_STALL6# GX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_FLOATA_GX2_STAT_CB_EVENT"A?@GX2_STAT_VGT_MC_LAT_BIN_7A@@GX2_STAT_VGT_VGT_BUSY.A`GX2_STAT_CB_EVENT_CACHE_FLUSH_TS*AaGX2_STAT_CB_EVENT_CONTEXT_DONE"AA@GX2_STAT_VGT_VGT_GS_BUSY6##GX2_SURFACE_FORMAT_TC_R32_G32_B32_A32_FLOAT.AB@GX2_STAT_VGT_ESVERT_STALLED_ES_TBL*AbGX2_STAT_CB_EVENT_CACHE_FLUSH:AcGX2_STAT_CB_EVENT_CACHE_FLUSH_AND_INV_TS_EVENT.AC@GX2_STAT_VGT_ESVERT_STALLED_GS_TBL6AdGX2_STAT_CB_EVENT_CACHE_FLUSH_AND_INV_EVENT.AD@GX2_STAT_VGT_ESVERT_STALLED_GS_EVENT.AE@GX2_STAT_VGT_ESVERT_STALLED_GSPRIM6AeGX2_STAT_CB_EVENT_FLUSH_AND_INV_CB_DATA_TS.AF@GX2_STAT_VGT_GSPRIM_STALLED_ES_TBL2AfGX2_STAT_CB_EVENT_FLUSH_AND_INV_CB_META.AG@GX2_STAT_VGT_GSPRIM_STALLED_GS_TBL*AgGX2_STAT_CB_CMASK_READ_DATA_0XC*AhGX2_STAT_CB_CMASK_READ_DATA_0XD.AH@GX2_STAT_VGT_GSPRIM_STALLED_GS_EVENT*AiGX2_STAT_CB_CMASK_READ_DATA_0XE.AI@GX2_STAT_VGT_GSPRIM_STALLED_ESVERT*AjGX2_STAT_CB_CMASK_READ_DATA_0XF2AJ@GX2_STAT_VGT_ESTHREAD_STALLED_ES_RB_FULL.AkGX2_STAT_CB_CMASK_WRITE_DATA_0XC.AK@GX2_STAT_VGT_ESTHREAD_STALLED_SPI_BP.AL@GX2_STAT_VGT_COUNTERS_AVAIL_STALLED.AlGX2_STAT_CB_CMASK_WRITE_DATA_0XD*#GX2_SURFACE_FORMAT_T_NV12_UNORM.AmGX2_STAT_CB_CMASK_WRITE_DATA_0XE"#GX2_SURFACE_FORMAT_FIRST2AM@GX2_STAT_VGT_GS_RB_SPACE_AVAIL_STALLED.AnGX2_STAT_CB_CMASK_WRITE_DATA_0XF*AN@GX2_STAT_VGT_GS_ISSUE_RTR_STALLED"#?GX2_SURFACE_FORMAT_LAST&AO@GX2_STAT_VGT_GSTHREAD_STALLED&AoGX2_STAT_CB_CORE_SCLK_VLD&ApGX2_STAT_CB_REG_SCLK_VLD.AP@GX2_STAT_VGT_ES_CACHE_INVLD_STALLEDGX2_TILE_MODE_DEFAULT.AQ@GX2_STAT_VGT_WAIT_FOR_ES_DONE_STALLED"[ BINDSTRING_POST_COOKIE*AR@GX2_STAT_VGT_CM_STALLED_BY_GOG&GX2_TILE_MODE_LINEAR_SPECIAL& GX2_TILE_MODE_DEFAULT_FIX2197*AGX2_STAT_DB_SC_DB_TILE_SENDS*AS@GX2_STAT_VGT_CM_READING_STALLED2AT@GX2_STAT_VGT_CM_STALLED_BY_GSFETCH_DONE&AGX2_STAT_DB_SC_DB_TILE_BUSY&GX2_TILE_MODE_LINEAR_ALIGNED&GX2_TILE_MODE_1D_TILED_THIN1*AGX2_STAT_DB_SC_DB_TILE_STALLS*AU@GX2_STAT_VGT_GOG_VS_TBL_STALLED*[BINDSTRING_FLAG_BIND_TO_OBJECT&GX2_TILE_MODE_1D_TILED_THICK*AV@GX2_STAT_VGT_GOG_OUT_INDX_STALLED*AGX2_STAT_DB_SC_DB_TILE_EVENTS*AW@GX2_STAT_VGT_GOG_OUT_PRIM_STALLED*AGX2_STAT_DB_SC_DB_TILE_TILES&GX2_TILE_MODE_2D_TILED_THIN1*AX@GX2_STAT_VGT_GS_RB_INVLD_STALLED&GX2_TILE_MODE_2D_TILED_THIN2*AGX2_STAT_DB_SC_DB_TILE_COVERED*AGX2_STAT_DB_HIZ_TC_READ_STARVED&GX2_TILE_MODE_2D_TILED_THIN4AY@GX2_STAT_VGT_GOG_BUSY*AGX2_STAT_DB_HIZ_TC_WRITE_STALL*AZ@GX2_STAT_VGT_REUSED_VS_INDICES&GX2_TILE_MODE_2D_TILED_THICK*AGX2_STAT_DB_HIZ_QTILES_CULLED*A[@GX2_STAT_VGT_SCLK_REG_VLD_EVENT&GX2_TILE_MODE_2B_TILED_THIN1*A GX2_STAT_DB_HIS_QTILES_CULLED& GX2_TILE_MODE_2B_TILED_THIN2*A\@GX2_STAT_VGT_SCLK_INPUT_VLD_EVENT*A GX2_STAT_DB_DB_SC_TILE_SENDS& GX2_TILE_MODE_2B_TILED_THIN4*A]@GX2_STAT_VGT_SCLK_CORE_VLD_EVENT&A GX2_STAT_DB_DB_SC_TILE_BUSY& GX2_TILE_MODE_2B_TILED_THICK*A^@GX2_STAT_VGT_SCLK_INVAL_VLD_EVENT*A GX2_STAT_DB_DB_SC_TILE_STALLS*A_@GX2_STAT_VGT_SCLK_GS_VLD_EVENT& GX2_TILE_MODE_3D_TILED_THIN1.A GX2_STAT_DB_DB_SC_TILE_DF_STALLS& GX2_TILE_MODE_3D_TILED_THICK*AGX2_STAT_DB_DB_SC_TILE_TILES&GX2_TILE_MODE_3B_TILED_THIN1APGX2_STAT_SQ_NONE*AGX2_STAT_DB_DB_SC_TILE_CULLED&GX2_TILE_MODE_3B_TILED_THICK.AGX2_STAT_DB_DB_SC_TILE_HIER_KILLAPGX2_STAT_SQ_CYCLES"APGX2_STAT_SQ_BUSY_CYCLES*AGX2_STAT_DB_DB_SC_TILE_FAST_OPS&APGX2_STAT_SQ_ANY_BUSY_PER_TYPE*AGX2_STAT_DB_DB_SC_TILE_NO_OPS.AGX2_STAT_DB_DB_SC_TILE_PIXEL_RATE&APGX2_STAT_SQ_EVENTS_PER_TYPE"-GX2_SURFACE_USE_TEXTURE*APGX2_STAT_SQ_EVENTS_BUSY_PER_TYPE.AGX2_STAT_DB_DB_SC_TILE_SSAA_KILL.AGX2_STAT_DB_DB_SC_TILE_FAST_Z_OPS&-GX2_SURFACE_USE_COLOR_BUFFER*APGX2_STAT_SQ_EVENT_LEVEL_PER_TYPE&-GX2_SURFACE_USE_DEPTH_BUFFER&APGX2_STAT_SQ_ITEMS_PER_TYPE2AGX2_STAT_DB_DB_SC_TILE_FAST_STENCIL_OPS*APGX2_STAT_SQ_ITEMS_GT_48_PER_TYPE&-GX2_SURFACE_USE_SCAN_BUFFER*AGX2_STAT_DB_SC_DB_QUAD_SENDS*A PGX2_STAT_SQ_ITEMS_GT_32_PER_TYPE"-GX2_SURFACE_USE_FTV&AGX2_STAT_DB_SC_DB_QUAD_BUSY.-GX2_SURFACE_USE_COLOR_BUFFER_TEXTURE*A PGX2_STAT_SQ_ITEMS_GT_16_PER_TYPE*AGX2_STAT_DB_SC_DB_QUAD_SQUADSA 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GX2_STAT_SMX1_DW_WRITTEN6A%GX2_STAT_CP_QU_STALLED_ON_PIPELINE_STATISTICS"A!GX2_STAT_SMX1_DW_MISS"A"GX2_STAT_SMX1_DB_STALL.A&GX2_STAT_CP_PFP_STALLED_ON_CSF_READY2A#GX2_STAT_SMX2_NUMBER_OF_PARTIAL_LINES.A'GX2_STAT_CP_PFP_STALLED_ON_MEQ_READY.A$GX2_STAT_SMX2_NUMBER_OF_ES_FLUSH.A(GX2_STAT_CP_PFP_STALLED_ON_VGT_READY6A)GX2_STAT_CP_PFP_STALLED_ON_PENDING_MULTIPASS.A%GX2_STAT_SMX2_NUMBER_OF_GS_FLUSH.A&GX2_STAT_SMX2_NUMBER_OF_SYNC_FLUSH:A*GX2_STAT_CP_ME_STALLED_ON_BRUSH_WR_CONFIRM_6XX:A+GX2_STAT_CP_ME_STALLED_ON_BUSY_BRUSH_LOGIC_6XX.A'GX2_STAT_SMX2_NUMBER_OF_ACK_FLUSHCIP_DISK_FULL:A,GX2_STAT_CP_ME_STALLED_ON_NO_AVAIL_CR_CNTX_6XX*A(GX2_STAT_SMX2_NUMBER_OF_FLUSHCIP_ACCESS_DENIED6A-GX2_STAT_CP_ME_STALLED_ON_NO_AVAIL_GFX_CNTX"CIP_NEWER_VERSION_EXISTS&A)GX2_STAT_SMX2_DW_WRITTENCHANGEKIND_ADDMEMBER"CIP_OLDER_VERSION_EXISTS"A*GX2_STAT_SMX2_DW_MISS2A.GX2_STAT_CP_ME_STALLED_WRITING_TO_RCIUCIP_NAME_CONFLICT2A/GX2_STAT_CP_ME_STALLED_WRITING_CONSTANTS"A+GX2_STAT_SMX2_DB_STALL"CHANGEKIND_DELETEMEMBER2CIP_TRUST_VERIFICATION_COMPONENT_MISSING2A0GX2_STAT_CP_RBIU_STALLED_WRITING_DMA_REGSCHANGEKIND_SETNAMES2A,GX2_STAT_SMX3_NUMBER_OF_PARTIAL_LINES.CIP_EXE_SELF_REGISTERATION_TIMEOUT&CHANGEKIND_SETDOCUMENTATION.A-GX2_STAT_SMX3_NUMBER_OF_ES_FLUSH2A1GX2_STAT_CP_RBIU_STALLED_WRITING_SEM_REGSCHANGEKIND_GENERAL6A2GX2_STAT_CP_RBIU_STALLED_WRITING_MC_WR_ADDR.A.GX2_STAT_SMX3_NUMBER_OF_GS_FLUSHCIP_UNSAFE_TO_ABORT:A3GX2_STAT_CP_RBIU_STALLED_WRITING_MC_RD_ADDR_6XX.A/GX2_STAT_SMX3_NUMBER_OF_SYNC_FLUSHCHANGEKIND_INVALIDATECIP_NEED_REBOOT.A0GX2_STAT_SMX3_NUMBER_OF_ACK_FLUSH"CHANGEKIND_CHANGEFAILED:A4GX2_STAT_CP_RBIU_STALLED_WRITING_EOPDONE_FIFO_600>A5GX2_STAT_CP_RBIU_STALLED_WRITING_RECTDONE_FIFO_6XX*A1GX2_STAT_SMX3_NUMBER_OF_FLUSH>A6GX2_STAT_CP_RBIU_STALLED_WRITING_STREAMOUT_FIFO_600&A2GX2_STAT_SMX3_DW_WRITTEN"A3GX2_STAT_SMX3_DW_MISS>A7GX2_STAT_CP_RBIU_STALLED_WRITING_PIPESTATS_FIFO_600"A4GX2_STAT_SMX3_DB_STALL6A8GX2_STAT_CP_SEMAPHORE_BUSY_POLLING_FOR_PASS"A5GX2_STAT_SMX0_SET0_CNT2A9GX2_STAT_CP_LOAD_STALLED_ON_SET_COHERENCY"A6GX2_STAT_SMX0_SET1_CNT2A:GX2_STAT_CP_ME_STALLED_ON_PARTIAL_FLUSH6A;GX2_STAT_CP_CSF_IDLE_CONFIRM_TO_ACTIVE_6XX"A7GX2_STAT_SMX0_SET2_CNT"A8GX2_STAT_SMX0_SET3_CNT&A<GX2_STAT_CP_DYNAMIC_CLK_VALID*A=GX2_STAT_CP_REGISTER_CLK_VALID"A9GX2_STAT_SMX0_SET4_CNT"A:GX2_STAT_SMX0_SET5_CNT"A;GX2_STAT_SMX0_SET6_CNTAGX2_STAT_GRBM_COUNT"AGX2_STAT_SMX1_SET1_CNT"A?GX2_STAT_SMX1_SET2_CNT&AGX2_STAT_GRBM_VGT_DMA_BUSY"AGX2_STAT_GRBM_TA0_BUSY"A@GX2_STAT_SMX1_SET3_CNT"AAGX2_STAT_SMX1_SET4_CNT"AGX2_STAT_GRBM_TA1_BUSY"AGX2_STAT_GRBM_TA2_BUSY"ABGX2_STAT_SMX1_SET5_CNT"ACGX2_STAT_SMX1_SET6_CNT"AGX2_STAT_GRBM_TA3_BUSY"Uri_PROPERTY_STRING_START"ADGX2_STAT_SMX1_SET7_CNT&AGX2_STAT_GRBM_TC_BUSY_R6XX"Uri_PROPERTY_AUTHORITY"AEGX2_STAT_SMX2_SET0_CNTA GX2_STAT_GRBM_SX_BUSY"Uri_PROPERTY_DISPLAY_URI"AFGX2_STAT_SMX2_SET1_CNTA GX2_STAT_GRBM_SH_BUSY"AGGX2_STAT_SMX2_SET2_CNT"A GX2_STAT_GRBM_SPI_BUSY"AHGX2_STAT_SMX2_SET3_CNT&A GX2_STAT_GRBM_SMX_BUSY_R6XX"AIGX2_STAT_SMX2_SET4_CNTA GX2_STAT_GRBM_SC_BUSY*AGX2_STAT_GRBM_DRMDMA_BUSY_R6XX"AJGX2_STAT_SMX2_SET5_CNTAGX2_STAT_GRBM_PA_BUSY"AKGX2_STAT_SMX2_SET6_CNT"AGX2_STAT_GRBM_DB0_BUSY"ALGX2_STAT_SMX2_SET7_CNT"AGX2_STAT_GRBM_DB1_BUSY"AMGX2_STAT_SMX3_SET0_CNT"ANGX2_STAT_SMX3_SET1_CNT"AGX2_STAT_GRBM_DB2_BUSY"AOGX2_STAT_SMX3_SET2_CNT"AGX2_STAT_GRBM_DB3_BUSY&AGX2_STAT_GRBM_CR_BUSY_R6XX"APGX2_STAT_SMX3_SET3_CNT"AQGX2_STAT_SMX3_SET4_CNT&AGX2_STAT_GRBM_CP_COHER_BUSY"ARGX2_STAT_SMX3_SET5_CNTAGX2_STAT_GRBM_CP_BUSY"Uri_PROPERTY_STRING_LAST"AGX2_STAT_GRBM_CP_DMA_BUSY"ASGX2_STAT_SMX3_SET6_CNT"AGX2_STAT_GRBM_CB0_BUSY"ATGX2_STAT_SMX3_SET7_CNT"AGX2_STAT_GRBM_CB1_BUSY*AUGX2_STAT_SMX0_PROBE_COLLISION*AVGX2_STAT_SMX1_PROBE_COLLISION"AGX2_STAT_GRBM_CB2_BUSY"AGX2_STAT_GRBM_CB3_BUSY*AWGX2_STAT_SMX2_PROBE_COLLISIONUri_PROPERTY_ZONE*AXGX2_STAT_SMX3_PROBE_COLLISION&AGX2_STAT_GRBM_VC_BUSY_R6XX&AGX2_STAT_GRBM_EXTERN_STALL*AGX2_STAT_GRBM_CP_DMA_IDLE_STALLAGX2_STAT_TD_TD_BUSY&AGX2_STAT_GRBM_GFX_IDLE_STALL"AGX2_STAT_TD_INPUT_BUSY.A GX2_STAT_GRBM_GFX_IDLE_CLEAN_STALL*A!GX2_STAT_GRBM_GFX_IDLE_STALL_R600"A GX2_STAT_TD_OUTPUT_BUSYUri_HOST_DNS2A GX2_STAT_TD_SAMPLE_LATENCY_FIFO_BUSY2A"GX2_STAT_GRBM_GFX_IDLE_CLEAN_STALL_R600Uri_HOST_IPV42A GX2_STAT_TD_CONSTANT_LATENCY_FIFO_BUSY"A#GX2_STAT_GRBM_TA4_BUSY&A GX2_STAT_TD_FASTPATH_BUSY"A$GX2_STAT_GRBM_TA5_BUSY"A%GX2_STAT_GRBM_TA6_BUSY&A GX2_STAT_TD_SH_FIFO_BUSY&AGX2_STAT_TD_PHASE_SYNC_BUSY"A&GX2_STAT_GRBM_TA7_BUSY"A'GX2_STAT_GRBM_TA8_BUSY*AGX2_STAT_TD_DATAOUT_FIFO_BUSY2AGX2_STAT_TD_LATENCY_FIFO_BUSY_PIPE_IDLE"A(GX2_STAT_GRBM_TA9_BUSY*AGX2_STAT_TD_SYNC_PHASE_COUNT"A)GX2_STAT_GRBM_TA10_BUSY"A*GX2_STAT_GRBM_TA11_BUSY&AGX2_STAT_TD_VC_DATA_RETURN"A+GX2_STAT_GRBM_TA12_BUSY&AGX2_STAT_TD_STALL_DUE_TO_VC"A,GX2_STAT_GRBM_TA13_BUSY*AGX2_STAT_TD_STALL_DUE_TO_RSP"A-GX2_STAT_GRBM_TA14_BUSY.AGX2_STAT_TD_STALL_DUE_TO_VC_OR_RSP&AGX2_STAT_TD_TD_REG_SCLK_VLD"A.GX2_STAT_GRBM_TA15_BUSY"A/GX2_STAT_GRBM_RESERVED06AGX2_STAT_TD_TD_LOCAL_CG_DYN_SCLK_GRP0_ENGX2_FALSE6AGX2_STAT_TD_TD_LOCAL_CG_DYN_SCLK_GRP1_EN"A0GX2_STAT_GRBM_RESERVED1GX2_TRUE"A1GX2_STAT_GRBM_RESERVED2"A2GX2_STAT_GRBM_RESERVED3GX2_ENABLE"A3GX2_STAT_GRBM_RESERVED4AGX2_STAT_TA_TA_BUSY"A4GX2_STAT_GRBM_RESERVED5&AGX2_STAT_TA_GRADIENT_BUSY"A5GX2_STAT_GRBM_RESERVED6*AGX2_STAT_TA_GRADIENT_FIFO_BUSY"A6GX2_STAT_GRBM_RESERVED7"AGX2_STAT_TA_LOD_BUSY"A7GX2_STAT_GRBM_RESERVED8&AGX2_STAT_TA_LOD_FIFO_BUSY"A8GX2_STAT_GRBM_RESERVED9&AGX2_STAT_TA_ADDRESSER_BUSY*AGX2_STAT_TA_ADDRESSER_FIFO_BUSY"A9GX2_STAT_GRBM_RESERVED10"A:GX2_STAT_GRBM_RESERVED11&AGX2_STAT_TA_ALIGNER_BUSY"AGX2_STAT_TA_PIX_0_QUAD"A;GX2_STAT_GRBM_RESERVED12"A<GX2_STAT_GRBM_RESERVED13"A GX2_STAT_TA_PIX_1_QUAD"A=GX2_STAT_GRBM_RESERVED14"A GX2_STAT_TA_PIX_2_QUADSA_Yes"A>GX2_STAT_GRBM_RESERVED15SA_No"A GX2_STAT_TA_PIX_3_QUAD"A GX2_STAT_TA_PIX_4_QUAD*A?GX2_STAT_GRBM_USER_DEFINED_BUSYSA_Maybe&AGX2_STAT_TA_INPUT_CYCLESSA_NoAccess2AGX2_STAT_TA_GRADIENT_BALANCING_CYCLES"A GX2_STAT_PA_SU_PASX_REQSA_Read&AGX2_STAT_TA_GRADIENT_CYCLES.AGX2_STAT_TA_WALKER_BALANCING_CYCLESSA_Write*A GX2_STAT_PA_SU_PASX_DISABLE_PIPESA_ReadWrite&AGX2_STAT_TA_WALKER_CYCLESCC_CDECL*A GX2_STAT_PA_SU_PASX_FIRST_VECTORCC_MSCPASCAL*A GX2_STAT_PA_SU_PASX_SECOND_VECTOR2AGX2_STAT_TA_ALIGNER_BALANCING_CYCLES&AGX2_STAT_TA_ALIGNER_CYCLES*A GX2_STAT_PA_SU_PASX_FIRST_DEADCC_PASCALCC_MACPASCAL*AGX2_STAT_TA_MIP_1_CYCLE_PIXELS*A GX2_STAT_PA_SU_PASX_SECOND_DEAD*AGX2_STAT_TA_MIP_2_CYCLE_PIXELSCC_STDCALL.A GX2_STAT_PA_SU_PASX_VTX_KILL_DISCARD.A GX2_STAT_PA_SU_PASX_VTX_NAN_DISCARD*AGX2_STAT_TA_VOL_1_CYCLE_PIXELSCC_FPFASTCALLCC_SYSCALL&A GX2_STAT_PA_SU_PA_INPUT_PRIM*AGX2_STAT_TA_VOL_2_CYCLE_PIXELSCC_MPWCDECL*A GX2_STAT_PA_SU_PA_INPUT_NULL_PRIM2AGX2_STAT_TA_BILIN_POINT_1_CYCLE_PIXELSCC_MPWPASCAL.A GX2_STAT_PA_SU_PA_INPUT_EVENT_FLAG.AGX2_STAT_TA_BICUBIC_4_CYCLE_PIXELS2A GX2_STAT_PA_SU_PA_INPUT_FIRST_PRIM_SLOT.A GX2_STAT_TA_MIPMAP_LOD_0_SAMPLES.A!GX2_STAT_TA_MIPMAP_LOD_1_SAMPLES.A GX2_STAT_PA_SU_PA_INPUT_END_OF_PACKET2A GX2_STAT_PA_SU_PA_INPUT_EXTENDED_EVENT.A"GX2_STAT_TA_MIPMAP_LOD_2_SAMPLESGX2_COMPARE_NEVER.A#GX2_STAT_TA_MIPMAP_LOD_3_SAMPLES&A GX2_STAT_PA_SU_CLPR_CULL_PRIM.A GX2_STAT_PA_SU_CLPR_VVUCP_CULL_PRIM.A$GX2_STAT_TA_MIPMAP_LOD_4_SAMPLES.A%GX2_STAT_TA_MIPMAP_LOD_5_SAMPLES*A GX2_STAT_PA_SU_CLPR_VV_CULL_PRIM.A&GX2_STAT_TA_MIPMAP_LOD_6_SAMPLES*A GX2_STAT_PA_SU_CLPR_UCP_CULL_PRIM2A GX2_STAT_PA_SU_CLPR_VTX_KILL_CULL_PRIM.A'GX2_STAT_TA_MIPMAP_LOD_7_SAMPLES.A GX2_STAT_PA_SU_CLPR_VTX_NAN_CULL_PRIM.A(GX2_STAT_TA_MIPMAP_LOD_8_SAMPLES.A)GX2_STAT_TA_MIPMAP_LOD_9_SAMPLES.A GX2_STAT_PA_SU_CLPR_CULL_TO_NULL_PRIMGX2_COMPARE_ALWAYS.A GX2_STAT_PA_SU_CLPR_VVUCP_CLIP_PRIM.A*GX2_STAT_TA_MIPMAP_LOD_10_SAMPLES*A GX2_STAT_PA_SU_CLPR_VV_CLIP_PRIM.A+GX2_STAT_TA_MIPMAP_LOD_11_SAMPLES*A GX2_STAT_PA_SU_CLPR_UCP_CLIP_PRIM.A,GX2_STAT_TA_MIPMAP_LOD_12_SAMPLES.A-GX2_STAT_TA_MIPMAP_LOD_13_SAMPLES2A GX2_STAT_PA_SU_CLPR_POINT_CLIP_CANDIDATE.A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_1.A.GX2_STAT_TA_MIPMAP_LOD_14_SAMPLES.A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_2GX2_STENCIL_KEEP&A0GX2_STAT_TA_ANISO_1_1_QUADS.A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_3&A1GX2_STAT_TA_ANISO_2_1_QUADS.A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_4&A2GX2_STAT_TA_ANISO_3_1_QUADS&A3GX2_STAT_TA_ANISO_4_1_QUADS2A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_5_82A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_9_12&A4GX2_STAT_TA_ANISO_5_1_QUADS.A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_NEAR&A5GX2_STAT_TA_ANISO_6_1_QUADS&A6GX2_STAT_TA_ANISO_7_1_QUADS.A GX2_STAT_PA_SU_CLPR_CLIP_PLANE_FAR&A7GX2_STAT_TA_ANISO_8_1_QUADS.A! GX2_STAT_PA_SU_CLPR_CLIP_PLANE_LEFT.A" GX2_STAT_PA_SU_CLPR_CLIP_PLANE_RIGHT&A8GX2_STAT_TA_ANISO_9_1_QUADS*A9GX2_STAT_TA_ANISO_10_1_QUADS.A# GX2_STAT_PA_SU_CLPR_CLIP_PLANE_TOP*A:GX2_STAT_TA_ANISO_11_1_QUADS.A$ GX2_STAT_PA_SU_CLPR_CLIP_PLANE_BOTTOM2A% GX2_STAT_PA_SU_CLPR_GSC_KILL_CULL_PRIM*A;GX2_STAT_TA_ANISO_12_1_QUADS2A& GX2_STAT_PA_SU_CLPR_RASTER_KILL_CULL_PRIM*AGX2_STAT_TA_ANISO_15_1_QUADS2A( GX2_STAT_PA_SU_CLSM_TOTALLY_VISIBLE_PRIM.A) GX2_STAT_PA_SU_CLSM_CULL_TO_NULL_PRIM*A?GX2_STAT_TA_ANISO_16_1_QUADS&A@GX2_STAT_TA_TA_REG_SCLK_VLD.A* GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_1.A+ GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_26AAGX2_STAT_TA_TA_LOCAL_CG_DYN_SCLK_GRP0_EN.A, GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_36ABGX2_STAT_TA_TA_LOCAL_CG_DYN_SCLK_GRP1_EN:ACGX2_STAT_TA_TA_LOCAL_CG_DYN_SCLK_GRP1_MEMS_EN.A- GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_4.A. GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_5_8.A/ GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_9_13/GX2R_USAGE_CPU_READ/GX2R_USAGE_CPU_WRITE.AGX2_STAT_TCP_TA_TCP_STARVE_CYCLES.A0 GX2_STAT_PA_SU_CLIPGA_VTE_KILL_PRIMVAR_STATIC&A1 GX2_STAT_PA_SU_SU_INPUT_PRIM/ GX2R_USAGE_GPU_READ.AGX2_STAT_TCP_TCP_TA_STALL_CYCLES*A2 GX2_STAT_PA_SU_SU_INPUT_CLIP_PRIM/@GX2R_USAGE_GPU_WRITE.AGX2_STAT_TCP_TD_TCP_STALL_CYCLES.AGX2_STAT_TCP_TCC_TCP_STALL_CYCLES*A3 GX2_STAT_PA_SU_SU_INPUT_NULL_PRIM.AGX2_STAT_TCP_TCC0_TCP_STALL_CYCLES"/GX2R_USAGE_DMA_WRITE*A4 GX2_STAT_PA_SU_SU_INPUT_PRIM_DUALGX2_CHANNEL_MASK_RGBA.AGX2_STAT_TCP_TCC1_TCP_STALL_CYCLES2A5 GX2_STAT_PA_SU_SU_INPUT_CLIP_PRIM_DUAL.AGX2_STAT_TCP_TCC2_TCP_STALL_CYCLES.A6 GX2_STAT_PA_SU_SU_ZERO_AREA_CULL_PRIM.AGX2_STAT_TCP_TCC3_TCP_STALL_CYCLES.A7 GX2_STAT_PA_SU_SU_BACK_FACE_CULL_PRIM.AGX2_STAT_TCP_TCC4_TCP_STALL_CYCLES2A8 GX2_STAT_PA_SU_SU_FRONT_FACE_CULL_PRIM.A9 GX2_STAT_PA_SU_SU_POLYMODE_FACE_CULL.A GX2_STAT_TCP_TCC5_TCP_STALL_CYCLES.A: GX2_STAT_PA_SU_SU_POLYMODE_BACK_CULL.A GX2_STAT_TCP_TCC6_TCP_STALL_CYCLES.A; GX2_STAT_PA_SU_SU_POLYMODE_FRONT_CULL/GX2R_OPTION_NONE.A GX2_STAT_TCP_TCC7_TCP_STALL_CYCLES.A GX2_STAT_TCP_TCP_LOD_STALL_CYCLES&/GX2R_OPTION_IGNORE_IN_USE2A< GX2_STAT_PA_SU_SU_POLYMODE_INVALID_FILL&A= GX2_STAT_PA_SU_SU_OUTPUT_PRIM/GX2R_OPTION_FIRST6A GX2_STAT_TCP_TCP_TAGCONFLICT_STALL_CYCLES.A> GX2_STAT_PA_SU_SU_OUTPUT_CLIP_PRIM*/GX2R_OPTION_NO_CPU_INVALIDATE.AGX2_STAT_TCP_TCP_ALLOC_STALL_CYCLES.A? GX2_STAT_PA_SU_SU_OUTPUT_NULL_PRIM.AGX2_STAT_TCP_TCP_LFIFO_STALL_CYCLES*/ GX2R_OPTION_NO_GPU_INVALIDATE.A@ GX2_STAT_PA_SU_SU_OUTPUT_EVENT_FLAG.AGX2_STAT_TCP_TCP_RFIFO_STALL_CYCLES.AGX2_STAT_TCP_TCP_FFIFO_STALL_CYCLES2AA GX2_STAT_PA_SU_SU_OUTPUT_FIRST_PRIM_SLOT*/GX2R_OPTION_NO_TOUCH_DESTROY2AB GX2_STAT_PA_SU_SU_OUTPUT_END_OF_PACKET/GX2R_OPTION_LAST.AGX2_STAT_TCP_TCP_CFIFO_STALL_CYCLES6AGX2_STAT_TCP_TCP_READCONFLICT_STALL_CYCLES2AC GX2_STAT_PA_SU_SU_OUTPUT_POLYMODE_FACE2AGX2_STAT_TCP_TCP_PENDING_STALL_CYCLES2AD GX2_STAT_PA_SU_SU_OUTPUT_POLYMODE_BACK2AGX2_STAT_TCP_TCP_READFIFO_STALL_CYCLES2AE GX2_STAT_PA_SU_SU_OUTPUT_POLYMODE_FRONT2AF GX2_STAT_PA_SU_SU_OUT_CLIP_POLYMODE_FACE&AGX2_STAT_TCP_TCP_LATENCY2AG GX2_STAT_PA_SU_SU_OUT_CLIP_POLYMODE_BACK*AGX2_STAT_TCP_TCC_REQ_LATENCY*AGX2_STAT_TCP_TCC0_REQ_LATENCY2AH GX2_STAT_PA_SU_SU_OUT_CLIP_POLYMODE_FRONT*AGX2_STAT_TCP_TCC1_REQ_LATENCY.AI GX2_STAT_PA_SU_SU_OUTPUT_PRIM_DUAL*AGX2_STAT_TCP_TCC2_REQ_LATENCY2AJ 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GX2_STAT_PA_SU_CCGSM_STALLED*A(GX2_STAT_TCP_TCC7_FREE_LATENCY&A)GX2_STAT_TCP_TCP_TCC_REQ&AY GX2_STAT_PA_SU_CLPRIM_IDLE&A*GX2_STAT_TCP_TCP_TCC0_REQ&AZ GX2_STAT_PA_SU_CLPRIM_BUSY&A[ GX2_STAT_PA_SU_CLPRIM_STALLED&A+GX2_STAT_TCP_TCP_TCC1_REQ.A\ GX2_STAT_PA_SU_CLPRIM_STARVED_CCGSM&A,GX2_STAT_TCP_TCP_TCC2_REQ&A] GX2_STAT_PA_SU_CLIPSM_IDLE&A-GX2_STAT_TCP_TCP_TCC3_REQ&A.GX2_STAT_TCP_TCP_TCC4_REQ&A^ GX2_STAT_PA_SU_CLIPSM_BUSY&A/GX2_STAT_TCP_TCP_TCC5_REQ2A_ GX2_STAT_PA_SU_CLIPSM_WAIT_CLIP_VERT_ENGH&A0GX2_STAT_TCP_TCP_TCC6_REQ2A` GX2_STAT_PA_SU_CLIPSM_WAIT_HIGH_PRI_SEQ&A1GX2_STAT_TCP_TCP_TCC7_REQ*Aa GX2_STAT_PA_SU_CLIPSM_WAIT_CLIPGA&A2GX2_STAT_TCP_TCC_TCP_RDRET2Ab GX2_STAT_PA_SU_CLIPSM_WAIT_AVAIL_VTE_CLIP&A3GX2_STAT_TCP_TCC0_TCP_RDRET.Ac GX2_STAT_PA_SU_CLIPSM_WAIT_CLIP_OUTSM&Ad GX2_STAT_PA_SU_CLIPGA_IDLE&A4GX2_STAT_TCP_TCC1_TCP_RDRET&Ae GX2_STAT_PA_SU_CLIPGA_BUSY&A5GX2_STAT_TCP_TCC2_TCP_RDRETGX2_BLEND_COMBINE_ADD2Af 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@$@_fmtDataGX2_COMPARE_FIRSTGX2_COMPARE_LASTGX2_RENDER_TARGET_0B$SQ_TEX_ANISO_RATIO_16"G"SQ_TEX_VTX_VALID_TEXTURED$NUMBER_UNORMD$NUMBER_SNORMD$NUMBER_UINTD$NUMBER_SINTD$NUMBER_SRGBD$NUMBER_FLOATF$SWAP_STD_REVH$TILE_DISABLEH$TILE_FRAG_ENABLEJ$EXPORT_FULLJ$EXPORT_NORM6#GX2_SURFACE_FORMAT_D_D32_FLOAT_S8_UINT_X24")GX2_SURFACE_DIM_1D_ARRAY")GX2_SURFACE_DIM_2D_MSAA+GX2_AA_MODE_2X+GX2_AA_MODE_4X"ADDR_HTILE_BLOCKSIZE_8L$GX2FmtData* regPA_SU_POLY_OFFSET_DB_FMT_CNTL$regPA_SC_AA_CONFIG regCB_COLOR0_INFOT$GX2ColorBufferRegs)$regCB_COLOR0_FRAG"$regSQ_TEX_RESOURCE_WORD2_0*$regPA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX regDB_DEPTH_SIZE!regCB_COLOR0_MASKGX2RenderTarget&$regCB_COLOR0_TILE"i!regSQ_TEX_RESOURCE_WORD6_0GX2ZRangeBased$GX2TextureRegs3$regDB_DEPTH_BASEm$GX2DepthBufferRegs,$regCB_COLOR0_BASE"# regSQ_TEX_RESOURCE_WORD4_0regDB_HTILE_SURFACE6$regDB_DEPTH_CLEAR? regDB_DEPTH_VIEW9$regDB_STENCIL_CLEAR&#regDB_SRESULTS_COMPARE_STATE1 regCB_COLOR0_VIEW regDB_PRELOAD_CONTROL5 regDB_DEPTH_INFO$GX2AASampleLoc"!regSQ_TEX_RESOURCE_WORD5_0 regCB_COLOR0_SIZEd regDB_PREFETCH_LIMIT" regSQ_TEX_RESOURCE_WORD1_0&#regDB_SRESULTS_COMPARE_STATE0"{!regSQ_TEX_RESOURCE_WORD0_0" $regSQ_TEX_RESOURCE_WORD3_0&$regPA_SC_AA_SAMPLE_LOCS_MCTX%,AGetAddrLibHandle%,A__cntlzw"%h-AGX2GetSurfaceMipDepth%,.A_GX2GetCB%.APM4ReserveCBSize%/APM4CmdSpaceNeeded%/APM4CheckCBSize%0APM4WriteResource&%1A_PM4WriteResourceConstant&%,2A_PM4Write7ShadowedRegs%`3A_PM4Write"%3A_PM4IncrementCBSize"%h4A_GX2GetProfileMode"%4APM4Write1ContextReg"%|5A_PM4Write1ShadowedReg"%86APM4Write2ContextRegs&%6A_PM4Write2ShadowedRegs"%7APM4Write3ContextRegs&%8A_PM4Write3ShadowedRegsB?allocSysMem@@YAPEAXPEBU_ADDR_ALLOCSYSMEM_INPUT@@@ZDR?freeSysMem@@YA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_FREESYSMEM_INPUT@@@ZAddrCreateYAddrDestroyYTCLGetInfoYTCLSubmit&TCLAllocTilingApertureE"0TCLFreeTilingApertureTCLReadTimestamptTCLWaitTimestampt"PGX2GetSystemDRCMode&`GX2SetDRCConnectCallbackE"GX2GetDRCVerticalInfo*GX2GetScaleDownModeEnabledTGX2CalcTVSizeGX2CalcDRCSizedGX2SetTVBufferd0GX2SetDRCBufferdPGX2SetTVScale`GX2SetDRCScaledpGX2SetTVGammaGX2GetTVGammaGX2GetTVGammaExdGX2GetDRCGammadGX2GetDRCGammaExdGX2SetDRCGammadGX2SetTVEnabledGX2SetDRCEnabled.GX2CopyColorBufferToScanBufferC"GX2SwapScanBufferscGX2GetSwapStatuss0GX2WaitForFlips@GX2WaitForVsyncs&pGX2SetVideoEncodingHintuGX2GetLastFramen"GX2GetLastFrameGamman% BallocSysMem%BfreeSysMem%BInitAddressLib%BDestroyAddressLib%BDCInvalidateRange%BDCFlushRange%BTCLGetInfo% BTCLSubmitToRing% BTCLSubmit&% BTCLAllocTilingAperture"% BTCLFreeTilingAperture% BTCLReadRegister% BTCLWriteRegister%( BTCLReadTimestamp% BTCLWaitTimestamp%dBTCLIHRegister%BTCLIHUnregister"%BTCLIHEnableInterrupt%4BTCLReset%BTCLSetHangWait%BTCLSetTimeout"%BGX2GetSystemDRCMode&%BGX2SetDRCConnectCallback"%tBGX2GetDRCVerticalInfo*%BGX2GetScaleDownModeEnabled%pBGX2CalcTVSize%HBGX2CalcDRCSize%BGX2SetTVBuffer%BGX2SetDRCBuffer%BGX2SetTVScale%LBGX2SetDRCScale%BGX2SetTVGamma%PBGX2GetTVGamma%BGX2GetTVGammaEx%0BGX2GetDRCGamma%BGX2GetDRCGammaEx%BGX2SetDRCGamma%BGX2SetTVEnable%BGX2SetDRCEnable.%hBGX2CopyColorBufferToScanBuffer"%BGX2SwapScanBuffers%hBGX2GetSwapStatus%8BGX2WaitForFlip%BGX2WaitForVsync"%BGX2SetSwapInterval"%lBGX2GetSwapInterval&%BGX2SetVideoEncodingHint%BGX2GetLastFrame"% BGX2GetLastFrameGamma$)LUIGI_A11$GPUNE_A11$TCOREASIC_PUNEADDR_OKmGX2_DRC_SINGLEmGX2_DRC_SINGLE_30HZ[GX2_TV_RENDER_NONE[GX2_TV_RENDER_1080&GX2_DRC_ENCODING_INVALLIDATE*GX2_DRC_ENCODING_MOTION_VECTORGX2DRCEncodingHint$TCLTimestampType[GX2TVRenderModemGX2DRCMode$TCLInfooGX2BufferingMode$GX2DRCConnectCB*%8CPM4Parser::BaseParser::Run" _bad_alloc_Message> ?value@?$integral_constant@_N$0A@@tr1@std@@2_NBv> ?value@?$integral_constant@_N$00@tr1@std@@2_NBv@GX2RCreateBuffer_"GX2TestBitFlagsAnysGX2Maxt"GX2RSetResourceFlagss&0GX2RClearResourceFlagst& _GX2RGuardBandsEnabledt"Vg_GX2RDebugOptionsd*GX2RCreateBufferUserMemory$2P??U@YA?AW4_GX2RResourceFlags@@W40@0@Z"GX2RDestroyBufferExc"_GX2RCheckGuardBandscGX2RIsUserMemoryn2p??U@YA?AW4_GX2RResourceFlags@@W40@H@ZGX2RLockBufferExs&GX2RReplaceResourceFlagsa&GX2RLockBufferRegionExa"ЖGX2RUnlockBufferExxРGX2ClearBitFlagsx&_GX2RGetInvalidateFlagsaGX2RBufferExistseGX2RSetBufferName GX2RGetBufferName&@GX2RSetAttributeBuffera*p_GX2RCheckGuardBandsAlways@._GX2RGuardBandsCheckAlwaysEnabled"ТGX2TestBitFlagsAlll2??U@YA?AW4_GX2RDebugOptions@@W40@0@Z&GX2RSetVertexUniformBlock*0GX2RSetGeometryUniformBlockW&GX2RSetPixelUniformBlockc&GX2RSetStreamOutBuffercPGX2RDrawIndexedu&КGX2RDrawIndexedImmediatec&PGX2RBeginDisplayListExc"GX2REndDisplayListx"`GX2RCallDisplayListx&GX2RDirectCallDisplayList2GX2RSetGeometryShaderInputRingBuffer20GX2RSetGeometryShaderOutputRingBuffer"GX2RInitFetchShaderO&GX2RGetBufferAlignmentu*GX2RGetBufferAllocationSizen"ОGX2RInvalidateMemoryo"GX2RInvalidateBuffero*GX2RGetBufferGuardBandSizenv0??$_GX2RCheckInUseOnGPU@U_GX2RBuffer_private@@@@YAXPEBU_GX2RBuffer_private@@W4_GX2RResourceFlags@@_K@Zl%8DGX2RCreateBuffer*%DGX2RCreateBufferUserMemory"%lDGX2RDestroyBufferEx%DGX2RLockBufferEx&% DGX2RLockBufferRegionEx"% DGX2RUnlockBufferEx% DGX2RBufferExists%< DGX2RSetBufferName% DGX2RGetBufferName&%H DGX2RSetAttributeBuffer&%TDGX2RSetVertexUniformBlock*%PDGX2RSetGeometryUniformBlock&%LDGX2RSetPixelUniformBlock&%DDGX2RSetStreamOutBuffer%DGX2RDrawIndexed&%DDGX2RDrawIndexedImmediate&%DGX2RBeginDisplayListEx"%DGX2REndDisplayList"%dDGX2RCallDisplayList&%DGX2RDirectCallDisplayList2%DGX2RSetGeometryShaderInputRingBuffer2%DGX2RSetGeometryShaderOutputRingBuffer"%@DGX2RInitFetchShader&%<DGX2RGetBufferAlignment*%DGX2RGetBufferAllocationSize"%TDGX2RInvalidateMemory"%DGX2RInvalidateBuffer*%DGX2RGetBufferGuardBandSize&/@GX2R_USAGE_NON_CPU_WRITE&/@GX2R_OPTION_LOCK_READONLY/GX2R_OPTION_MASK*/ GX2R_RESOURCE_FLAG_RESERVED1" _bad_alloc_Message" A"Vg_GX2RDebugOptions&wstring'&GX2RString%DGX2Max"%XDGX2RSetResourceFlags&%DGX2RClearResourceFlags%tDoperator|%Doperator|&%d DGX2RReplaceResourceFlags%!DGX2ClearBitFlags&%!D_GX2RGetInvalidateFlags*%0"D_GX2RCheckGuardBandsAlways.%"D_GX2RGuardBandsCheckAlwaysEnabled"% #DGX2TestBitFlagsAll%#Doperator|6% $D_GX2RCheckInUseOnGPU<_GX2RBuffer_private>"_GX2RGetSurfaceMemoryPGX2RSetAllocatorm"GX2RSetDebugOptions"GX2RGetDebugOptions"%@E_GX2RGetSurfaceMemory%<EGX2RIsUserMemory%EGX2RSetAllocator"%@EGX2RSetDebugOptions"%EGX2RGetDebugOptions"%E_GX2RCheckGuardBandsA"GX2R_DEBUG_NONE" _bad_alloc_Message"% EGX2TestBitFlagsAny&%H E_GX2RGuardBandsEnabled20??0AddrElemLib@@IEAA@QEAVAddrLib@@@Zc& ??1AddrObject@@UEAA@XZA"h ??_7AddrElemLib@@6B@Z&??0AddrObject@@QEAA@XZA"Z??_R4AddrElemLib@@6B@&??_R0?AVAddrElemLib@@@8A"Z??_R3AddrElemLib@@8@"Z??_R2AddrElemLib@@8@*Z??_R1A@?0A@EA@AddrElemLib@@8L*X??_R1A@?0A@EA@AddrObject@@8L&??_R0?AVAddrObject@@@8@"0X??_R3AddrObject@@88"HX??_R2AddrObject@@88*??_GAddrElemLib@@UEAAPEAXI@ZL*??_EAddrElemLib@@UEAAPEAXI@ZL&??3AddrObject@@SAXPEAX@ZI&??1AddrElemLib@@UEAA@XZIF ?GetAddrChipFamily@AddrLib@@QEAA?AW4AddrChipFamily@@XZrR0?Create@AddrElemLib@@SAPEAV1@QEBVAddrLib@@PEBU_ADDR_CREATE_INPUT@@@Z&??3AddrObject@@SAXPEAX0@Z*??2AddrObject@@SAPEAX_KPEAX@ZV?Flt32sToInt32s@AddrElemLib@@SAXTADDR_FLT_32@@IW4AddrNumberType@@PEAI@Zp __real@4d800000dt __real@43800000dR?Int32sToPixel@AddrElemLib@@SAXIPEAI00TADDR_COMPONENT_FLAGS@@IPEAE@Z@^ ?Flt32ToDepthPixel@AddrElemLib@@QEBAXW4_AddrDepthFormat@@QEBTADDR_FLT_32@@PEAE@Zl?Flt32ToColorPixel@AddrElemLib@@QEBAXW4_AddrColorFormat@@W4_AddrSurfaceNumber@@W4_AddrSurfaceSwap@@QEBTADDR_FLT_32@@PEAE@Zorp?GetCompType@AddrElemLib@@KAXW4_AddrColorFormat@@W4_AddrSurfaceNumber@@PEAUADDR_PIXEL_FORMATINFO@@@ZB^?GetCompSwap@AddrElemLib@@KAXW4_AddrSurfaceSwap@@PEAUADDR_PIXEL_FORMATINFO@@@ZIJ?SwapComps@AddrElemLib@@KAXIIPEAUADDR_PIXEL_FORMATINFO@@@ZEP?PixGetColorCompInfo@AddrElemLib@@QEBAXW4_AddrColorFormat@@W4_AddrSurfaceNumber@@W4_AddrSurfaceSwap@@PEAUADDR_PIXEL_FORMATINFO@@@Ztf0?PixGetDepthCompInfo@AddrElemLib@@QEBAXW4_AddrDepthFormat@@PEAUADDR_PIXEL_FORMATINFO@@@Zur ?PixGetExportNorm@AddrElemLib@@QEBAHW4_AddrColorFormat@@W4_AddrSurfaceNumber@@W4_AddrSurfaceSwap@@@ZPN0?AdjustSurfaceInfo@AddrElemLib@@QEAAXW4AddrElemMode@@IIPEAI11@ZrN ?RestoreSurfaceInfo@AddrElemLib@@QEAAXW4AddrElemMode@@IIPEAI11@ZrZP ?GetBitsPerPixel@AddrElemLib@@QEAAIW4_AddrFormat@@PEAW4AddrElemMode@@PEAI22@Z^?GetCompBits@AddrElemLib@@KAXIIIIPEAUADDR_PIXEL_FORMATINFO@@W4AddrElemMode@@@ZAB?SetClearComps@AddrElemLib@@SAXQEATADDR_FLT_32@@HH@ZT&%8FAddrElemLib::AddrElemLib6'F`AddrElemLib::AddrElemLib'::`1'::dtor$0"%<FAddrElemLib::Create2'F`AddrElemLib::Create'::`1'::dtor$0*%TFAddrElemLib::Flt32sToInt32s*% FAddrElemLib::Int32sToPixel.% FAddrElemLib::Flt32ToDepthPixel.%$ FAddrElemLib::Flt32ToColorPixel&%FAddrElemLib::GetCompType&%FAddrElemLib::GetCompSwap&%FAddrElemLib::SwapComps.%\FAddrElemLib::PixGetColorCompInfo.%FAddrElemLib::PixGetDepthCompInfo*%\FAddrElemLib::PixGetExportNorm.%FAddrElemLib::AdjustSurfaceInfo'FPowTwoAlign'FIsPow2.%pFAddrElemLib::RestoreSurfaceInfo*%pFAddrElemLib::GetBitsPerPixel' FSafeAssign&%!FAddrElemLib::GetCompBits*% "FAddrElemLib::SetClearCompsADDR_CHIP_FAMILY_R6XXADDR_CHIP_FAMILY_R7XXADDR_CHIP_FAMILY_R8XXADDR_CHIP_FAMILY_R9XXADDR_FMT_INVALIDADDR_FMT_8ADDR_FMT_4_4ADDR_FMT_3_3_2ADDR_FMT_16ADDR_FMT_16_FLOATADDR_FMT_8_8ADDR_FMT_5_6_5 ADDR_FMT_6_5_5 ADDR_FMT_1_5_5_5 ADDR_FMT_4_4_4_4 ADDR_FMT_5_5_5_1 ADDR_FMT_32ADDR_FMT_32_FLOATADDR_FMT_16_16ADDR_FMT_16_16_FLOATADDR_FMT_8_24ADDR_FMT_8_24_FLOATADDR_FMT_24_8ADDR_FMT_24_8_FLOATADDR_FMT_10_11_11"ADDR_FMT_10_11_11_FLOATADDR_FMT_11_11_10"ADDR_FMT_11_11_10_FLOATADDR_FMT_2_10_10_10ADDR_FMT_8_8_8_8ADDR_FMT_10_10_10_2"ADDR_FMT_X24_8_32_FLOATADDR_FMT_32_32ADDR_FMT_32_32_FLOATADDR_FMT_16_16_16_16& ADDR_FMT_16_16_16_16_FLOAT"ADDR_FMT_32_32_32_32&#ADDR_FMT_32_32_32_32_FLOAT%ADDR_FMT_1&ADDR_FMT_1_REVERSED'ADDR_FMT_GB_GR(ADDR_FMT_BG_RG)ADDR_FMT_32_AS_8*ADDR_FMT_32_AS_8_8&+ADDR_FMT_5_9_9_9_SHAREDEXP,ADDR_FMT_8_8_8-ADDR_FMT_16_16_16".ADDR_FMT_16_16_16_FLOAT/ADDR_FMT_32_32_32"0ADDR_FMT_32_32_32_FLOAT1ADDR_FMT_BC12ADDR_FMT_BC23ADDR_FMT_BC34ADDR_FMT_BC45ADDR_FMT_BC56ADDR_FMT_BC67ADDR_FMT_BC7>ADDR_FMT_CTX1ADDR_DEPTH_INVALIDADDR_DEPTH_16ADDR_DEPTH_X8_24ADDR_DEPTH_8_24"ADDR_DEPTH_X8_24_FLOATADDR_DEPTH_8_24_FLOATADDR_DEPTH_32_FLOAT"ADDR_DEPTH_X24_8_32_FLOATiADDR_COLOR_INVALIDiADDR_COLOR_8iADDR_COLOR_4_4iADDR_COLOR_3_3_2iADDR_COLOR_16iADDR_COLOR_16_FLOATiADDR_COLOR_8_8iADDR_COLOR_5_6_5i ADDR_COLOR_6_5_5i ADDR_COLOR_1_5_5_5i ADDR_COLOR_4_4_4_4i ADDR_COLOR_5_5_5_1i ADDR_COLOR_32iADDR_COLOR_32_FLOATiADDR_COLOR_16_16"iADDR_COLOR_16_16_FLOATiADDR_COLOR_8_24iADDR_COLOR_8_24_FLOATiADDR_COLOR_24_8iADDR_COLOR_24_8_FLOATiADDR_COLOR_10_11_11"iADDR_COLOR_10_11_11_FLOATiADDR_COLOR_11_11_10"iADDR_COLOR_11_11_10_FLOATiADDR_COLOR_2_10_10_10iADDR_COLOR_8_8_8_8iADDR_COLOR_10_10_10_2"iADDR_COLOR_X24_8_32_FLOATiADDR_COLOR_32_32"iADDR_COLOR_32_32_FLOAT"iADDR_COLOR_16_16_16_16&i ADDR_COLOR_16_16_16_16_FLOAT"i"ADDR_COLOR_32_32_32_32&i#ADDR_COLOR_32_32_32_32_FLOATkADDR_NUMBER_UNORMkADDR_NUMBER_SNORMkADDR_NUMBER_USCALEDkADDR_NUMBER_SSCALEDkADDR_NUMBER_UINTkADDR_NUMBER_SINTkADDR_NUMBER_SRGBkADDR_NUMBER_FLOATmADDR_SWAP_ALTmADDR_SWAP_STD_REVmADDR_SWAP_ALT_REV ADDR_NO_NUMBER ADDR_EPSILON ADDR_ZERO ADDR_ONE  ADDR_UNORM_R6XX ADDR_UNORM_R6XXDB ADDR_SNORM_R6XX ADDR_GAMMA8_R6XX ADDR_U4FLOATC ADDR_USCALED ADDR_SSCALED ADDR_UINT_BITS ADDR_SINT_BITS ADDR_S8FLOAT ADDR_S8FLOAT32 ADDR_S5FLOAT  ADDR_S5FLOATM !ADDR_U5FLOAT "ADDR_U3FLOATMADDR_ROUND_TRUNCATEADDR_ROUND_DITHERADDR_UNCOMPRESSEDADDR_EXPANDEDADDR_PACKED_STDADDR_PACKED_REVADDR_PACKED_GBGRADDR_PACKED_BGRG ADDR_PACKED_BC1 ADDR_PACKED_BC2 ADDR_PACKED_BC3 ADDR_PACKED_BC4 ADDR_PACKED_BC5"ADDR_DEPTH_PLANAR_R8006%"FAddrElemLib::`scalar deleting destructor'&%l#FAddrElemLib::~AddrElemLib*%#FAddrLib::GetAddrChipFamilynPK?Create@AddrLib@@SA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_CREATE_INPUT@@PEAU_ADDR_CREATE_OUTPUT@@@Z@2N?GetAddrLib@AddrLib@@SAPEAV1@PEAX@ZC&P!?Destroy@AddrLib@@QEAAXXZN?ComputeSurfaceInfo@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEAU_ADDR_COMPUTE_SURFACE_INFO_INPUT@@PEAU_ADDR_COMPUTE_SURFACE_INFO_OUTPUT@@@ZgV?ComputeSurfaceAddrFromCoord@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT@@PEAU_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT@@@Za.0AddrComputeSurfaceCoordFromAddrLW?ComputeSurfaceCoordFromAddr@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT@@PEAU_ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT@@@Zac?ComputeHtileInfo@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_HTILE_INFO_INPUT@@PEAU_ADDR_COMPUTE_HTILE_INFO_OUTPUT@@@ZR*AddrComputeHtileAddrFromCoordh?ComputeHtileAddrFromCoord@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT@@PEAU_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT@@@Z*AddrComputeHtileCoordFromAddrk?ComputeHtileCoordFromAddr@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT@@PEAU_ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT@@@Z`f?ComputeCmaskInfo@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_CMASKINFO_INPUT@@PEAU_ADDR_COMPUTE_CMASK_INFO_OUTPUT@@@Z*`AddrComputeCmaskAddrFromCoordm?ComputeCmaskAddrFromCoord@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT@@PEAU_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT@@@Z*AddrComputeCmaskCoordFromAddro?ComputeCmaskCoordFromAddr@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT@@PEAU_ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT@@@Z`]?ComputeFmaskInfo@AddrLib@@QEAA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_FMASK_INFO_INPUT@@PEAU_ADDR_COMPUTE_FMASK_INFO_OUTPUT@@@ZC*AddrComputeFmaskAddrFromCoord^?ComputeFmaskAddrFromCoord@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT@@PEAU_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT@@@Z* AddrComputeFmaskCoordFromAddr_?ComputeFmaskCoordFromAddr@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT@@PEAU_ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT@@@ZAddrGetVersiond*!?GetVersion@AddrLib@@QEAAIXZdAddrUseTileIndexi.!?UseTileIndex@AddrLib@@QEBAHH@ZbpZ?ExtractBankPipeSwizzle@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT@@PEAU_ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT@@@ZT*AddrCombineBankPipeSwizzlei[?CombineBankPipeSwizzle@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT@@PEAU_ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT@@@ZTY?ComputeSliceTileSwizzle@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_COMPUTE_SLICESWIZZLE_INPUT@@PEAU_ADDR_COMPUTE_SLICESWIZZLE_OUTPUT@@@Z"ElemFlt32ToDepthPixel?Flt32ToDepthPixel@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ELEM_FLT32TODEPTHPIXEL_INPUT@@PEAU_ELEM_FLT32TODEPTHPIXEL_OUTPUT@@@Z" ElemFlt32ToColorPixel0?Flt32ToColorPixel@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ELEM_FLT32TOCOLORPIXEL_INPUT@@PEAU_ELEM_FLT32TOCOLORPIXEL_OUTPUT@@@ZElemGetExportNormN?GetExportNorm@AddrLib@@QEBAHPEBU_ELEM_GETEXPORTNORM_INPUT@@@Z_& AddrConvertTileInfoToHWEp`?ConvertTileInfoToHW@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_CONVERT_TILEINFOTOHW_INPUT@@PEAU_ADDR_CONVERT_TILEINFOTOHW_OUTPUT@@@Z" AddrConvertTileIndexA0a?ConvertTileIndex@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_CONVERT_TILEINDEX_INPUT@@PEAU_ADDR_CONVERT_TILEINDEX_OUTPUT@@@ZT AddrGetTileIndex@pb?GetTileIndex@AddrLib@@QEBA?AW4_ADDR_E_RETURNCODE@@PEBU_ADDR_GET_TILEINDEX_INPUT@@PEAU_ADDR_GET_TILEINDEX_OUTPUT@@@Z_%@GAddrCreate%GAddrDestroy&%GAddrComputeSurfaceInfo.%xGAddrComputeSurfaceAddrFromCoord.%PGAddrComputeSurfaceCoordFromAddr"%( GAddrComputeHtileInfo*% GAddrComputeHtileAddrFromCoord*% GAddrComputeHtileCoordFromAddr"% GAddrComputeCmaskInfo*%p GAddrComputeCmaskAddrFromCoord*%H GAddrComputeCmaskCoordFromAddr"% GAddrComputeFmaskInfo*%GAddrComputeFmaskAddrFromCoord*%GAddrComputeFmaskCoordFromAddr%GAddrGetVersion%8GAddrUseTileIndex*%GAddrExtractBankPipeSwizzle*%GAddrCombineBankPipeSwizzle&%GAddrComputeSliceSwizzle"%PGElemFlt32ToDepthPixel"% GElemFlt32ToColorPixel%GElemGetExportNorm&%GAddrConvertTileInfoToHW"%GAddrConvertTileIndex%\GAddrGetTileIndexADDR_ERROR%$GAddrLib::Destroy"%GAddrLib::GetVersion"%GAddrLib::UseTileIndex" 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GX2_SURFACE_FORMAT_TC_R32_SINTGX2_SURFACE_FORMAT_TCD_R32_FLOATGX2_SURFACE_FORMAT_TC_R16_G16_UNORMGX2_SURFACE_FORMAT_TC_R16_G16_UINTGX2_SURFACE_FORMAT_TC_R16_G16_SNORMGX2_SURFACE_FORMAT_TC_R16_G16_SINTGX2_SURFACE_FORMAT_TC_R16_G16_FLOATGX2_SURFACE_FORMAT_D_D24_S8_UNORMGX2_SURFACE_FORMAT_T_R24_UNORM_X8GX2_SURFACE_FORMAT_T_X24_G8_UINTGX2_SURFACE_FORMAT_D_D24_S8_FLOATGX2_SURFACE_FORMAT_TC_R11_G11_B10_FLOATGX2_SURFACE_FORMAT_TCS_R10_G10_B10_A2_UNORMGX2_SURFACE_FORMAT_TC_R10_G10_B10_A2_UINTGX2_SURFACE_FORMAT_T_R10_G10_B10_A2_SNORMGX2_SURFACE_FORMAT_TC_R10_G10_B10_A2_SNORMGX2_SURFACE_FORMAT_TC_R10_G10_B10_A2_SINTGX2_SURFACE_FORMAT_TCS_R8_G8_B8_A8_UNORMGX2_SURFACE_FORMAT_TC_R8_G8_B8_A8_UINTGX2_SURFACE_FORMAT_TC_R8_G8_B8_A8_SNORMGX2_SURFACE_FORMAT_TC_R8_G8_B8_A8_SINTGX2_SURFACE_FORMAT_TCS_R8_G8_B8_A8_SRGBGX2_SURFACE_FORMAT_TCS_A2_B10_G10_R10_UNORMGX2_SURFACE_FORMAT_TC_A2_B10_G10_R10_UINTGX2_SURFACE_FORMAT_D_D32_FLOAT_S8_UINT_X24GX2_SURFACE_FORMAT_T_R32_FLOAT_X8_X24GX2_SURFACE_FORMAT_T_X32_G8_UINT_X24GX2_SURFACE_FORMAT_TC_R32_G32_UINTGX2_SURFACE_FORMAT_TC_R32_G32_SINTGX2_SURFACE_FORMAT_TC_R32_G32_FLOATGX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_UNORMGX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_UINTGX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_SNORMGX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_SINT GX2_SURFACE_FORMAT_TC_R16_G16_B16_A16_FLOAT"GX2_SURFACE_FORMAT_TC_R32_G32_B32_A32_UINT"GX2_SURFACE_FORMAT_TC_R32_G32_B32_A32_SINT#GX2_SURFACE_FORMAT_TC_R32_G32_B32_A32_FLOAT1GX2_SURFACE_FORMAT_T_BC1_UNORM1GX2_SURFACE_FORMAT_T_BC1_SRGB2GX2_SURFACE_FORMAT_T_BC2_UNORM2GX2_SURFACE_FORMAT_T_BC2_SRGB3GX2_SURFACE_FORMAT_T_BC3_UNORM3GX2_SURFACE_FORMAT_T_BC3_SRGB4GX2_SURFACE_FORMAT_T_BC4_UNORM4GX2_SURFACE_FORMAT_T_BC4_SNORM5GX2_SURFACE_FORMAT_T_BC5_UNORM5GX2_SURFACE_FORMAT_T_BC5_SNORMGX2_SURFACE_FORMAT_T_NV12_UNORMGX2_SURFACE_FORMAT_FIRST?GX2_SURFACE_FORMAT_LAST6Gt"_GX2SurfaceFormatW4_GX2SurfaceFormat@@>TC2ConvertOptionsUTC2ConvertOptions@@ $ #%t&.GX2_SURFACE_DIM_1DGX2_SURFACE_DIM_2DGX2_SURFACE_DIM_3DGX2_SURFACE_DIM_CUBEGX2_SURFACE_DIM_1D_ARRAYGX2_SURFACE_DIM_2D_ARRAYGX2_SURFACE_DIM_2D_MSAAGX2_SURFACE_DIM_2D_MSAA_ARRAYGX2_SURFACE_DIM_FIRSTGX2_SURFACE_DIM_LAST2 t(_GX2SurfaceDimW4_GX2SurfaceDim@@GX2_AA_MODE_1XGX2_AA_MODE_2XGX2_AA_MODE_4XGX2_AA_MODE_8XGX2_AA_MODE_FIRSTGX2_AA_MODE_LAST*t*_GX2AAModeW4_GX2AAMode@@GX2_SURFACE_USE_TEXTUREGX2_SURFACE_USE_COLOR_BUFFERGX2_SURFACE_USE_DEPTH_BUFFERGX2_SURFACE_USE_SCAN_BUFFERGX2_SURFACE_USE_FTVGX2_SURFACE_USE_COLOR_BUFFER_TEXTUREGX2_SURFACE_USE_DEPTH_BUFFER_TEXTUREGX2_SURFACE_USE_COLOR_BUFFER_FTVGX2_SURFACE_USE_COLOR_BUFFER_TEXTURE_FTVGX2_SURFACE_USE_FIRSTGX2_SURFACE_USE_LAST2 t,_GX2SurfaceUseW4_GX2SurfaceUse@@GX2R_RESOURCE_FLAGS_NONEGX2R_BIND_NONEGX2R_BIND_TEXTUREGX2R_BIND_COLOR_BUFFERGX2R_BIND_DEPTH_BUFFERGX2R_BIND_SCAN_BUFFERGX2R_BIND_VERTEX_BUFFER GX2R_BIND_INDEX_BUFFER@GX2R_BIND_UNIFORM_BLOCKGX2R_BIND_SHADER_PROGRAMGX2R_BIND_STREAM_OUTPUTGX2R_BIND_DISPLAY_LISTGX2R_BIND_GS_RINGGX2R_USAGE_NONEGX2R_USAGE_CPU_READGX2R_USAGE_CPU_WRITE GX2R_USAGE_GPU_READ@GX2R_USAGE_GPU_WRITEGX2R_USAGE_DMA_READGX2R_USAGE_DMA_WRITEGX2R_USAGE_FORCE_MEM1GX2R_USAGE_FORCE_MEM2GX2R_USAGE_MEM_DEFAULTGX2R_USAGE_CPU_READWRITE`GX2R_USAGE_GPU_READWRITE@GX2R_USAGE_NON_CPU_WRITEGX2R_OPTION_NONEGX2R_OPTION_IGNORE_IN_USEGX2R_OPTION_FIRSTGX2R_OPTION_NO_CPU_INVALIDATE GX2R_OPTION_NO_GPU_INVALIDATE@GX2R_OPTION_LOCK_READONLYGX2R_OPTION_NO_TOUCH_DESTROYGX2R_OPTION_LAST0GX2R_OPTION_NO_INVALIDATEGX2R_OPTION_MASKGX2R_RESOURCE_FLAG_RESERVED2 GX2R_RESOURCE_FLAG_RESERVED1@GX2R_RESOURCE_FLAG_RESERVED0:'t._GX2RResourceFlagsW4_GX2RResourceFlags@@u#4f )dim uwidth uheight u depth unumMips #format +aa -use /resourceFlags u imageSize (imagePtr (pMem u0mipSize 8mipPtr @tileMode uDswizzle uHalignment uLpitch 0PmipOffset21_GX2SurfaceU_GX2Surface@@t3"MF_NONEMF_BOX.t5TC2MipFilterW4TC2MipFilter@@t6t7 tuseWeighting AweightingRed AweightingGreen AweightingBlue t useAdaptiveWeighting t$bc1usealpha  (bc1alphathreshold>90TC2ConvertOptionsUTC2ConvertOptions@@ut;GX2_COMPONENT_X_RGX2_COMPONENT_Y_GGX2_COMPONENT_Z_BGX2_COMPONENT_W_AGX2_COMPONENT_C_0GX2_COMPONENT_C_1GX2_COMPONENT_FIRSTGX2_COMPONENT_LAST.t=_GX2ComponentW4_GX2Component@@%ZGX2_STAT_CB_DUAL_SOURCE_COLOR_QUAD_FRAGMENT[GX2_STAT_CB_DRAWN_QUAD\GX2_STAT_CB_DRAWN_PIXEL]GX2_STAT_CB_DRAWN_QUAD_FRAGMENT^GX2_STAT_CB_BLENDER_RAW_HAZARD_STALL_GX2_STAT_CB_EVENT`GX2_STAT_CB_EVENT_CACHE_FLUSH_TSaGX2_STAT_CB_EVENT_CONTEXT_DONEbGX2_STAT_CB_EVENT_CACHE_FLUSHcGX2_STAT_CB_EVENT_CACHE_FLUSH_AND_INV_TS_EVENTdGX2_STAT_CB_EVENT_CACHE_FLUSH_AND_INV_EVENTeGX2_STAT_CB_EVENT_FLUSH_AND_INV_CB_DATA_TSfGX2_STAT_CB_EVENT_FLUSH_AND_INV_CB_METAgGX2_STAT_CB_CMASK_READ_DATA_0XChGX2_STAT_CB_CMASK_READ_DATA_0XDiGX2_STAT_CB_CMASK_READ_DATA_0XEjGX2_STAT_CB_CMASK_READ_DATA_0XFkGX2_STAT_CB_CMASK_WRITE_DATA_0XClGX2_STAT_CB_CMASK_WRITE_DATA_0XDmGX2_STAT_CB_CMASK_WRITE_DATA_0XEnGX2_STAT_CB_CMASK_WRITE_DATA_0XFoGX2_STAT_CB_CORE_SCLK_VLDpGX2_STAT_CB_REG_SCLK_VLDGX2_STAT_CB_FIRSTpGX2_STAT_CB_LASTGX2_STAT_DB_SC_DB_TILE_SENDSGX2_STAT_DB_SC_DB_TILE_BUSYGX2_STAT_DB_SC_DB_TILE_STALLSGX2_STAT_DB_SC_DB_TILE_EVENTSGX2_STAT_DB_SC_DB_TILE_TILESGX2_STAT_DB_SC_DB_TILE_COVEREDGX2_STAT_DB_HIZ_TC_READ_STARVEDGX2_STAT_DB_HIZ_TC_WRITE_STALLGX2_STAT_DB_HIZ_QTILES_CULLED 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GX2_STAT_DB_DB_SC_QUAD_SQUADS!GX2_STAT_DB_DB_SC_QUAD_TILES"GX2_STAT_DB_DB_SC_QUAD_QUADS#GX2_STAT_DB_DB_CB_TILE_SENDS$GX2_STAT_DB_DB_CB_TILE_BUSY%GX2_STAT_DB_DB_CB_TILE_STALLS&GX2_STAT_DB_SX_DB_QUAD_SENDS'GX2_STAT_DB_SX_DB_QUAD_BUSY(GX2_STAT_DB_SX_DB_QUAD_STALLS)GX2_STAT_DB_SX_DB_QUAD_QUADS*GX2_STAT_DB_SX_DB_QUAD_PIXELS+GX2_STAT_DB_SX_DB_QUAD_EXPORTS,GX2_STAT_DB_SH_QUADS_OUTSTANDING_SUM-GX2_STAT_DB_DB_CB_LQUAD_SENDS.GX2_STAT_DB_DB_CB_LQUAD_BUSY/GX2_STAT_DB_DB_CB_LQUAD_STALLS0GX2_STAT_DB_DB_CB_LQUAD_QUADS1GX2_STAT_DB_TILE_RD_SENDS2GX2_STAT_DB_MI_TILE_RD_OUTSTANDING_SUM3GX2_STAT_DB_QUAD_RD_SENDS4GX2_STAT_DB_QUAD_RD_BUSY5GX2_STAT_DB_QUAD_RD_MI_STALL6GX2_STAT_DB_QUAD_RD_RW_COLLISION7GX2_STAT_DB_QUAD_RD_TAG_STALL8GX2_STAT_DB_QUAD_RD_32BYTE_REQS9GX2_STAT_DB_QUAD_RD_PANIC:GX2_STAT_DB_MI_QUAD_RD_OUTSTANDING_SUM;GX2_STAT_DB_QUAD_RDRET_SENDSGX2_STAT_DB_TILE_WR_ACKS?GX2_STAT_DB_MI_TILE_WR_OUTSTANDING_SUM@GX2_STAT_DB_QUAD_WR_SENDSAGX2_STAT_DB_QUAD_WR_BUSYBGX2_STAT_DB_QUAD_WR_MI_STALLCGX2_STAT_DB_QUAD_WR_COHERENCY_STALLDGX2_STAT_DB_QUAD_WR_ACKSEGX2_STAT_DB_MI_QUAD_WR_OUTSTANDING_SUMFGX2_STAT_DB_TILE_CACHE_MISSESGGX2_STAT_DB_TILE_CACHE_HITSHGX2_STAT_DB_TILE_CACHE_FLUSHESIGX2_STAT_DB_TILE_CACHE_SURFACE_STALLJGX2_STAT_DB_TILE_CACHE_STARVESKGX2_STAT_DB_TILE_CACHE_MEM_RETURN_STARVELGX2_STAT_DB_TCP_DISPATCHER_READSMGX2_STAT_DB_TCP_PREFETCHER_READSNGX2_STAT_DB_TCP_PRELOADER_READSOGX2_STAT_DB_TCP_DISPATCHER_FLUSHESPGX2_STAT_DB_TCP_PREFETCHER_FLUSHESQGX2_STAT_DB_TCP_PRELOADER_FLUSHESRGX2_STAT_DB_DEPTH_TILE_CACHE_SENDSSGX2_STAT_DB_DEPTH_TILE_CACHE_BUSYTGX2_STAT_DB_DEPTH_TILE_CACHE_STARVESUGX2_STAT_DB_DEPTH_TILE_CACHE_DTILE_LOCKEDVGX2_STAT_DB_DEPTH_TILE_CACHE_ALLOC_STALLWGX2_STAT_DB_DEPTH_TILE_CACHE_MISSESXGX2_STAT_DB_DEPTH_TILE_CACHE_HITSYGX2_STAT_DB_DEPTH_TILE_CACHE_FLUSHESZGX2_STAT_DB_DEPTH_TILE_CACHE_NOOP_TILE[GX2_STAT_DB_DEPTH_TILE_CACHE_DETAILED_NOOP\GX2_STAT_DB_DEPTH_TILE_CACHE_EVENT]GX2_STAT_DB_DEPTH_TILE_CACHE_TILE_FREES^GX2_STAT_DB_DEPTH_TILE_CACHE_DATA_FREES_GX2_STAT_DB_DEPTH_TILE_CACHE_MEM_RETURN_STARVE`GX2_STAT_DB_STENCIL_CACHE_MISSESaGX2_STAT_DB_STENCIL_CACHE_HITSbGX2_STAT_DB_STENCIL_CACHE_FLUSHEScGX2_STAT_DB_STENCIL_CACHE_STARVESdGX2_STAT_DB_STENCIL_CACHE_FREESeGX2_STAT_DB_Z_CACHE_SEPARATE_Z_MISSESfGX2_STAT_DB_Z_CACHE_SEPARATE_Z_HITSgGX2_STAT_DB_Z_CACHE_SEPARATE_Z_FLUSHEShGX2_STAT_DB_Z_CACHE_SEPARATE_Z_STARVESiGX2_STAT_DB_Z_CACHE_PMASK_MISSESjGX2_STAT_DB_Z_CACHE_PMASK_HITSkGX2_STAT_DB_Z_CACHE_PMASK_FLUSHESlGX2_STAT_DB_Z_CACHE_PMASK_STARVESmGX2_STAT_DB_Z_CACHE_FREESnGX2_STAT_DB_PLANE_CACHE_MISSESoGX2_STAT_DB_PLANE_CACHE_HITSpGX2_STAT_DB_PLANE_CACHE_FLUSHESqGX2_STAT_DB_PLANE_CACHE_STARVESrGX2_STAT_DB_PLANE_CACHE_FREESsGX2_STAT_DB_FLUSH_EXPANDED_STENCILtGX2_STAT_DB_FLUSH_COMPRESSED_STENCILuGX2_STAT_DB_FLUSH_SINGLE_STENCILvGX2_STAT_DB_FLUSH_1PLANEwGX2_STAT_DB_FLUSH_2PLANExGX2_STAT_DB_FLUSH_3PLANEyGX2_STAT_DB_FLUSH_4PLANEzGX2_STAT_DB_FLUSH_5PLANE{GX2_STAT_DB_FLUSH_6PLANE|GX2_STAT_DB_FLUSH_7PLANE}GX2_STAT_DB_FLUSH_8PLANE~GX2_STAT_DB_FLUSH_9PLANEGX2_STAT_DB_FLUSH_10PLANEGX2_STAT_DB_FLUSH_11PLANEGX2_STAT_DB_FLUSH_12PLANEGX2_STAT_DB_FLUSH_13PLANEGX2_STAT_DB_FLUSH_14PLANEGX2_STAT_DB_FLUSH_15PLANEGX2_STAT_DB_FLUSH_16PLANEGX2_STAT_DB_FLUSH_EXPANDED_ZGX2_STAT_DB_EARLYZ_WAITING_FOR_POSTZ_DONEGX2_STAT_DB_REZ_WAITING_FOR_POSTZ_DONEGX2_STAT_DB_DK_TILE_SENDSGX2_STAT_DB_DK_TILE_BUSYGX2_STAT_DB_DK_TILE_QUAD_STARVESGX2_STAT_DB_DK_TILE_STALLSGX2_STAT_DB_DK_SQUAD_SENDSGX2_STAT_DB_DK_SQUAD_BUSYGX2_STAT_DB_DK_SQUAD_STALLSGX2_STAT_DB_OP_PIPE_BUSYGX2_STAT_DB_OP_PIPE_MC_READ_STALLGX2_STAT_DB_QC_BUSYGX2_STAT_DB_QC_XFCGX2_STAT_DB_QC_CONFLICTSGX2_STAT_DB_QC_FULL_STALLGX2_STAT_DB_QC_IN_PREZ_TILE_STALLS_POSTZGX2_STAT_DB_QC_IN_POSTZ_TILE_STALLS_PREZGX2_STAT_DB_TSC_INSERT_SUMMARIZE_STALLGX2_STAT_DB_TL_BUSYGX2_STAT_DB_TL_DTC_READ_STARVEDGX2_STAT_DB_TL_Z_FETCH_STALLGX2_STAT_DB_TL_STENCIL_STALLGX2_STAT_DB_TL_Z_DECOMPRESS_STALLGX2_STAT_DB_TL_STENCIL_LOCKED_STALLGX2_STAT_DB_TL_EVENTSGX2_STAT_DB_TL_SUMMARIZE_SQUADSGX2_STAT_DB_TL_FLUSH_EXPAND_SQUADSGX2_STAT_DB_TL_EXPAND_SQUADSGX2_STAT_DB_TL_PREZ_SQUADSGX2_STAT_DB_TL_POSTZ_SQUADSGX2_STAT_DB_TL_PREZ_NOOP_SQUADSGX2_STAT_DB_TL_POSTZ_NOOP_SQUADSGX2_STAT_DB_TL_GETZ_SQUADSGX2_STAT_DB_TL_TILE_OPSGX2_STAT_DB_TL_IN_XFCGX2_STAT_DB_TL_IN_SINGLE_STENCIL_EXPAND_STALLGX2_STAT_DB_TL_IN_CONSTANT_STENCIL_WALK_STALLGX2_STAT_DB_TL_IN_FAST_Z_STALLGX2_STAT_DB_TL_OUT_XFCGX2_STAT_DB_TL_OUT_SQUADSGX2_STAT_DB_ZF_PLANE_MULTICYCLEGX2_STAT_DB_POSTZ_SAMPLES_PASSING_ZGX2_STAT_DB_POSTZ_SAMPLES_FAILING_ZGX2_STAT_DB_POSTZ_SAMPLES_FAILING_SGX2_STAT_DB_PREZ_SAMPLES_PASSING_ZGX2_STAT_DB_PREZ_SAMPLES_FAILING_ZGX2_STAT_DB_PREZ_SAMPLES_FAILING_SGX2_STAT_DB_TS_TC_UPDATE_STALLGX2_STAT_DB_SC_KICK_STARTGX2_STAT_DB_SC_KICK_ENDGX2_STAT_DB_SX_DB_MEM_EXPORTSGX2_STAT_DB_SX_DB_MEM_EXPORTS_ACKEDGX2_STAT_DB_SX_DB_ACK_MEM_EXPORTSGX2_STAT_DB_SX_DB_ACK_MEM_EXPORTS_ACKEDGX2_STAT_DB_MEM_EXPORT_BUSYGX2_STAT_DB_MEM_EXPORT_MI_STALLGX2_STAT_DB_MEM_EXPORT_TAG_STALLGX2_STAT_DB_CLOCK_REG_ACTIVEGX2_STAT_DB_CLOCK_MAIN_ACTIVEGX2_STAT_DB_CLOCK_MEM_EXPORT_ACTIVEGX2_STAT_DB_ESR_OUT_BUSYGX2_STAT_DB_ESR_OUT_SC_STALLGX2_STAT_DB_ESR_OUT_LQUAD_FIFO_FULL_STALLGX2_STAT_DB_ETR_OUT_SENDGX2_STAT_DB_ETR_OUT_BUSYGX2_STAT_DB_ETR_OUT_LTILE_PROBE_FIFO_FULL_STALLGX2_STAT_DB_ETR_OUT_CB_TILE_STALLGX2_STAT_DB_ETR_OUT_ESR_STALLGX2_STAT_DB_FIRSTGX2_STAT_DB_LASTGX2_STAT_PIPELINEGX2_STAT_PIPELINE_FIRSTGX2_STAT_PIPELINE_LASTGX2_STAT_CP_CP_COUNTGX2_STAT_CP_RBIU_FIFO_FULLGX2_STAT_CP_CSF_RTS_BUT_MIU_NOT_RTRGX2_STAT_CP_CSF_I1_BASE_SIZE_FIFO_FULL_6XXGX2_STAT_CP_CSF_I2_BASE_SIZE_FIFO_FULL_6XXGX2_STAT_CP_CSF_ST_BASE_SIZE_FIFO_FULLGX2_STAT_CP_RING_REORDER_QUEUE_FULLGX2_STAT_CP_I1_REORDER_QUEUE_FULLGX2_STAT_CP_I2_REORDER_QUEUE_FULL GX2_STAT_CP_ST_REORDER_QUEUE_FULL GX2_STAT_CP_CSF_RB_WPTR_NEQ_RPTR GX2_STAT_CP_CSF_I1_SIZE_NEQ_ZERO GX2_STAT_CP_CSF_I2_SIZE_NEQ_ZERO GX2_STAT_CP_BRUSH_WR_CONFIRM_FIFO_FULL_6XXGX2_STAT_CP_CP_GRBM_DWORDS_SENTGX2_STAT_CP_ME_PARSER_BUSYGX2_STAT_CP_COUNT_TYPE0_PACKETSGX2_STAT_CP_COUNT_TYPE3_PACKETSGX2_STAT_CP_CSF_RBI1I2_FETCHINGGX2_STAT_CP_ME_STALLED_FOR_DATA_FROM_PFPGX2_STAT_CP_CP_GRBM_OUT_OF_CREDITSGX2_STAT_CP_CP_PFP_GRBM_OUT_OF_CREDITSGX2_STAT_CP_RCIU_STALLED_ON_ME_READGX2_STAT_CP_RCIU_STALLED_ON_DMA_READGX2_STAT_CP_MIU_STALLED_ON_RDREQ_CREDITS_6XXGX2_STAT_CP_MIU_STALLED_ON_WRREQ_CREDITS_6XXGX2_STAT_CP_MIU_STALLED_ON_WRCLEAN_PHASE_6XXGX2_STAT_CP_SSU_STALLED_ON_ACTIVE_CNTXGX2_STAT_CP_SSU_STALLED_ON_CLEAN_SIGNALSGX2_STAT_CP_QU_STALLED_ON_RECT_DONE_PULSE_6XXGX2_STAT_CP_QU_STALLED_ON_RECT_DONE_WR_CONFIRM_6XXGX2_STAT_CP_QU_STALLED_ON_SC_EOP_DONE_PULSE GX2_STAT_CP_QU_STALLED_ON_SX_EOP_DONE_PULSE!GX2_STAT_CP_QU_STALLED_ON_EOP_DONE_WR_CONFIRM"GX2_STAT_CP_QU_STALLED_ON_SIGNAL_SEMAPHORE#GX2_STAT_CP_QU_STALLED_ON_STREAMOUT_ADDRESS$GX2_STAT_CP_QU_STALLED_ON_STREAMOUT_DATA%GX2_STAT_CP_QU_STALLED_ON_PIPELINE_STATISTICS&GX2_STAT_CP_PFP_STALLED_ON_CSF_READY'GX2_STAT_CP_PFP_STALLED_ON_MEQ_READY(GX2_STAT_CP_PFP_STALLED_ON_VGT_READY)GX2_STAT_CP_PFP_STALLED_ON_PENDING_MULTIPASS*GX2_STAT_CP_ME_STALLED_ON_BRUSH_WR_CONFIRM_6XX+GX2_STAT_CP_ME_STALLED_ON_BUSY_BRUSH_LOGIC_6XX,GX2_STAT_CP_ME_STALLED_ON_NO_AVAIL_CR_CNTX_6XX-GX2_STAT_CP_ME_STALLED_ON_NO_AVAIL_GFX_CNTX.GX2_STAT_CP_ME_STALLED_WRITING_TO_RCIU/GX2_STAT_CP_ME_STALLED_WRITING_CONSTANTS0GX2_STAT_CP_RBIU_STALLED_WRITING_DMA_REGS1GX2_STAT_CP_RBIU_STALLED_WRITING_SEM_REGS2GX2_STAT_CP_RBIU_STALLED_WRITING_MC_WR_ADDR3GX2_STAT_CP_RBIU_STALLED_WRITING_MC_RD_ADDR_6XX4GX2_STAT_CP_RBIU_STALLED_WRITING_EOPDONE_FIFO_6005GX2_STAT_CP_RBIU_STALLED_WRITING_RECTDONE_FIFO_6XX6GX2_STAT_CP_RBIU_STALLED_WRITING_STREAMOUT_FIFO_6007GX2_STAT_CP_RBIU_STALLED_WRITING_PIPESTATS_FIFO_6008GX2_STAT_CP_SEMAPHORE_BUSY_POLLING_FOR_PASS9GX2_STAT_CP_LOAD_STALLED_ON_SET_COHERENCY:GX2_STAT_CP_ME_STALLED_ON_PARTIAL_FLUSH;GX2_STAT_CP_CSF_IDLE_CONFIRM_TO_ACTIVE_6XX<GX2_STAT_CP_DYNAMIC_CLK_VALID=GX2_STAT_CP_REGISTER_CLK_VALIDGX2_STAT_CP_FIRST=GX2_STAT_CP_LASTGX2_STAT_GRBM_COUNTGX2_STAT_GRBM_GUI_ACTIVEGX2_STAT_GRBM_VGT_NO_DMA_BUSYGX2_STAT_GRBM_VGT_DMA_BUSYGX2_STAT_GRBM_TA0_BUSYGX2_STAT_GRBM_TA1_BUSYGX2_STAT_GRBM_TA2_BUSYGX2_STAT_GRBM_TA3_BUSYGX2_STAT_GRBM_TC_BUSY_R6XX GX2_STAT_GRBM_SX_BUSY GX2_STAT_GRBM_SH_BUSY GX2_STAT_GRBM_SPI_BUSY GX2_STAT_GRBM_SMX_BUSY_R6XX GX2_STAT_GRBM_SC_BUSYGX2_STAT_GRBM_DRMDMA_BUSY_R6XXGX2_STAT_GRBM_PA_BUSYGX2_STAT_GRBM_DB0_BUSYGX2_STAT_GRBM_DB1_BUSYGX2_STAT_GRBM_DB2_BUSYGX2_STAT_GRBM_DB3_BUSYGX2_STAT_GRBM_CR_BUSY_R6XXGX2_STAT_GRBM_CP_COHER_BUSYGX2_STAT_GRBM_CP_BUSYGX2_STAT_GRBM_CP_DMA_BUSYGX2_STAT_GRBM_CB0_BUSYGX2_STAT_GRBM_CB1_BUSYGX2_STAT_GRBM_CB2_BUSYGX2_STAT_GRBM_CB3_BUSYGX2_STAT_GRBM_VC_BUSY_R6XXGX2_STAT_GRBM_EXTERN_STALLGX2_STAT_GRBM_CP_DMA_IDLE_STALLGX2_STAT_GRBM_GFX_IDLE_STALL GX2_STAT_GRBM_GFX_IDLE_CLEAN_STALL!GX2_STAT_GRBM_GFX_IDLE_STALL_R600"GX2_STAT_GRBM_GFX_IDLE_CLEAN_STALL_R600#GX2_STAT_GRBM_TA4_BUSY$GX2_STAT_GRBM_TA5_BUSY%GX2_STAT_GRBM_TA6_BUSY&GX2_STAT_GRBM_TA7_BUSY'GX2_STAT_GRBM_TA8_BUSY(GX2_STAT_GRBM_TA9_BUSY)GX2_STAT_GRBM_TA10_BUSY*GX2_STAT_GRBM_TA11_BUSY+GX2_STAT_GRBM_TA12_BUSY,GX2_STAT_GRBM_TA13_BUSY-GX2_STAT_GRBM_TA14_BUSY.GX2_STAT_GRBM_TA15_BUSY/GX2_STAT_GRBM_RESERVED00GX2_STAT_GRBM_RESERVED11GX2_STAT_GRBM_RESERVED22GX2_STAT_GRBM_RESERVED33GX2_STAT_GRBM_RESERVED44GX2_STAT_GRBM_RESERVED55GX2_STAT_GRBM_RESERVED66GX2_STAT_GRBM_RESERVED77GX2_STAT_GRBM_RESERVED88GX2_STAT_GRBM_RESERVED99GX2_STAT_GRBM_RESERVED10:GX2_STAT_GRBM_RESERVED11;GX2_STAT_GRBM_RESERVED12<GX2_STAT_GRBM_RESERVED13=GX2_STAT_GRBM_RESERVED14>GX2_STAT_GRBM_RESERVED15?GX2_STAT_GRBM_USER_DEFINED_BUSYGX2_STAT_GRBM_FIRST?GX2_STAT_GRBM_LAST GX2_STAT_PA_SU_PASX_REQ GX2_STAT_PA_SU_PASX_DISABLE_PIPE GX2_STAT_PA_SU_PASX_FIRST_VECTOR GX2_STAT_PA_SU_PASX_SECOND_VECTOR GX2_STAT_PA_SU_PASX_FIRST_DEAD GX2_STAT_PA_SU_PASX_SECOND_DEAD GX2_STAT_PA_SU_PASX_VTX_KILL_DISCARD GX2_STAT_PA_SU_PASX_VTX_NAN_DISCARD GX2_STAT_PA_SU_PA_INPUT_PRIM GX2_STAT_PA_SU_PA_INPUT_NULL_PRIM GX2_STAT_PA_SU_PA_INPUT_EVENT_FLAG GX2_STAT_PA_SU_PA_INPUT_FIRST_PRIM_SLOT GX2_STAT_PA_SU_PA_INPUT_END_OF_PACKET GX2_STAT_PA_SU_PA_INPUT_EXTENDED_EVENT GX2_STAT_PA_SU_CLPR_CULL_PRIM GX2_STAT_PA_SU_CLPR_VVUCP_CULL_PRIM GX2_STAT_PA_SU_CLPR_VV_CULL_PRIM GX2_STAT_PA_SU_CLPR_UCP_CULL_PRIM GX2_STAT_PA_SU_CLPR_VTX_KILL_CULL_PRIM GX2_STAT_PA_SU_CLPR_VTX_NAN_CULL_PRIM GX2_STAT_PA_SU_CLPR_CULL_TO_NULL_PRIM GX2_STAT_PA_SU_CLPR_VVUCP_CLIP_PRIM GX2_STAT_PA_SU_CLPR_VV_CLIP_PRIM GX2_STAT_PA_SU_CLPR_UCP_CLIP_PRIM GX2_STAT_PA_SU_CLPR_POINT_CLIP_CANDIDATE GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_1 GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_2 GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_3 GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_4 GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_5_8 GX2_STAT_PA_SU_CLPR_CLIP_PLANE_CNT_9_12 GX2_STAT_PA_SU_CLPR_CLIP_PLANE_NEAR GX2_STAT_PA_SU_CLPR_CLIP_PLANE_FAR! GX2_STAT_PA_SU_CLPR_CLIP_PLANE_LEFT" GX2_STAT_PA_SU_CLPR_CLIP_PLANE_RIGHT# GX2_STAT_PA_SU_CLPR_CLIP_PLANE_TOP$ GX2_STAT_PA_SU_CLPR_CLIP_PLANE_BOTTOM% GX2_STAT_PA_SU_CLPR_GSC_KILL_CULL_PRIM& GX2_STAT_PA_SU_CLPR_RASTER_KILL_CULL_PRIM' GX2_STAT_PA_SU_CLSM_NULL_PRIM( GX2_STAT_PA_SU_CLSM_TOTALLY_VISIBLE_PRIM) GX2_STAT_PA_SU_CLSM_CULL_TO_NULL_PRIM* GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_1+ GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_2, GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_3- GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_4. GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_5_8/ GX2_STAT_PA_SU_CLSM_OUT_PRIM_CNT_9_130 GX2_STAT_PA_SU_CLIPGA_VTE_KILL_PRIM1 GX2_STAT_PA_SU_SU_INPUT_PRIM2 GX2_STAT_PA_SU_SU_INPUT_CLIP_PRIM3 GX2_STAT_PA_SU_SU_INPUT_NULL_PRIM4 GX2_STAT_PA_SU_SU_INPUT_PRIM_DUAL5 GX2_STAT_PA_SU_SU_INPUT_CLIP_PRIM_DUAL6 GX2_STAT_PA_SU_SU_ZERO_AREA_CULL_PRIM7 GX2_STAT_PA_SU_SU_BACK_FACE_CULL_PRIM8 GX2_STAT_PA_SU_SU_FRONT_FACE_CULL_PRIM9 GX2_STAT_PA_SU_SU_POLYMODE_FACE_CULL: GX2_STAT_PA_SU_SU_POLYMODE_BACK_CULL; GX2_STAT_PA_SU_SU_POLYMODE_FRONT_CULL< GX2_STAT_PA_SU_SU_POLYMODE_INVALID_FILL= GX2_STAT_PA_SU_SU_OUTPUT_PRIM> GX2_STAT_PA_SU_SU_OUTPUT_CLIP_PRIM? GX2_STAT_PA_SU_SU_OUTPUT_NULL_PRIM@ GX2_STAT_PA_SU_SU_OUTPUT_EVENT_FLAGA GX2_STAT_PA_SU_SU_OUTPUT_FIRST_PRIM_SLOTB GX2_STAT_PA_SU_SU_OUTPUT_END_OF_PACKETC GX2_STAT_PA_SU_SU_OUTPUT_POLYMODE_FACED GX2_STAT_PA_SU_SU_OUTPUT_POLYMODE_BACKE GX2_STAT_PA_SU_SU_OUTPUT_POLYMODE_FRONTF GX2_STAT_PA_SU_SU_OUT_CLIP_POLYMODE_FACEG GX2_STAT_PA_SU_SU_OUT_CLIP_POLYMODE_BACKH GX2_STAT_PA_SU_SU_OUT_CLIP_POLYMODE_FRONTI GX2_STAT_PA_SU_SU_OUTPUT_PRIM_DUALJ GX2_STAT_PA_SU_SU_OUTPUT_CLIP_PRIM_DUALK GX2_STAT_PA_SU_SU_OUTPUT_POLYMODE_DUALL GX2_STAT_PA_SU_SU_OUTPUT_CLIP_POLYMODE_DUALM GX2_STAT_PA_SU_PASX_REQ_IDLEN GX2_STAT_PA_SU_PASX_REQ_BUSYO GX2_STAT_PA_SU_PASX_REQ_STALLEDP GX2_STAT_PA_SU_PASX_REC_IDLEQ GX2_STAT_PA_SU_PASX_REC_BUSYR GX2_STAT_PA_SU_PASX_REC_STARVED_SXS GX2_STAT_PA_SU_PASX_REC_STALLEDT GX2_STAT_PA_SU_PASX_REC_STALLED_POS_MEMU GX2_STAT_PA_SU_PASX_REC_STALLED_CCGSM_INV GX2_STAT_PA_SU_CCGSM_IDLEW GX2_STAT_PA_SU_CCGSM_BUSYX GX2_STAT_PA_SU_CCGSM_STALLEDY GX2_STAT_PA_SU_CLPRIM_IDLEZ GX2_STAT_PA_SU_CLPRIM_BUSY[ GX2_STAT_PA_SU_CLPRIM_STALLED\ GX2_STAT_PA_SU_CLPRIM_STARVED_CCGSM] GX2_STAT_PA_SU_CLIPSM_IDLE^ GX2_STAT_PA_SU_CLIPSM_BUSY_ GX2_STAT_PA_SU_CLIPSM_WAIT_CLIP_VERT_ENGH` GX2_STAT_PA_SU_CLIPSM_WAIT_HIGH_PRI_SEQa GX2_STAT_PA_SU_CLIPSM_WAIT_CLIPGAb GX2_STAT_PA_SU_CLIPSM_WAIT_AVAIL_VTE_CLIPc GX2_STAT_PA_SU_CLIPSM_WAIT_CLIP_OUTSMd GX2_STAT_PA_SU_CLIPGA_IDLEe GX2_STAT_PA_SU_CLIPGA_BUSYf GX2_STAT_PA_SU_CLIPGA_STARVED_VTE_CLIPg GX2_STAT_PA_SU_CLIPGA_STALLEDh GX2_STAT_PA_SU_CLIP_IDLEi GX2_STAT_PA_SU_CLIP_BUSYj GX2_STAT_PA_SU_SU_IDLEk GX2_STAT_PA_SU_SU_BUSYl GX2_STAT_PA_SU_SU_STARVED_CLIPm GX2_STAT_PA_SU_SU_STALLED_SCn GX2_STAT_PA_SU_PA_DYN_SCLK_VLDo GX2_STAT_PA_SU_PA_REG_SCLK_VLD GX2_STAT_PA_SU_FIRSTo GX2_STAT_PA_SU_LAST0GX2_STAT_PA_SC_SRPS_WINDOW_VALID0GX2_STAT_PA_SC_PSSW_WINDOW_VALID0GX2_STAT_PA_SC_TPQZ_WINDOW_VALID0GX2_STAT_PA_SC_QZQP_WINDOW_VALID0GX2_STAT_PA_SC_TRPK_WINDOW_VALID0GX2_STAT_PA_SC_SRPS_WINDOW_VALID_BUSY0GX2_STAT_PA_SC_PSSW_WINDOW_VALID_BUSY0GX2_STAT_PA_SC_TPQZ_WINDOW_VALID_BUSY0GX2_STAT_PA_SC_QZQP_WINDOW_VALID_BUSY 0GX2_STAT_PA_SC_TRPK_WINDOW_VALID_BUSY 0GX2_STAT_PA_SC_STARVED_BY_PA 0GX2_STAT_PA_SC_STALLED_BY_PRIMFIFO 0GX2_STAT_PA_SC_STARVED_BY_DB_TILE 0GX2_STAT_PA_SC_STARVED_BY_DB_QUAD0GX2_STAT_PA_SC_STALLED_BY_TILEORDERFIFO0GX2_STAT_PA_SC_STALLED_BY_TILEFIFO0GX2_STAT_PA_SC_STALLED_BY_QUADFIFO0GX2_STAT_PA_SC_STALLED_BY_DB_TILE0GX2_STAT_PA_SC_STALLED_BY_DB_QUAD0GX2_STAT_PA_SC_STALLED_BY_SX0GX2_STAT_PA_SC_STALLED_BY_SPI0GX2_STAT_PA_SC_SCISSOR_DISCARD0GX2_STAT_PA_SC_BB_DISCARD0GX2_STAT_PA_SC_MULTICHIP_PRIM_DISCARD0GX2_STAT_PA_SC_SUPERTILE_COUNT0GX2_STAT_PA_SC_SUPERTILE_PER_PRIM_H00GX2_STAT_PA_SC_SUPERTILE_PER_PRIM_H10GX2_STAT_PA_SC_SUPERTILE_PER_PRIM_H20GX2_STAT_PA_SC_SUPERTILE_PER_PRIM_H30GX2_STAT_PA_SC_SUPERTILE_PER_PRIM_H40GX2_STAT_PA_SC_SUPERTILE_PER_PRIM_H50GX2_STAT_PA_SC_SUPERTILE_PER_PRIM_H6 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_SC_P2_HIZ_QUAD_PER_TILE_H00GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H10GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H20GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H30GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H40GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H50GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H60GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H70GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H80GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H90GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H100GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H110GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H120GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H130GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H140GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H150GX2_STAT_PA_SC_P2_HIZ_QUAD_PER_TILE_H160GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H00GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H10GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H20GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H30GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H40GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H50GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H60GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H70GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H80GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H90GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H100GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H110GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H120GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H130GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H140GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H150GX2_STAT_PA_SC_P3_HIZ_QUAD_PER_TILE_H160GX2_STAT_PA_SC_P0_HIZ_QUAD_COUNT0GX2_STAT_PA_SC_P1_HIZ_QUAD_COUNT0GX2_STAT_PA_SC_P2_HIZ_QUAD_COUNT0GX2_STAT_PA_SC_P3_HIZ_QUAD_COUNT0GX2_STAT_PA_SC_P0_DETAIL_QUAD_COUNT0GX2_STAT_PA_SC_P1_DETAIL_QUAD_COUNT0GX2_STAT_PA_SC_P2_DETAIL_QUAD_COUNT0GX2_STAT_PA_SC_P3_DETAIL_QUAD_COUNT0GX2_STAT_PA_SC_P0_DETAIL_QUAD_WITH_1_PIX0GX2_STAT_PA_SC_P0_DETAIL_QUAD_WITH_2_PIX0GX2_STAT_PA_SC_P0_DETAIL_QUAD_WITH_3_PIX0GX2_STAT_PA_SC_P0_DETAIL_QUAD_WITH_4_PIX0GX2_STAT_PA_SC_P1_DETAIL_QUAD_WITH_1_PIX0GX2_STAT_PA_SC_P1_DETAIL_QUAD_WITH_2_PIX0GX2_STAT_PA_SC_P1_DETAIL_QUAD_WITH_3_PIX0GX2_STAT_PA_SC_P1_DETAIL_QUAD_WITH_4_PIX0GX2_STAT_PA_SC_P2_DETAIL_QUAD_WITH_1_PIX0GX2_STAT_PA_SC_P2_DETAIL_QUAD_WITH_2_PIX0GX2_STAT_PA_SC_P2_DETAIL_QUAD_WITH_3_PIX0GX2_STAT_PA_SC_P2_DETAIL_QUAD_WITH_4_PIX0GX2_STAT_PA_SC_P3_DETAIL_QUAD_WITH_1_PIX0GX2_STAT_PA_SC_P3_DETAIL_QUAD_WITH_2_PIX0GX2_STAT_PA_SC_P3_DETAIL_QUAD_WITH_3_PIX0GX2_STAT_PA_SC_P3_DETAIL_QUAD_WITH_4_PIX0GX2_STAT_PA_SC_EARLYZ_QUAD_COUNT0GX2_STAT_PA_SC_EARLYZ_QUAD_WITH_1_PIX0GX2_STAT_PA_SC_EARLYZ_QUAD_WITH_2_PIX0GX2_STAT_PA_SC_EARLYZ_QUAD_WITH_3_PIX0GX2_STAT_PA_SC_EARLYZ_QUAD_WITH_4_PIX0GX2_STAT_PA_SC_TILE_REORDER_DB_CONFLICT_R6XX0GX2_STAT_PA_SC_PKR_QUAD_PER_ROW_H10GX2_STAT_PA_SC_PKR_QUAD_PER_ROW_H20GX2_STAT_PA_SC_PKR_QUAD_PER_ROW_H30GX2_STAT_PA_SC_PKR_QUAD_PER_ROW_H40GX2_STAT_PA_SC_PKR_END_OF_VECTOR0GX2_STAT_PA_SC_PKR_CONTROL_XFER0GX2_STAT_PA_SC_PKR_DBHANG_FORCE_EOV0GX2_STAT_PA_SC_REG_SCLK_BUSY0GX2_STAT_PA_SC_GRP0_DYN_SCLK_BUSY0GX2_STAT_PA_SC_GRP1_DYN_SCLK_BUSY0GX2_STAT_PA_SC_GRP2_DYN_SCLK_BUSY0GX2_STAT_PA_SC_GRP3_DYN_SCLK_BUSY0GX2_STAT_PA_SC_GRP4_DYN_SCLK_BUSY0GX2_STAT_PA_SC_FIRST0GX2_STAT_PA_SC_LAST@GX2_STAT_VGT_VGT_SPI_ESTHREAD_EVENT_WINDOW_ACTIVE@GX2_STAT_VGT_VGT_SPI_ESVERT_VALID@GX2_STAT_VGT_VGT_SPI_ESVERT_EOV@GX2_STAT_VGT_VGT_SPI_ESVERT_STALLED@GX2_STAT_VGT_VGT_SPI_ESVERT_STARVED_BUSY@GX2_STAT_VGT_VGT_SPI_ESVERT_STARVED_IDLE@GX2_STAT_VGT_VGT_SPI_ESVERT_STATIC@GX2_STAT_VGT_VGT_SPI_ESTHREAD_IS_EVENT@GX2_STAT_VGT_VGT_SPI_ESTHREAD_SEND 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PGX2_STAT_SQ_ITEMS_GT_32_PER_TYPE PGX2_STAT_SQ_ITEMS_GT_16_PER_TYPE PGX2_STAT_SQ_QUADS PGX2_STAT_SQ_THREADS_BUSY_PER_TYPE PGX2_STAT_SQ_THREADS_PER_TYPEPGX2_STAT_SQ_THREAD_LEVEL_PER_TYPEPGX2_STAT_SQ_THREAD_LEVEL_WAIT_CREATE_PER_TYPEPGX2_STAT_SQ_THREAD_LEVEL_UNALLOC_PARAM_PER_TYPEPGX2_STAT_SQ_THREAD_LEVEL_UNALLOC_PIX_PER_TYPEPGX2_STAT_SQ_THREAD_LEVEL_UNALLOC_POS_PER_TYPEPGX2_STAT_SQ_THREADS_NONPSPGX2_STAT_SQ_THREAD_LEVEL_NONPSPGX2_STAT_SQ_THREAD_LEVEL_WAIT_ALLOC_NONPSPGX2_STAT_SQ_THREAD_LEVEL_WAIT_OTHER_NONPSPGX2_STAT_SQ_THREAD_LEVEL_WAIT_ALLOC_PSPGX2_STAT_SQ_THREAD_LEVEL_WAIT_OTHER_PSPGX2_STAT_SQ_CF_INST_ISSUES_PER_TYPEPGX2_STAT_SQ_CF_INST_ISSUE_ONEPGX2_STAT_SQ_CF_INST_ISSUE_TWOPGX2_STAT_SQ_CF_INST_ISSUE_IDLE_PER_TYPEPGX2_STAT_SQ_CF_INST_ISSUE_FS_PER_TYPEPGX2_STAT_SQ_CF_INST_ISSUE_ALU_PER_TYPEPGX2_STAT_SQ_CF_INST_ISSUE_TF_PER_TYPE PGX2_STAT_SQ_CF_INST_ISSUE_VF_PER_TYPE!PGX2_STAT_SQ_CF_INST_ISSUE_EX_PER_TYPE"PGX2_STAT_SQ_CF_INST_ISSUE_SMX_WR_PER_TYPE#PGX2_STAT_SQ_CF_INST_ISSUE_SMX_RD_PER_TYPE$PGX2_STAT_SQ_CF_INST_ISSUE_GF_PER_TYPE%PGX2_STAT_SQ_CF_INST_ISSUE_OTHER_PER_TYPE&PGX2_STAT_SQ_CF_INST_ISSUE_ALU_CF_PER_TYPE'PGX2_STAT_SQ_CF_INST_ISSUE_BL_PER_TYPE(PGX2_STAT_SQ_CF_INST_REJECT_ALU_PER_TYPE)PGX2_STAT_SQ_CF_INST_REJECT_TF_PER_TYPE*PGX2_STAT_SQ_CF_INST_REJECT_VF_PER_TYPE+PGX2_STAT_SQ_CF_INST_REJECT_EX_PER_TYPE,PGX2_STAT_SQ_CF_INST_REJECT_SMX_WR_PER_TYPE-PGX2_STAT_SQ_CF_INST_REJECT_SMX_RD_PER_TYPE.PGX2_STAT_SQ_CF_INST_REJECT_GF_PER_TYPE/PGX2_STAT_SQ_CF_INST_REJECT_OTHER_PER_TYPE0PGX2_STAT_SQ_CF_INST_FIFO_SEND_ALU_PER_TYPE1PGX2_STAT_SQ_CF_INST_FIFO_SEND_TF_PER_TYPE2PGX2_STAT_SQ_CF_INST_FIFO_SEND_VF_PER_TYPE3PGX2_STAT_SQ_CF_INST_FIFO_SEND_EX_PER_TYPE4PGX2_STAT_SQ_CF_INST_FIFO_SEND_SMX_WR_PER_TYPE5PGX2_STAT_SQ_CF_INST_FIFO_SEND_SMX_RD_PER_TYPE6PGX2_STAT_SQ_CF_INST_FIFO_SEND_GF_PER_TYPE7PGX2_STAT_SQ_CF_INST_FIFO_SEND_OTHER_PER_TYPE8PGX2_STAT_SQ_CF_INST_FIFO_SEND_ALU_KCACHE_NONE_PER_TYPE9PGX2_STAT_SQ_CF_INST_FIFO_SEND_ALU_KCACHE_ONE_PER_TYPE:PGX2_STAT_SQ_CF_INST_FIFO_SEND_ALU_KCACHE_TWO_PER_TYPE;PGX2_STAT_SQ_CF_INST_FIFO_SEND_ALU_KCACHE_PER_TYPEPGX2_STAT_SQ_CF_INST_FIFO_FULL_VF?PGX2_STAT_SQ_CF_INST_FIFO_FULL_EX@PGX2_STAT_SQ_CF_INST_FIFO_FULL_SMXAPGX2_STAT_SQ_CF_INST_FIFO_FULL_GFBPGX2_STAT_SQ_CF_INST_FIFO_FULL_OTHERCPGX2_STAT_SQ_CF_INST_FIFO_LEVEL_ALUDPGX2_STAT_SQ_CF_INST_FIFO_LEVEL_TFEPGX2_STAT_SQ_CF_INST_FIFO_LEVEL_VFFPGX2_STAT_SQ_CF_INST_FIFO_LEVEL_EXGPGX2_STAT_SQ_CF_INST_FIFO_LEVEL_SMXHPGX2_STAT_SQ_CF_INST_FIFO_LEVEL_GFIPGX2_STAT_SQ_CF_INST_FIFO_LEVEL_OTHERJPGX2_STAT_SQ_CF_INST_FIFO_EMPTY_ALUKPGX2_STAT_SQ_CF_INST_FIFO_EMPTY_TFLPGX2_STAT_SQ_CF_INST_FIFO_EMPTY_VFMPGX2_STAT_SQ_CF_INST_FIFO_EMPTY_EXNPGX2_STAT_SQ_CF_INST_FIFO_EMPTY_SMXOPGX2_STAT_SQ_CF_INST_FIFO_EMPTY_GFPPGX2_STAT_SQ_CF_INST_FIFO_EMPTY_OTHERQPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_ALU_PER_TYPERPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_TF_PER_TYPESPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_VF_PER_TYPETPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_EX_PER_TYPEUPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_SMX_WR_PER_TYPEVPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_SMX_RD_PER_TYPEWPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_GF_PER_TYPEXPGX2_STAT_SQ_CF_INST_ISSUE_LEVEL_OTHER_PER_TYPEYPGX2_STAT_SQ_CF_INST_CHECKPOINTZPGX2_STAT_SQ_CF_INST_CHECKPOINT_BEFORE[PGX2_STAT_SQ_CF_INST_CHECKPOINT_ITEMS_VALID\PGX2_STAT_SQ_CF_INST_CHECKPOINT_ITEMS_VALID_NONE]PGX2_STAT_SQ_CF_INST_CHECKPOINT_ITEMS_ACTIVE^PGX2_STAT_SQ_CF_INST_CHECKPOINT_ITEMS_ACTIVE_NONE_PGX2_STAT_SQ_CF_INST_CHECKPOINT_QUADS_ACTIVE`PGX2_STAT_SQ_CF_INST_CHECKPOINT_QUADS_VALIDaPGX2_STAT_SQ_CF_INST_CHECKPOINT_THREADSbPGX2_STAT_SQ_CF_INST_CHECKPOINT_THREAD_LEVELcPGX2_STAT_SQ_CF_INST_FETCH_PER_TYPEdPGX2_STAT_SQ_CF_INST_FETCH_RETURNS_PER_TYPEePGX2_STAT_SQ_CF_INST_FETCH_INSTS_PER_TYPEfPGX2_STAT_SQ_CF_INST_FETCH_LEVEL_PER_TYPEgPGX2_STAT_SQ_CF_INST_FETCH_EXTRA_PER_TYPEhPGX2_STAT_SQ_CF_INST_FETCH_FIFO_SENDiPGX2_STAT_SQ_CF_INST_FETCH_FIFO_LEVELjPGX2_STAT_SQ_CF_INST_FETCH_FIFO_STALLkPGX2_STAT_SQ_CF_INST_CACHE_FIFO_SENDlPGX2_STAT_SQ_CF_INST_CACHE_FIFO_LEVELmPGX2_STAT_SQ_CF_INST_CACHE_FIFO_FULLnPGX2_STAT_SQ_CF_INST_ISSUE_DONESoPGX2_STAT_SQ_CF_INST_ISSUE_DONE_LEVELpPGX2_STAT_SQ_CF_INST_ISSUE_DONE_STALLqPGX2_STAT_SQ_CF_INST_ISSUE_DONE_FIFO_SENDrPGX2_STAT_SQ_CF_INST_ISSUE_DONE_FIFO_LEVELsPGX2_STAT_SQ_CF_INST_ALU_UPDATE_FIFO_SENDtPGX2_STAT_SQ_CF_INST_ALU_UPDATE_FIFO_LEVELuPGX2_STAT_SQ_CF_INST_ALU_UPDATE_FIFO_STALLvPGX2_STAT_SQ_OFIFO_LEVEL_PER_TYPEwPGX2_STAT_SQ_SX_EVENT_FIFO_FULL_PER_TYPExPGX2_STAT_SQ_ALU_CLAUSE_INSTR_GROUPS_PER_TYPEyPGX2_STAT_SQ_ALU_CLAUSE_INSTRS_PER_TYPEzPGX2_STAT_SQ_ALU_KWATERFALL_PER_TYPE{PGX2_STAT_SQ_ALU_GPRWATERFALL_PER_TYPE|PGX2_STAT_SQ_ALU_K_INSTR_PER_TYPE}PGX2_STAT_SQ_ALU_ICACHE_BUSY_PER_TYPE~PGX2_STAT_SQ_ALU_KCACHE_BUSY_PER_TYPEPGX2_STAT_SQ_ALU_MOVA_IDLE_WAIT_PER_TYPEPGX2_STAT_SQ_ALU_LOCK_WAITPGX2_STAT_SQ_ALU_ICACHE_READS_PER_TYPEPGX2_STAT_SQ_ALU_KCACHE_READS_PER_TYPEPGX2_STAT_SQ_ALU_DONE_FIFO_FULLPGX2_STAT_SQ_ALU_MOVA_WAIT_PER_TYPEPGX2_STAT_SQ_ALU_THREADS_IN_FIFO_PER_TYPEPGX2_STAT_SQ_UNUSED_006PGX2_STAT_SQ_UNUSED_007PGX2_STAT_SQ_TV_ICACHE_WAIT_PER_TYPEPGX2_STAT_SQ_UNUSED_010PGX2_STAT_SQ_UNUSED_001PGX2_STAT_SQ_UNUSED_002PGX2_STAT_SQ_TF_TA_STALL_PER_TYPEPGX2_STAT_SQ_VF_VC_INSTR_STALL_PER_TYPEPGX2_STAT_SQ_VF_VC_INDEX_STALL_PER_TYPEPGX2_STAT_SQ_UNUSED_003PGX2_STAT_SQ_UNUSED_008PGX2_STAT_SQ_UNUSED_004PGX2_STAT_SQ_UNUSED_009PGX2_STAT_SQ_EXPORT_INSTR_PER_TYPEPGX2_STAT_SQ_EXPORT_IDLEPGX2_STAT_SQ_EXPORT_SMX_AL_STALLPGX2_STAT_SQ_EXPORT_PC_AL_STALLPGX2_STAT_SQ_EXPORT_POS_AL_STALLPGX2_STAT_SQ_EXPORT_PIX_AL_STALLPGX2_STAT_SQ_EXPORT_POS_CYCLEPGX2_STAT_SQ_EXPORT_PIX_CYCLEPGX2_STAT_SQ_EXPORT_PC_CYCLEPGX2_STAT_SQ_EXPORT_SMX_CYCLE_PER_TYPEPGX2_STAT_SQ_CACHE_INVAL_ANYPGX2_STAT_SQ_CACHE_INVAL_ALLPGX2_STAT_SQ_CACHE_INVAL_CYCLESPGX2_STAT_SQ_CF_ICACHE_HITSPGX2_STAT_SQ_TF_ICACHE_HITSPGX2_STAT_SQ_VF_ICACHE_HITSPGX2_STAT_SQ_ALU_ICACHE_HITSPGX2_STAT_SQ_ALU_KCACHE_HITSPGX2_STAT_SQ_CF_ICACHE_MISSESPGX2_STAT_SQ_TF_ICACHE_MISSESPGX2_STAT_SQ_VF_ICACHE_MISSESPGX2_STAT_SQ_ALU_ICACHE_MISSESPGX2_STAT_SQ_ALU_KCACHE_MISSESPGX2_STAT_SQ_CF_ICACHE_DUP_MISSESPGX2_STAT_SQ_TF_ICACHE_DUP_MISSESPGX2_STAT_SQ_VF_ICACHE_DUP_MISSESPGX2_STAT_SQ_ALU_ICACHE_DUP_MISSESPGX2_STAT_SQ_ALU_KCACHE_DUP_MISSESPGX2_STAT_SQ_CF_ICACHE_ACCESSESPGX2_STAT_SQ_TF_ICACHE_ACCESSESPGX2_STAT_SQ_VF_ICACHE_ACCESSESPGX2_STAT_SQ_ALU_ICACHE_ACCESSESPGX2_STAT_SQ_ALU_KCACHE_ACCESSESPGX2_STAT_SQ_CF_ICACHE_INPUT_FIFO_ENTRIESPGX2_STAT_SQ_TF_ICACHE_INPUT_FIFO_ENTRIESPGX2_STAT_SQ_VF_ICACHE_INPUT_FIFO_ENTRIESPGX2_STAT_SQ_ALU_ICACHE_INPUT_FIFO_ENTRIESPGX2_STAT_SQ_ALU_KCACHE_INPUT_FIFO_ENTRIESPGX2_STAT_SQ_CF_ICACHE_MISS_MEM_STALLPGX2_STAT_SQ_TF_ICACHE_MISS_MEM_STALLPGX2_STAT_SQ_VF_ICACHE_MISS_MEM_STALLPGX2_STAT_SQ_ALU_ICACHE_MISS_MEM_STALLPGX2_STAT_SQ_ALU_KCACHE_MISS_MEM_STALLPGX2_STAT_SQ_CF_ICACHE_MISS_FIFO_STALLPGX2_STAT_SQ_TF_ICACHE_MISS_FIFO_STALLPGX2_STAT_SQ_VF_ICACHE_MISS_FIFO_STALLPGX2_STAT_SQ_ALU_ICACHE_MISS_FIFO_STALLPGX2_STAT_SQ_ALU_KCACHE_MISS_FIFO_STALLPGX2_STAT_SQ_CF_ICACHE_HIT_STALLPGX2_STAT_SQ_CF_ICACHE_MISS_LOCKED_STALLPGX2_STAT_SQ_TF_ICACHE_MISS_LOCKED_STALLPGX2_STAT_SQ_VF_ICACHE_MISS_LOCKED_STALLPGX2_STAT_SQ_ALU_ICACHE_MISS_LOCKED_STALLPGX2_STAT_SQ_ALU_KCACHE_MISS_LOCKED_STALLPGX2_STAT_SQ_CF_ICACHE_LOCKED_TAGSPGX2_STAT_SQ_TF_ICACHE_LOCKED_TAGSPGX2_STAT_SQ_VF_ICACHE_LOCKED_TAGSPGX2_STAT_SQ_ALU_ICACHE_LOCKED_TAGSPGX2_STAT_SQ_ALU_KCACHE_LOCKED_TAGSPGX2_STAT_SQ_CF_ICACHE_MISS_LOCKED_TAGSPGX2_STAT_SQ_TF_ICACHE_MISS_LOCKED_TAGSPGX2_STAT_SQ_VF_ICACHE_MISS_LOCKED_TAGSPGX2_STAT_SQ_ALU_ICACHE_MISS_LOCKED_TAGSPGX2_STAT_SQ_ALU_KCACHE_MISS_LOCKED_TAGSPGX2_STAT_SQ_CACHE_MEM_REQUESTSPGX2_STAT_SQ_CF_ICACHE_MEM_REQUESTSPGX2_STAT_SQ_TV_ICACHE_MEM_REQUESTSPGX2_STAT_SQ_ALU_ICACHE_MEM_REQUESTSPGX2_STAT_SQ_ALU_KCACHE_MEM_REQUESTSPGX2_STAT_SQ_CF_ICACHE_RD_WR_COLLISIONPGX2_STAT_SQ_CF_ICACHE_MISS_HIT_RD_COLLISIONPGX2_STAT_SQ_CF_ICACHE_MEM_REQUESTS_IN_FLIGHTPGX2_STAT_SQ_TV_ICACHE_MEM_REQUESTS_IN_FLIGHTPGX2_STAT_SQ_ALU_ICACHE_MEM_REQUESTS_IN_FLIGHTPGX2_STAT_SQ_ALU_KCACHE_MEM_REQUESTS_IN_FLIGHTPGX2_STAT_SQ_CF_ICACHE_MISS_FIFO_MISSESPGX2_STAT_SQ_TF_ICACHE_MISS_FIFO_MISSESPGX2_STAT_SQ_VF_ICACHE_MISS_FIFO_MISSESPGX2_STAT_SQ_ALU_ICACHE_MISS_FIFO_MISSESPGX2_STAT_SQ_ALU_KCACHE_MISS_FIFO_MISSESPGX2_STAT_SQ_CACHE_MEM_REQUESTS_IN_FLIGHTPGX2_STAT_SQ_CACHE_MEM_STALLPGX2_STAT_SQ_TM_TS64_STALLPGX2_STAT_SQ_TM_ALU_CONST_STALLPGX2_STAT_SQ_TM_LOOP_CONST_STALLPGX2_STAT_SQ_TM_TEX_BASE_CONST_STALLPGX2_STAT_SQ_TM_TEX_SAMPLER_STALLPGX2_STAT_SQ_TM_TEX_RESOURCE_STALLPGX2_STAT_SQ_UNUSED_005PGX2_STAT_SQ_TA_TEX_INSTRS_PER_TYPEPGX2_STAT_SQ_TA_VTX_INSTRS_PER_TYPEPGX2_STAT_SQ_VC_INSTRS_PER_TYPEPGX2_STAT_SQ_TV_LOCK_WAITPGX2_STAT_SQ_TA_SRC_CPGX2_STAT_SQ_VC_SRC_CPGX2_STAT_SQ_TV_KILLED_FETCH_PER_TYPEPGX2_STAT_SQ_TV_NULL_FETCH_PER_TYPEPGX2_STAT_SQ_TV_THREADS_IN_FIFO_PER_TYPEPGX2_STAT_SQ_EXPORT_SPQ_LEVELPGX2_STAT_SQ_EXPORT_SPQ_STALLPGX2_STAT_SQ_FIRSTPGX2_STAT_SQ_LAST`GX2_STAT_SPI_VS_WINDOW_VALID`GX2_STAT_SPI_VS_BUSY`GX2_STAT_SPI_VS_INPUT_STARVED`GX2_STAT_SPI_VS_VSR_STALL`GX2_STAT_SPI_VS_VSR_FULL`GX2_STAT_SPI_VS_GPR_STALL`GX2_STAT_SPI_VS_INPUT_STALL`GX2_STAT_SPI_VS_MEM_STALL`GX2_STAT_SPI_VS_TB_FULL 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pGX2_STAT_SX_DB0_STALL_CYCLES pGX2_STAT_SX_DB0_HALF_QUADS pGX2_STAT_SX_DB0_PIXELS pGX2_STAT_SX_DB0_PRED_PIXELS pGX2_STAT_SX_DB1_IDLE_CYCLESpGX2_STAT_SX_DB1_STALL_CYCLESpGX2_STAT_SX_DB1_HALF_QUADSpGX2_STAT_SX_DB1_PIXELSpGX2_STAT_SX_DB1_PRED_PIXELSpGX2_STAT_SX_DB2_IDLE_CYCLESpGX2_STAT_SX_DB2_STALL_CYCLESpGX2_STAT_SX_DB2_HALF_QUADSpGX2_STAT_SX_DB2_PIXELSpGX2_STAT_SX_DB2_PRED_PIXELSpGX2_STAT_SX_DB3_IDLE_CYCLESpGX2_STAT_SX_DB3_STALL_CYCLESpGX2_STAT_SX_DB3_HALF_QUADSpGX2_STAT_SX_DB3_PIXELSpGX2_STAT_SX_DB3_PRED_PIXELSpGX2_STAT_SX_DB4_IDLE_CYCLESpGX2_STAT_SX_DB4_STALL_CYCLESpGX2_STAT_SX_DB4_HALF_QUADSpGX2_STAT_SX_DB4_PIXELS pGX2_STAT_SX_DB4_PRED_PIXELS!pGX2_STAT_SX_DB5_IDLE_CYCLES"pGX2_STAT_SX_DB5_STALL_CYCLES#pGX2_STAT_SX_DB5_HALF_QUADS$pGX2_STAT_SX_DB5_PIXELS%pGX2_STAT_SX_DB5_PRED_PIXELS&pGX2_STAT_SX_DB6_IDLE_CYCLES'pGX2_STAT_SX_DB6_STALL_CYCLES(pGX2_STAT_SX_DB6_HALF_QUADS)pGX2_STAT_SX_DB6_PIXELS*pGX2_STAT_SX_DB6_PRED_PIXELS+pGX2_STAT_SX_DB7_IDLE_CYCLES,pGX2_STAT_SX_DB7_STALL_CYCLES-pGX2_STAT_SX_DB7_HALF_QUADS.pGX2_STAT_SX_DB7_PIXELS/pGX2_STAT_SX_DB7_PRED_PIXELS0pGX2_STAT_SX_PA_IDLE_CYCLES1pGX2_STAT_SX_PA_REQ2pGX2_STAT_SX_PA_POS3pGX2_STAT_SX_SPI_REQ_04pGX2_STAT_SX_SPI_REQ_15pGX2_STAT_SX_CLOCK_PS6pGX2_STAT_SX_CLOCK_VS7pGX2_STAT_SX_CLOCK_GS8pGX2_STAT_SX_CLOCK_ES9pGX2_STAT_SX_CLOCK:pGX2_STAT_SX_DB0_ACK_REQUEST;pGX2_STAT_SX_DB1_ACK_REQUESTpGX2_STAT_SX_DB4_ACK_REQUEST?pGX2_STAT_SX_DB5_ACK_REQUEST@pGX2_STAT_SX_DB6_ACK_REQUESTApGX2_STAT_SX_DB7_ACK_REQUESTBpGX2_STAT_SX_SC_CLOCKCpGX2_STAT_SX_PS_ADJUSTED_CLOCKDpGX2_STAT_SX_DB0_ALPHA_KILLED_PIXELSEpGX2_STAT_SX_DB1_ALPHA_KILLED_PIXELSFpGX2_STAT_SX_DB2_ALPHA_KILLED_PIXELSGpGX2_STAT_SX_DB3_ALPHA_KILLED_PIXELSHpGX2_STAT_SX_GATE_EN1IpGX2_STAT_SX_GATE_EN2JpGX2_STAT_SX_GATE_EN3KpGX2_STAT_SX_GATE_EN4LpGX2_STAT_SX_GATE_EN5MpGX2_STAT_SX_PIX_CLK_VALIDNpGX2_STAT_SX_SC_CLK_VALIDOpGX2_STAT_SX_PA_CLK_VALIDPpGX2_STAT_SX_REG_CLK_VALIDQpGX2_STAT_SX_SMX_CLK_VALIDRpGX2_STAT_SX_ARB_QP0_COLLISIONSpGX2_STAT_SX_ARB_QP1_COLLISIONTpGX2_STAT_SX_ARB_QP2_COLLISIONUpGX2_STAT_SX_ARB_QP3_COLLISIONpGX2_STAT_SX_FIRSTUpGX2_STAT_SX_LASTGX2_STAT_SMX_CACHE_IDLE_CYCLESGX2_STAT_SMX_CACHE_STALL_CYCLESGX2_STAT_SMX_WRITE_REQSGX2_STAT_SMX_WRITE_REQS_PSGX2_STAT_SMX_WRITE_REQS_VSGX2_STAT_SMX_WRITE_REQS_GSGX2_STAT_SMX_WRITE_REQS_ESGX2_STAT_SMX_WRITE_REQS_STREAM0GX2_STAT_SMX_WRITE_REQS_STREAM1 GX2_STAT_SMX_WRITE_REQS_STREAM2 GX2_STAT_SMX_WRITE_REQS_STREAM3 GX2_STAT_SMX_WRITE_REQS_SCRATCH GX2_STAT_SMX_WRITE_REQS_REDUCTION GX2_STAT_SMX_WRITE_REQS_RINGGX2_STAT_SMX_WRITE_REQS_FBUFFERGX2_STAT_SMX_WRITE_REQS_SCATTERGX2_STAT_SMX_VF_STALLGX2_STAT_SMX0_NUMBER_OF_PARTIAL_LINESGX2_STAT_SMX0_NUMBER_OF_ES_FLUSHGX2_STAT_SMX0_NUMBER_OF_GS_FLUSHGX2_STAT_SMX0_NUMBER_OF_SYNC_FLUSHGX2_STAT_SMX0_NUMBER_OF_ACK_FLUSHGX2_STAT_SMX0_NUMBER_OF_FLUSHGX2_STAT_SMX0_DW_WRITTENGX2_STAT_SMX0_DW_MISSGX2_STAT_SMX0_DB_STALLGX2_STAT_SMX1_NUMBER_OF_PARTIAL_LINESGX2_STAT_SMX1_NUMBER_OF_ES_FLUSHGX2_STAT_SMX1_NUMBER_OF_GS_FLUSHGX2_STAT_SMX1_NUMBER_OF_SYNC_FLUSHGX2_STAT_SMX1_NUMBER_OF_ACK_FLUSHGX2_STAT_SMX1_NUMBER_OF_FLUSH GX2_STAT_SMX1_DW_WRITTEN!GX2_STAT_SMX1_DW_MISS"GX2_STAT_SMX1_DB_STALL#GX2_STAT_SMX2_NUMBER_OF_PARTIAL_LINES$GX2_STAT_SMX2_NUMBER_OF_ES_FLUSH%GX2_STAT_SMX2_NUMBER_OF_GS_FLUSH&GX2_STAT_SMX2_NUMBER_OF_SYNC_FLUSH'GX2_STAT_SMX2_NUMBER_OF_ACK_FLUSH(GX2_STAT_SMX2_NUMBER_OF_FLUSH)GX2_STAT_SMX2_DW_WRITTEN*GX2_STAT_SMX2_DW_MISS+GX2_STAT_SMX2_DB_STALL,GX2_STAT_SMX3_NUMBER_OF_PARTIAL_LINES-GX2_STAT_SMX3_NUMBER_OF_ES_FLUSH.GX2_STAT_SMX3_NUMBER_OF_GS_FLUSH/GX2_STAT_SMX3_NUMBER_OF_SYNC_FLUSH0GX2_STAT_SMX3_NUMBER_OF_ACK_FLUSH1GX2_STAT_SMX3_NUMBER_OF_FLUSH2GX2_STAT_SMX3_DW_WRITTEN3GX2_STAT_SMX3_DW_MISS4GX2_STAT_SMX3_DB_STALL5GX2_STAT_SMX0_SET0_CNT6GX2_STAT_SMX0_SET1_CNT7GX2_STAT_SMX0_SET2_CNT8GX2_STAT_SMX0_SET3_CNT9GX2_STAT_SMX0_SET4_CNT:GX2_STAT_SMX0_SET5_CNT;GX2_STAT_SMX0_SET6_CNTGX2_STAT_SMX1_SET1_CNT?GX2_STAT_SMX1_SET2_CNT@GX2_STAT_SMX1_SET3_CNTAGX2_STAT_SMX1_SET4_CNTBGX2_STAT_SMX1_SET5_CNTCGX2_STAT_SMX1_SET6_CNTDGX2_STAT_SMX1_SET7_CNTEGX2_STAT_SMX2_SET0_CNTFGX2_STAT_SMX2_SET1_CNTGGX2_STAT_SMX2_SET2_CNTHGX2_STAT_SMX2_SET3_CNTIGX2_STAT_SMX2_SET4_CNTJGX2_STAT_SMX2_SET5_CNTKGX2_STAT_SMX2_SET6_CNTLGX2_STAT_SMX2_SET7_CNTMGX2_STAT_SMX3_SET0_CNTNGX2_STAT_SMX3_SET1_CNTOGX2_STAT_SMX3_SET2_CNTPGX2_STAT_SMX3_SET3_CNTQGX2_STAT_SMX3_SET4_CNTRGX2_STAT_SMX3_SET5_CNTSGX2_STAT_SMX3_SET6_CNTTGX2_STAT_SMX3_SET7_CNTUGX2_STAT_SMX0_PROBE_COLLISIONVGX2_STAT_SMX1_PROBE_COLLISIONWGX2_STAT_SMX2_PROBE_COLLISIONXGX2_STAT_SMX3_PROBE_COLLISIONGX2_STAT_SMX_FIRSTXGX2_STAT_SMX_LASTGX2_STAT_TD_TD_BUSYGX2_STAT_TD_INPUT_BUSY GX2_STAT_TD_OUTPUT_BUSY GX2_STAT_TD_SAMPLE_LATENCY_FIFO_BUSY GX2_STAT_TD_CONSTANT_LATENCY_FIFO_BUSY GX2_STAT_TD_FASTPATH_BUSY GX2_STAT_TD_SH_FIFO_BUSYGX2_STAT_TD_PHASE_SYNC_BUSYGX2_STAT_TD_DATAOUT_FIFO_BUSYGX2_STAT_TD_LATENCY_FIFO_BUSY_PIPE_IDLEGX2_STAT_TD_SYNC_PHASE_COUNTGX2_STAT_TD_VC_DATA_RETURNGX2_STAT_TD_STALL_DUE_TO_VCGX2_STAT_TD_STALL_DUE_TO_RSPGX2_STAT_TD_STALL_DUE_TO_VC_OR_RSPGX2_STAT_TD_TD_REG_SCLK_VLDGX2_STAT_TD_TD_LOCAL_CG_DYN_SCLK_GRP0_ENGX2_STAT_TD_TD_LOCAL_CG_DYN_SCLK_GRP1_ENGX2_STAT_TD_FIRSTGX2_STAT_TD_LASTGX2_STAT_TA_TA_BUSYGX2_STAT_TA_GRADIENT_BUSYGX2_STAT_TA_GRADIENT_FIFO_BUSYGX2_STAT_TA_LOD_BUSYGX2_STAT_TA_LOD_FIFO_BUSYGX2_STAT_TA_ADDRESSER_BUSYGX2_STAT_TA_ADDRESSER_FIFO_BUSYGX2_STAT_TA_ALIGNER_BUSYGX2_STAT_TA_PIX_0_QUAD GX2_STAT_TA_PIX_1_QUAD GX2_STAT_TA_PIX_2_QUAD GX2_STAT_TA_PIX_3_QUAD GX2_STAT_TA_PIX_4_QUADGX2_STAT_TA_INPUT_CYCLESGX2_STAT_TA_GRADIENT_BALANCING_CYCLESGX2_STAT_TA_GRADIENT_CYCLESGX2_STAT_TA_WALKER_BALANCING_CYCLESGX2_STAT_TA_WALKER_CYCLESGX2_STAT_TA_ALIGNER_BALANCING_CYCLESGX2_STAT_TA_ALIGNER_CYCLESGX2_STAT_TA_MIP_1_CYCLE_PIXELSGX2_STAT_TA_MIP_2_CYCLE_PIXELSGX2_STAT_TA_VOL_1_CYCLE_PIXELSGX2_STAT_TA_VOL_2_CYCLE_PIXELSGX2_STAT_TA_BILIN_POINT_1_CYCLE_PIXELSGX2_STAT_TA_BICUBIC_4_CYCLE_PIXELS GX2_STAT_TA_MIPMAP_LOD_0_SAMPLES!GX2_STAT_TA_MIPMAP_LOD_1_SAMPLES"GX2_STAT_TA_MIPMAP_LOD_2_SAMPLES#GX2_STAT_TA_MIPMAP_LOD_3_SAMPLES$GX2_STAT_TA_MIPMAP_LOD_4_SAMPLES%GX2_STAT_TA_MIPMAP_LOD_5_SAMPLES&GX2_STAT_TA_MIPMAP_LOD_6_SAMPLES'GX2_STAT_TA_MIPMAP_LOD_7_SAMPLES(GX2_STAT_TA_MIPMAP_LOD_8_SAMPLES)GX2_STAT_TA_MIPMAP_LOD_9_SAMPLES*GX2_STAT_TA_MIPMAP_LOD_10_SAMPLES+GX2_STAT_TA_MIPMAP_LOD_11_SAMPLES,GX2_STAT_TA_MIPMAP_LOD_12_SAMPLES-GX2_STAT_TA_MIPMAP_LOD_13_SAMPLES.GX2_STAT_TA_MIPMAP_LOD_14_SAMPLES0GX2_STAT_TA_ANISO_1_1_QUADS1GX2_STAT_TA_ANISO_2_1_QUADS2GX2_STAT_TA_ANISO_3_1_QUADS3GX2_STAT_TA_ANISO_4_1_QUADS4GX2_STAT_TA_ANISO_5_1_QUADS5GX2_STAT_TA_ANISO_6_1_QUADS6GX2_STAT_TA_ANISO_7_1_QUADS7GX2_STAT_TA_ANISO_8_1_QUADS8GX2_STAT_TA_ANISO_9_1_QUADS9GX2_STAT_TA_ANISO_10_1_QUADS:GX2_STAT_TA_ANISO_11_1_QUADS;GX2_STAT_TA_ANISO_12_1_QUADSGX2_STAT_TA_ANISO_15_1_QUADS?GX2_STAT_TA_ANISO_16_1_QUADS@GX2_STAT_TA_TA_REG_SCLK_VLDAGX2_STAT_TA_TA_LOCAL_CG_DYN_SCLK_GRP0_ENBGX2_STAT_TA_TA_LOCAL_CG_DYN_SCLK_GRP1_ENCGX2_STAT_TA_TA_LOCAL_CG_DYN_SCLK_GRP1_MEMS_ENGX2_STAT_TA_FIRSTCGX2_STAT_TA_LASTGX2_STAT_TCP_TA_TCP_STARVE_CYCLESGX2_STAT_TCP_TCP_TA_STALL_CYCLESGX2_STAT_TCP_TD_TCP_STALL_CYCLESGX2_STAT_TCP_TCC_TCP_STALL_CYCLESGX2_STAT_TCP_TCC0_TCP_STALL_CYCLESGX2_STAT_TCP_TCC1_TCP_STALL_CYCLESGX2_STAT_TCP_TCC2_TCP_STALL_CYCLESGX2_STAT_TCP_TCC3_TCP_STALL_CYCLESGX2_STAT_TCP_TCC4_TCP_STALL_CYCLES GX2_STAT_TCP_TCC5_TCP_STALL_CYCLES GX2_STAT_TCP_TCC6_TCP_STALL_CYCLES GX2_STAT_TCP_TCC7_TCP_STALL_CYCLES GX2_STAT_TCP_TCP_LOD_STALL_CYCLES GX2_STAT_TCP_TCP_TAGCONFLICT_STALL_CYCLESGX2_STAT_TCP_TCP_ALLOC_STALL_CYCLESGX2_STAT_TCP_TCP_LFIFO_STALL_CYCLESGX2_STAT_TCP_TCP_RFIFO_STALL_CYCLESGX2_STAT_TCP_TCP_FFIFO_STALL_CYCLESGX2_STAT_TCP_TCP_CFIFO_STALL_CYCLESGX2_STAT_TCP_TCP_READCONFLICT_STALL_CYCLESGX2_STAT_TCP_TCP_PENDING_STALL_CYCLESGX2_STAT_TCP_TCP_READFIFO_STALL_CYCLESGX2_STAT_TCP_TCP_LATENCYGX2_STAT_TCP_TCC_REQ_LATENCYGX2_STAT_TCP_TCC0_REQ_LATENCYGX2_STAT_TCP_TCC1_REQ_LATENCYGX2_STAT_TCP_TCC2_REQ_LATENCYGX2_STAT_TCP_TCC3_REQ_LATENCYGX2_STAT_TCP_TCC4_REQ_LATENCYGX2_STAT_TCP_TCC5_REQ_LATENCYGX2_STAT_TCP_TCC6_REQ_LATENCYGX2_STAT_TCP_TCC7_REQ_LATENCY GX2_STAT_TCP_TCC_FREE_LATENCY!GX2_STAT_TCP_TCC0_FREE_LATENCY"GX2_STAT_TCP_TCC1_FREE_LATENCY#GX2_STAT_TCP_TCC2_FREE_LATENCY$GX2_STAT_TCP_TCC3_FREE_LATENCY%GX2_STAT_TCP_TCC4_FREE_LATENCY&GX2_STAT_TCP_TCC5_FREE_LATENCY'GX2_STAT_TCP_TCC6_FREE_LATENCY(GX2_STAT_TCP_TCC7_FREE_LATENCY)GX2_STAT_TCP_TCP_TCC_REQ*GX2_STAT_TCP_TCP_TCC0_REQ+GX2_STAT_TCP_TCP_TCC1_REQ,GX2_STAT_TCP_TCP_TCC2_REQ-GX2_STAT_TCP_TCP_TCC3_REQ.GX2_STAT_TCP_TCP_TCC4_REQ/GX2_STAT_TCP_TCP_TCC5_REQ0GX2_STAT_TCP_TCP_TCC6_REQ1GX2_STAT_TCP_TCP_TCC7_REQ2GX2_STAT_TCP_TCC_TCP_RDRET3GX2_STAT_TCP_TCC0_TCP_RDRET4GX2_STAT_TCP_TCC1_TCP_RDRET5GX2_STAT_TCP_TCC2_TCP_RDRET6GX2_STAT_TCP_TCC3_TCP_RDRET7GX2_STAT_TCP_TCC4_TCP_RDRET8GX2_STAT_TCP_TCC5_TCP_RDRET9GX2_STAT_TCP_TCC6_TCP_RDRET:GX2_STAT_TCP_TCC7_TCP_RDRET;GX2_STAT_TCP_TOTAL_PIXELSGX2_STAT_TCP_FMT_8_PIXELS?GX2_STAT_TCP_FMT_16_PIXELS@GX2_STAT_TCP_FMT_32_PIXELSAGX2_STAT_TCP_FMT_32_AS_8_PIXELSBGX2_STAT_TCP_FMT_32_AS_16_PIXELSCGX2_STAT_TCP_FMT_64_2_CYCLE_PIXELSDGX2_STAT_TCP_FMT_64_1_CYCLE_PIXELSEGX2_STAT_TCP_FMT_96_PIXELSFGX2_STAT_TCP_FMT_128_4_CYCLE_PIXELSGGX2_STAT_TCP_FMT_128_1_CYCLE_PIXELSHGX2_STAT_TCP_FMT_BC1_PIXELSIGX2_STAT_TCP_FMT_BC2_PIXELSJGX2_STAT_TCP_FMT_BC3_PIXELSKGX2_STAT_TCP_FMT_BC4_PIXELSLGX2_STAT_TCP_FMT_BC5_PIXELSMGX2_STAT_TCP_FMT_I8_PIXELSNGX2_STAT_TCP_FMT_I16_PIXELSOGX2_STAT_TCP_FMT_I32_PIXELSPGX2_STAT_TCP_FMT_I32_AS_8_PIXELSQGX2_STAT_TCP_FMT_I32_AS_16_PIXELSRGX2_STAT_TCP_FMT_D16_PIXELSSGX2_STAT_TCP_FMT_D32_PIXELSTGX2_STAT_TCP_FMT_V8_PIXELSUGX2_STAT_TCP_FMT_V16_PIXELSVGX2_STAT_TCP_FMT_V32_PIXELSWGX2_STAT_TCP_FMT_V64_2_CYCLE_PIXELSXGX2_STAT_TCP_FMT_V64_1_CYCLE_PIXELSYGX2_STAT_TCP_FMT_V128_4_CYCLE_PIXELSZGX2_STAT_TCP_FMT_V128_2_CYCLE_PIXELS[GX2_STAT_TCP_FMT_V128_1_CYCLE_PIXELS\GX2_STAT_TCP_ARR_LINEAR_GENERAL_PIXELS]GX2_STAT_TCP_ARR_LINEAR_ALIGNED_PIXELS^GX2_STAT_TCP_ARR_1D_THIN1_PIXELS_GX2_STAT_TCP_ARR_1D_THICK_PIXELS`GX2_STAT_TCP_ARR_2D_THIN1_PIXELSaGX2_STAT_TCP_ARR_2D_THIN2_PIXELSbGX2_STAT_TCP_ARR_2D_THIN4_PIXELScGX2_STAT_TCP_ARR_2D_THICK_PIXELSdGX2_STAT_TCP_ARR_2B_THIN1_PIXELSeGX2_STAT_TCP_ARR_2B_THIN2_PIXELSfGX2_STAT_TCP_ARR_2B_THIN4_PIXELSgGX2_STAT_TCP_ARR_2B_THICK_PIXELShGX2_STAT_TCP_ARR_3D_THIN1_PIXELSiGX2_STAT_TCP_ARR_3D_THICK_PIXELSjGX2_STAT_TCP_ARR_3B_THIN1_PIXELSkGX2_STAT_TCP_ARR_3B_THICK_PIXELSlGX2_STAT_TCP_DIM_1D_PIXELSmGX2_STAT_TCP_DIM_2D_PIXELSnGX2_STAT_TCP_DIM_3D_PIXELSoGX2_STAT_TCP_DIM_CUBE_PIXELSpGX2_STAT_TCP_DIM_1D_ARRAY_PIXELSqGX2_STAT_TCP_DIM_2D_ARRAY_PIXELSrGX2_STAT_TCP_DIM_2D_MSAA_PIXELSsGX2_STAT_TCP_DIM_2D_ARRAY_MSAA_PIXELStGX2_STAT_TCP_DIM_CUBE_ARRAY_PIXELSuGX2_STAT_TCP_VGT_TCP_INVALIDATEvGX2_STAT_TCP_TA_TCP_STATE_READwGX2_STAT_TCP_TCP_TAGRAM0_REQxGX2_STAT_TCP_TCP_TAGRAM1_REQyGX2_STAT_TCP_TCP_TAGRAM2_REQzGX2_STAT_TCP_TCP_TAGRAM3_REQ{GX2_STAT_TCP_TCP_GATE_EN1|GX2_STAT_TCP_TCP_GATE_EN2}GX2_STAT_TCP_TCP_CORE_REG_SCLK_VLD~GX2_STAT_TCP_FMT_V96_PIXELSGX2_STAT_TCP_FIRST~GX2_STAT_TCP_LASTGX2_STAT_TCC_NONEGX2_STAT_TCC_CYCLESGX2_STAT_TCC_BUSYGX2_STAT_TCC_BUSY_TC_TFGX2_STAT_TCC_BUSY_TC_VFGX2_STAT_TCC_BUSY_VC_VFGX2_STAT_TCC_REQSGX2_STAT_TCC_REQS_HITGX2_STAT_TCC_REQS_MISS GX2_STAT_TCC_REQS_UNCACHED GX2_STAT_TCC_REQS_CLIENT_0 GX2_STAT_TCC_REQS_CLIENT_1 GX2_STAT_TCC_REQS_CLIENT_2 GX2_STAT_TCC_REQS_CLIENT_3GX2_STAT_TCC_REQS_CLIENT_4GX2_STAT_TCC_REQS_CLIENT_5GX2_STAT_TCC_REQS_CLIENT_6GX2_STAT_TCC_REQS_CLIENT_7GX2_STAT_TCC_REQS_CLIENT_8GX2_STAT_TCC_REQS_CLIENT_9GX2_STAT_TCC_REQS_CLIENT_10GX2_STAT_TCC_REQS_CLIENT_11GX2_STAT_TCC_REQS_CLIENT_12GX2_STAT_TCC_REQS_CLIENT_13GX2_STAT_TCC_REQS_CLIENT_14GX2_STAT_TCC_REQS_CLIENT_15GX2_STAT_TCC_REQS_CLIENT_16GX2_STAT_TCC_REQS_CLIENT_17GX2_STAT_TCC_REQS_CLIENT_18GX2_STAT_TCC_REQS_CLIENT_19GX2_STAT_TCC_REQS_CLIENT_20GX2_STAT_TCC_REQS_CLIENT_21 GX2_STAT_TCC_REQS_CLIENT_22!GX2_STAT_TCC_REQS_CLIENT_23"GX2_STAT_TCC_REQS_TC_TF#GX2_STAT_TCC_REQS_TC_TF_HIT$GX2_STAT_TCC_REQS_TC_TF_MISS%GX2_STAT_TCC_REQS_TC_VF&GX2_STAT_TCC_REQS_TC_VF_HIT'GX2_STAT_TCC_REQS_TC_VF_MISS(GX2_STAT_TCC_REQS_VC_VF)GX2_STAT_TCC_REQS_VC_VF_HIT*GX2_STAT_TCC_REQS_VC_VF_MISS+GX2_STAT_TCC_REQ_LEVEL_TC_TF,GX2_STAT_TCC_REQ_LEVEL_TC_VF-GX2_STAT_TCC_REQ_LEVEL_VC_VF.GX2_STAT_TCC_REQ_LEVEL_CLIENT_0/GX2_STAT_TCC_REQ_LEVEL_CLIENT_10GX2_STAT_TCC_REQ_LEVEL_CLIENT_21GX2_STAT_TCC_REQ_LEVEL_CLIENT_32GX2_STAT_TCC_REQ_LEVEL_CLIENT_43GX2_STAT_TCC_REQ_LEVEL_CLIENT_54GX2_STAT_TCC_REQ_LEVEL_CLIENT_65GX2_STAT_TCC_REQ_LEVEL_CLIENT_76GX2_STAT_TCC_REQ_LEVEL_CLIENT_87GX2_STAT_TCC_REQ_LEVEL_CLIENT_98GX2_STAT_TCC_REQ_LEVEL_CLIENT_109GX2_STAT_TCC_REQ_LEVEL_CLIENT_11:GX2_STAT_TCC_REQ_LEVEL_CLIENT_12;GX2_STAT_TCC_REQ_LEVEL_CLIENT_13GX2_STAT_TCC_REQ_LEVEL_CLIENT_16?GX2_STAT_TCC_REQ_LEVEL_CLIENT_17@GX2_STAT_TCC_REQ_LEVEL_CLIENT_18AGX2_STAT_TCC_REQ_LEVEL_CLIENT_19BGX2_STAT_TCC_REQ_LEVEL_CLIENT_20CGX2_STAT_TCC_REQ_LEVEL_CLIENT_21DGX2_STAT_TCC_REQ_LEVEL_CLIENT_22EGX2_STAT_TCC_REQ_LEVEL_CLIENT_23FGX2_STAT_TCC_MC_REQSGGX2_STAT_TCC_MC_REQS_TC_TFHGX2_STAT_TCC_MC_REQS_TC_VFIGX2_STAT_TCC_MC_REQS_VC_VFJGX2_STAT_TCC_MC_FULLKGX2_STAT_TCC_MC_REQ_LEVELLGX2_STAT_TCC_MC_REQ_LEVEL_TC_TFMGX2_STAT_TCC_MC_REQ_LEVEL_TC_VFNGX2_STAT_TCC_MC_REQ_LEVEL_VC_VFOGX2_STAT_TCC_MC_CREDIT_LEVELPGX2_STAT_TCC_CG_CORE_ENABLEDQGX2_STAT_TCC_CG_BLOCK_ENABLEDRGX2_STAT_TCC_LF_FULLSGX2_STAT_TCC_LF_FULL_VCTGX2_STAT_TCC_LF_FULL_TCUGX2_STAT_TCC_LF_FULL_CLIENT_VCVGX2_STAT_TCC_LF_FULL_CLIENT_TCWGX2_STAT_TCC_LF_LEVELXGX2_STAT_TCC_LF_LEVEL_VC_VFYGX2_STAT_TCC_LF_LEVEL_TC_VFZGX2_STAT_TCC_LF_LEVEL_TC_TF[GX2_STAT_TCC_LF_BLOCK_LEVEL\GX2_STAT_TCC_LF_BLOCK_LEVEL_VC]GX2_STAT_TCC_LF_BLOCK_LEVEL_TC^GX2_STAT_TCC_OF_LEVEL_GX2_STAT_TCC_OF_LEVEL_VC_VF`GX2_STAT_TCC_OF_LEVEL_TC_VFaGX2_STAT_TCC_OF_LEVEL_TC_TFbGX2_STAT_TCC_TCA_LEVELcGX2_STAT_TCC_TCA_LEVEL_VC_VFdGX2_STAT_TCC_TCA_LEVEL_TC_VFeGX2_STAT_TCC_TCA_LEVEL_TC_TFfGX2_STAT_TCC_TCA_LEVEL_CLIENT_0gGX2_STAT_TCC_TCA_LEVEL_CLIENT_1hGX2_STAT_TCC_TCA_LEVEL_CLIENT_2iGX2_STAT_TCC_TCA_LEVEL_CLIENT_3jGX2_STAT_TCC_TCA_LEVEL_CLIENT_4kGX2_STAT_TCC_TCA_LEVEL_CLIENT_5lGX2_STAT_TCC_TCA_LEVEL_CLIENT_6mGX2_STAT_TCC_TCA_LEVEL_CLIENT_7nGX2_STAT_TCC_TCA_LEVEL_CLIENT_8oGX2_STAT_TCC_TCA_LEVEL_CLIENT_9pGX2_STAT_TCC_TCA_LEVEL_CLIENT_10qGX2_STAT_TCC_TCA_LEVEL_CLIENT_11rGX2_STAT_TCC_TCA_LEVEL_CLIENT_12sGX2_STAT_TCC_TCA_LEVEL_CLIENT_13tGX2_STAT_TCC_TCA_LEVEL_CLIENT_14uGX2_STAT_TCC_TCA_LEVEL_CLIENT_15vGX2_STAT_TCC_TCA_LEVEL_CLIENT_16wGX2_STAT_TCC_TCA_LEVEL_CLIENT_17xGX2_STAT_TCC_TCA_LEVEL_CLIENT_18yGX2_STAT_TCC_TCA_LEVEL_CLIENT_19zGX2_STAT_TCC_TCA_LEVEL_CLIENT_20{GX2_STAT_TCC_TCA_LEVEL_CLIENT_21|GX2_STAT_TCC_TCA_LEVEL_CLIENT_22}GX2_STAT_TCC_TCA_LEVEL_CLIENT_23~GX2_STAT_TCC_CLIENTS_FULLGX2_STAT_TCC_CLIENTS_FULL_VCGX2_STAT_TCC_CLIENTS_FULL_TCGX2_STAT_TCC_ARB_BURSTGX2_STAT_TCC_ARB_BURST_VCGX2_STAT_TCC_ARB_BURST_TCGX2_STAT_TCC_CACHE_TAG_STALL_TC_TFGX2_STAT_TCC_CACHE_TAG_RENAME_TC_TFGX2_STAT_TCC_CACHE_TAG_STALL_TC_VFGX2_STAT_TCC_CACHE_TAG_RENAME_TC_VFGX2_STAT_TCC_CACHE_TAG_STALL_VC_VFGX2_STAT_TCC_CACHE_TAG_RENAME_VC_VFGX2_STAT_TCC_CACHE_STALLGX2_STAT_TCC_DEALLOCGX2_STAT_TCC_DEALLOC_ALLGX2_STAT_TCC_DEALLOC_LINESGX2_STAT_TCC_DEALLOC_CYCLESGX2_STAT_TCC_REG_WRITESGX2_STAT_TCC_REG_READSGX2_STAT_TCC_DEBUG_BUSGX2_STAT_TCC_DUMMY_LASTGX2_STAT_TCC_FIRSTGX2_STAT_TCC_LASTGX2_STAT_CB_BUSYGX2_STAT_CB_DB_CB_TILE_VALID_READYGX2_STAT_CB_DB_CB_TILE_VALID_READYBGX2_STAT_CB_DB_CB_TILE_VALIDB_READYGX2_STAT_CB_DB_CB_TILE_VALIDB_READYBGX2_STAT_CB_DB_CB_LQUAD_VALID_READYGX2_STAT_CB_DB_CB_LQUAD_VALID_READYBGX2_STAT_CB_DB_CB_LQUAD_VALIDB_READYGX2_STAT_CB_DB_CB_LQUAD_VALIDB_READYB GX2_STAT_CB_CB_TAP_WRREQ_VALID_READY GX2_STAT_CB_CB_TAP_WRREQ_VALID_READYB GX2_STAT_CB_CB_TAP_WRREQ_VALIDB_READY GX2_STAT_CB_CB_TAP_WRREQ_VALIDB_READYB GX2_STAT_CB_CB_TAP_RDREQ_VALID_READYGX2_STAT_CB_CB_TAP_RDREQ_VALID_READYBGX2_STAT_CB_CB_TAP_RDREQ_VALIDB_READYGX2_STAT_CB_CB_TAP_RDREQ_VALIDB_READYBGX2_STAT_CB_CM_FC_TILE_VALID_READYGX2_STAT_CB_CM_FC_TILE_VALID_READYBGX2_STAT_CB_CM_FC_TILE_VALIDB_READYGX2_STAT_CB_CM_FC_TILE_VALIDB_READYBGX2_STAT_CB_FC_CC_QUADFRAG_VALID_READYGX2_STAT_CB_FC_CC_QUADFRAG_VALID_READYBGX2_STAT_CB_FC_CC_QUADFRAG_VALIDB_READYGX2_STAT_CB_FC_CC_QUADFRAG_VALIDB_READYBGX2_STAT_CB_FOP_IN_VALID_READYGX2_STAT_CB_FOP_IN_VALID_READYBGX2_STAT_CB_FOP_IN_VALIDB_READYGX2_STAT_CB_FOP_IN_VALIDB_READYBGX2_STAT_CB_CC_IB_TB_FRAG_VALID_READYGX2_STAT_CB_CC_IB_TB_FRAG_VALID_READYBGX2_STAT_CB_CC_IB_TB_FRAG_VALIDB_READY GX2_STAT_CB_CC_IB_TB_FRAG_VALIDB_READYB!GX2_STAT_CB_CC_SF_FULL"GX2_STAT_CB_CC_RB_FULL#GX2_STAT_CB_FC_RDLAT_FIFO_FULL$GX2_STAT_CB_CM_TQ_FULL%GX2_STAT_CB_LQUAD_NO_TILE&GX2_STAT_CB_CM_CACHE_HIT'GX2_STAT_CB_CM_CACHE_TAG_MISS(GX2_STAT_CB_CM_CACHE_SECTOR_MISS)GX2_STAT_CB_CM_CACHE_REEVICTION_STALL*GX2_STAT_CB_CM_CACHE_EVICT_NONZERO_INFLIGHT_STALL+GX2_STAT_CB_CM_CACHE_EVICT_NONRESIDENT_STALL,GX2_STAT_CB_CM_CACHE_REPLACE_PENDING_EVICT_STALL-GX2_STAT_CB_CM_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL.GX2_STAT_CB_CM_CACHE_READ_OUTPUT_STALL/GX2_STAT_CB_CM_CACHE_WRITE_OUTPUT_STALL0GX2_STAT_CB_CM_CACHE_ACK_OUTPUT_STALL1GX2_STAT_CB_CM_CACHE_FLUSH2GX2_STAT_CB_FC_CACHE_HIT3GX2_STAT_CB_FC_CACHE_TAG_MISS4GX2_STAT_CB_FC_CACHE_SECTOR_MISS5GX2_STAT_CB_FC_CACHE_REEVICTION_STALL6GX2_STAT_CB_FC_CACHE_EVICT_NONZERO_INFLIGHT_STALL7GX2_STAT_CB_FC_CACHE_EVICT_NONRESIDENT_STALL8GX2_STAT_CB_FC_CACHE_REPLACE_PENDING_EVICT_STALL9GX2_STAT_CB_FC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALL:GX2_STAT_CB_FC_CACHE_READ_OUTPUT_STALL;GX2_STAT_CB_FC_CACHE_WRITE_OUTPUT_STALLGX2_STAT_CB_CC_CACHE_HIT?GX2_STAT_CB_CC_CACHE_TAG_MISS@GX2_STAT_CB_CC_CACHE_SECTOR_MISSAGX2_STAT_CB_CC_CACHE_REEVICTION_STALLBGX2_STAT_CB_CC_CACHE_EVICT_NONZERO_INFLIGHT_STALLCGX2_STAT_CB_CC_CACHE_EVICT_NONRESIDENT_STALLDGX2_STAT_CB_CC_CACHE_REPLACE_PENDING_EVICT_STALLEGX2_STAT_CB_CC_CACHE_INFLIGHT_COUNTER_MAXIMUM_STALLFGX2_STAT_CB_CC_CACHE_READ_OUTPUT_STALLGGX2_STAT_CB_CC_CACHE_WRITE_OUTPUT_STALLHGX2_STAT_CB_CC_CACHE_ACK_OUTPUT_STALLIGX2_STAT_CB_CC_CACHE_WA_TO_RMW_CONVERSIONJGX2_STAT_CB_CC_CACHE_FLUSHKGX2_STAT_CB_CM_MC_READ_REQUESTLGX2_STAT_CB_FC_MC_READ_REQUESTMGX2_STAT_CB_CC_MC_READ_REQUESTNGX2_STAT_CB_CM_MC_WRITE_REQUESTOGX2_STAT_CB_FC_MC_WRITE_REQUESTPGX2_STAT_CB_CC_MC_WRITE_REQUESTQGX2_STAT_CB_CM_MC_READ_REQUESTS_IN_FLIGHTRGX2_STAT_CB_FC_MC_READ_REQUESTS_IN_FLIGHTSGX2_STAT_CB_CC_MC_READ_REQUESTS_IN_FLIGHTTGX2_STAT_CB_CM_MC_WRITE_REQUESTS_IN_FLIGHTUGX2_STAT_CB_FC_MC_WRITE_REQUESTS_IN_FLIGHTVGX2_STAT_CB_CC_MC_WRITE_REQUESTS_IN_FLIGHTWGX2_STAT_CB_CC_SURFACE_SYNCXGX2_STAT_CB_TWO_PROBE_QUAD_FRAGMENTYGX2_STAT_CB_SLOW_MODE_QUAD_FRAGMENT?* t@__GX2StatIdW4__GX2StatId@@GX2_SHADER_MODE_UNIFORM_REGISTERGX2_SHADER_MODE_UNIFORM_BLOCKGX2_SHADER_MODE_GEOMETRY_SHADERGX2_SHADER_MODE_COMPUTE_SHADERGX2_SHADER_MODE_FIRSTGX2_SHADER_MODE_LAST2tB_GX2ShaderModeW4_GX2ShaderMode@@RGX2_VAR_TYPE_VOIDGX2_VAR_TYPE_BOOLGX2_VAR_TYPE_INTGX2_VAR_TYPE_UINTGX2_VAR_TYPE_FLOATGX2_VAR_TYPE_DOUBLEGX2_VAR_TYPE_DVEC2GX2_VAR_TYPE_DVEC3GX2_VAR_TYPE_DVEC4 GX2_VAR_TYPE_VEC2 GX2_VAR_TYPE_VEC3 GX2_VAR_TYPE_VEC4 GX2_VAR_TYPE_BVEC2 GX2_VAR_TYPE_BVEC3GX2_VAR_TYPE_BVEC4GX2_VAR_TYPE_IVEC2GX2_VAR_TYPE_IVEC3GX2_VAR_TYPE_IVEC4GX2_VAR_TYPE_UVEC2GX2_VAR_TYPE_UVEC3GX2_VAR_TYPE_UVEC4GX2_VAR_TYPE_MAT2GX2_VAR_TYPE_MAT2X3GX2_VAR_TYPE_MAT2X4GX2_VAR_TYPE_MAT3X2GX2_VAR_TYPE_MAT3GX2_VAR_TYPE_MAT3X4GX2_VAR_TYPE_MAT4X2GX2_VAR_TYPE_MAT4X3GX2_VAR_TYPE_MAT4GX2_VAR_TYPE_DMAT2GX2_VAR_TYPE_DMAT2X3 GX2_VAR_TYPE_DMAT2X4!GX2_VAR_TYPE_DMAT3X2"GX2_VAR_TYPE_DMAT3#GX2_VAR_TYPE_DMAT3X4$GX2_VAR_TYPE_DMAT4X2%GX2_VAR_TYPE_DMAT4X3&GX2_VAR_TYPE_DMAT4GX2_VAR_TYPE_FIRST&GX2_VAR_TYPE_LAST*)tD_GX2VarTypeW4_GX2VarType@@VT_EMPTYVT_NULLVT_I2VT_I4VT_R4VT_R8VT_CYVT_DATEVT_BSTR VT_DISPATCH VT_ERROR VT_BOOL VT_VARIANT VT_UNKNOWNVT_DECIMALVT_I1VT_UI1VT_UI2VT_UI4VT_I8VT_UI8VT_INTVT_UINTVT_VOIDVT_HRESULTVT_PTRVT_SAFEARRAYVT_CARRAYVT_USERDEFINEDVT_LPSTRVT_LPWSTR$VT_RECORD%VT_INT_PTR&VT_UINT_PTR@VT_FILETIMEAVT_BLOBBVT_STREAMCVT_STORAGEDVT_STREAMED_OBJECTEVT_STORED_OBJECTFVT_BLOB_OBJECTGVT_CFHVT_CLSIDIVT_VERSIONED_STREAMVT_BSTR_BLOBVT_VECTOR VT_ARRAY@VT_BYREFVT_RESERVEDVT_ILLEGALVT_ILLEGALMASKEDVT_TYPEMASK"4tFVARENUMW4VARENUM@@~GX2_SAMPLER_TYPE_1DGX2_SAMPLER_TYPE_2DGX2_SAMPLER_TYPE_2D_RECTGX2_SAMPLER_TYPE_3DGX2_SAMPLER_TYPE_CUBEGX2_SAMPLER_TYPE_1D_SHADOWGX2_SAMPLER_TYPE_2D_SHADOWGX2_SAMPLER_TYPE_2D_RECT_SHADOWGX2_SAMPLER_TYPE_CUBE_SHADOW GX2_SAMPLER_TYPE_1D_ARRAY GX2_SAMPLER_TYPE_2D_ARRAY GX2_SAMPLER_TYPE_1D_ARRAY_SHADOW GX2_SAMPLER_TYPE_2D_ARRAY_SHADOW GX2_SAMPLER_TYPE_CUBE_ARRAYGX2_SAMPLER_TYPE_CUBE_ARRAY_SHADOWGX2_SAMPLER_TYPE_BUFFERGX2_SAMPLER_TYPE_RESERVED_1GX2_SAMPLER_TYPE_2D_MSGX2_SAMPLER_TYPE_2D_MS_ARRAYGX2_SAMPLER_TYPE_INT_1DGX2_SAMPLER_TYPE_INT_2DGX2_SAMPLER_TYPE_INT_2D_RECTGX2_SAMPLER_TYPE_INT_3DGX2_SAMPLER_TYPE_INT_CUBEGX2_SAMPLER_TYPE_INT_1D_ARRAYGX2_SAMPLER_TYPE_INT_2D_ARRAYGX2_SAMPLER_TYPE_INT_CUBE_ARRAYGX2_SAMPLER_TYPE_INT_BUFFERGX2_SAMPLER_TYPE_RESERVED_2GX2_SAMPLER_TYPE_INT_2D_MSGX2_SAMPLER_TYPE_INT_2D_MS_ARRAYGX2_SAMPLER_TYPE_UNSIGNED_INT_1D GX2_SAMPLER_TYPE_UNSIGNED_INT_2D!GX2_SAMPLER_TYPE_UNSIGNED_INT_2D_RECT"GX2_SAMPLER_TYPE_UNSIGNED_INT_3D#GX2_SAMPLER_TYPE_UNSIGNED_INT_CUBE$GX2_SAMPLER_TYPE_UNSIGNED_INT_1D_ARRAY%GX2_SAMPLER_TYPE_UNSIGNED_INT_2D_ARRAY&GX2_SAMPLER_TYPE_UNSIGNED_INT_CUBE_ARRAY'GX2_SAMPLER_TYPE_UNSIGNED_INT_BUFFER(GX2_SAMPLER_TYPE_RESERVED_3)GX2_SAMPLER_TYPE_UNSIGNED_INT_2D_MS*GX2_SAMPLER_TYPE_UNSIGNED_INT_2D_MS_ARRAYGX2_SAMPLER_TYPE_FIRST*GX2_SAMPLER_TYPE_LAST2-tH_GX2SamplerTypeW4_GX2SamplerType@@TYSPEC_CLSIDTYSPEC_FILEEXTTYSPEC_MIMETYPETYSPEC_FILENAMETYSPEC_PROGIDTYSPEC_PACKAGENAMETYSPEC_OBJECTID&tJtagTYSPECW4tagTYSPEC@@Z ugbTilingConfig ugpu addrLib tbugFix2197:Lgx2UtilsContextUgx2UtilsContext@@:gx2UtilsContextUgx2UtilsContext@@ N GX2_INDEX_FORMAT_U16_LEGX2_INDEX_FORMAT_U32_LEGX2_INDEX_FORMAT_U16 GX2_INDEX_FORMAT_U32GX2_INDEX_FORMAT_FIRST GX2_INDEX_FORMAT_LAST2tP_GX2IndexFormatW4_GX2IndexFormat@@GX2_PRIMITIVE_POINTSGX2_PRIMITIVE_LINESGX2_PRIMITIVE_LINE_STRIPGX2_PRIMITIVE_TRIANGLESGX2_PRIMITIVE_TRIANGLE_FANGX2_PRIMITIVE_TRIANGLE_STRIP GX2_PRIMITIVE_LINES_ADJACENCY GX2_PRIMITIVE_LINE_STRIP_ADJACENCY GX2_PRIMITIVE_TRIANGLES_ADJACENCY GX2_PRIMITIVE_TRIANGLE_STRIP_ADJACENCYGX2_PRIMITIVE_RECTSGX2_PRIMITIVE_LINE_LOOPGX2_PRIMITIVE_QUADSGX2_PRIMITIVE_QUAD_STRIPGX2_PRIMITIVE_TESSELLATE_LINESGX2_PRIMITIVE_TESSELLATE_LINE_STRIPGX2_PRIMITIVE_TESSELLATE_TRIANGLESGX2_PRIMITIVE_TESSELLATE_TRIANGLE_STRIPGX2_PRIMITIVE_TESSELLATE_QUADSGX2_PRIMITIVE_TESSELLATE_QUAD_STRIPGX2_PRIMITIVE_FIRSTGX2_PRIMITIVE_LAST6tR_GX2PrimitiveTypeW4_GX2PrimitiveType@@6GX2_CLEAR_NONEGX2_CLEAR_DEPTHGX2_CLEAR_STENCILGX2_CLEAR_D_REGGX2_CLEAR_S_REGGX2_CLEAR_BOTH GX2_CLEAR_D_S_REGGX2_CLEAR_DEPTH_D_REG GX2_CLEAR_STENCIL_S_REGGX2_CLEAR_BOTH_D_S_REGGX2_CLEAR_FIRSTGX2_CLEAR_LAST. tT_GX2ClearModeW4_GX2ClearMode@@^ATI_TC_FORMAT_UnknownATI_TC_FORMAT_ARGB_8888ATI_TC_FORMAT_RGB_888ATI_TC_FORMAT_RG_8ATI_TC_FORMAT_R_8ATI_TC_FORMAT_ARGB_2101010ATI_TC_FORMAT_ARGB_16ATI_TC_FORMAT_RG_16ATI_TC_FORMAT_R_16 ATI_TC_FORMAT_ARGB_16F ATI_TC_FORMAT_RG_16F ATI_TC_FORMAT_R_16F ATI_TC_FORMAT_ARGB_32F ATI_TC_FORMAT_RG_32FATI_TC_FORMAT_R_32FATI_TC_FORMAT_DXT1ATI_TC_FORMAT_DXT3ATI_TC_FORMAT_DXT5ATI_TC_FORMAT_DXT5_xGBRATI_TC_FORMAT_DXT5_RxBGATI_TC_FORMAT_DXT5_RBxGATI_TC_FORMAT_DXT5_xRBGATI_TC_FORMAT_DXT5_RGxBATI_TC_FORMAT_DXT5_xGxRATI_TC_FORMAT_ATI1NATI_TC_FORMAT_ATI2NATI_TC_FORMAT_ATI2N_XYATI_TC_FORMAT_ATI2N_DXT5ATI_TC_FORMAT_BC1ATI_TC_FORMAT_BC2ATI_TC_FORMAT_BC3ATI_TC_FORMAT_BC4 ATI_TC_FORMAT_BC5!ATI_TC_FORMAT_ATC_RGB"ATI_TC_FORMAT_ATC_RGBA_Explicit#ATI_TC_FORMAT_ATC_RGBA_Interpolated$ATI_TC_FORMAT_ETC_RGB$ATI_TC_FORMAT_MAX.&tVATI_TC_FORMATW4ATI_TC_FORMAT@@DESCKIND_NONEDESCKIND_FUNCDESCDESCKIND_VARDESCDESCKIND_TYPECOMPDESCKIND_IMPLICITAPPOBJDESCKIND_MAX*tXtagDESCKINDW4tagDESCKIND@@BINDSTRING_HEADERSBINDSTRING_ACCEPT_MIMESBINDSTRING_EXTRA_URLBINDSTRING_LANGUAGEBINDSTRING_USERNAMEBINDSTRING_PASSWORDBINDSTRING_UA_PIXELSBINDSTRING_UA_COLOR BINDSTRING_OS BINDSTRING_USER_AGENT BINDSTRING_ACCEPT_ENCODINGS BINDSTRING_POST_COOKIE BINDSTRING_POST_DATA_MIMEBINDSTRING_URLBINDSTRING_IIDBINDSTRING_FLAG_BIND_TO_OBJECTBINDSTRING_PTR_BIND_CONTEXT.tZtagBINDSTRINGW4tagBINDSTRING@@GX2_TEX_XY_FILTER_POINTGX2_TEX_XY_FILTER_BILINEARGX2_TEX_XY_FILTER_FIRSTGX2_TEX_XY_FILTER_LAST:t\_GX2TexXYFilterTypeW4_GX2TexXYFilterType@@GX2_TEX_Z_FILTER_USE_XYGX2_TEX_Z_FILTER_POINTGX2_TEX_Z_FILTER_LINEARGX2_TEX_Z_FILTER_FIRSTGX2_TEX_Z_FILTER_LAST:t^_GX2TexZFilterTypeW4_GX2TexZFilterType@@GX2_TEX_MIP_FILTER_NO_MIPGX2_TEX_MIP_FILTER_POINTGX2_TEX_MIP_FILTER_LINEARGX2_TEX_MIP_FILTER_FIRSTGX2_TEX_MIP_FILTER_LAST>t`_GX2TexMipFilterTypeW4_GX2TexMipFilterType@@:NODE_INVALIDNODE_ELEMENTNODE_ATTRIBUTENODE_TEXTNODE_CDATA_SECTIONNODE_ENTITY_REFERENCENODE_ENTITYNODE_PROCESSING_INSTRUCTIONNODE_COMMENT NODE_DOCUMENT NODE_DOCUMENT_TYPE NODE_DOCUMENT_FRAGMENT NODE_NOTATION2 tbtagDOMNodeTypeW4tagDOMNodeType@@GX2_TEX_MIP_PERF_0GX2_TEX_MIP_PERF_1GX2_TEX_MIP_PERF_2GX2_TEX_MIP_PERF_3GX2_TEX_MIP_PERF_4GX2_TEX_MIP_PERF_5GX2_TEX_MIP_PERF_6GX2_TEX_MIP_PERF_7GX2_TEX_MIP_PERF_FIRSTGX2_TEX_MIP_PERF_LAST: td_GX2TexMipPerfTypeW4_GX2TexMipPerfType@@XMLELEMTYPE_ELEMENTXMLELEMTYPE_TEXTXMLELEMTYPE_COMMENTXMLELEMTYPE_DOCUMENTXMLELEMTYPE_DTDXMLELEMTYPE_PIXMLELEMTYPE_OTHER2tftagXMLEMEM_TYPEW4tagXMLEMEM_TYPE@@GX2_TEX_ANISO_1_TO_1GX2_TEX_ANISO_2_TO_1GX2_TEX_ANISO_4_TO_1GX2_TEX_ANISO_8_TO_1GX2_TEX_ANISO_16_TO_1GX2_TEX_ANISO_FIRSTGX2_TEX_ANISO_LAST6th_GX2TexAnisoRatioW4_GX2TexAnisoRatio@@~GX2_ASPECT_RATIO_4_BY_3GX2_ASPECT_RATIO_16_BY_9GX2_ASPECT_RATIO_FIRSTGX2_ASPECT_RATIO_LAST2tj_GX2AspectRatioW4_GX2AspectRatio@@GX2_DRC_NONEGX2_DRC_SINGLEGX2_DRC_DOUBLEGX2_DRC_SINGLE_30HZGX2_DRC_FIRSTGX2_DRC_LAST*tl_GX2DRCModeW4_GX2DRCMode@@GX2_BUFFERING_SINGLEGX2_BUFFERING_DOUBLEGX2_BUFFERING_TRIPLEGX2_BUFFERING_QUADGX2_BUFFERING_FIRSTGX2_BUFFERING_LAST6tn_GX2BufferingModeW4_GX2BufferingMode@@GX2_SCAN_TARGET_TVGX2_SCAN_TARGET_TV_LEFTGX2_SCAN_TARGET_TV_RIGHTGX2_SCAN_TARGET_DRC_FIRSTGX2_SCAN_TARGET_DRC_SECONDGX2_SCAN_TARGET_FIRSTGX2_SCAN_TARGET_LAST2tp_GX2ScanTargetW4_GX2ScanTarget@@GX2_PATCH_TYPE_FETCH_SHADERGX2_PATCH_TYPE_VERTEX_SHADERGX2_PATCH_TYPE_GEOMETRY_COPY_SHADERGX2_PATCH_TYPE_GEOMETRY_SHADERGX2_PATCH_TYPE_PIXEL_SHADERGX2_PATCH_TYPE_COMPUTE_SHADERGX2_PATCH_TYPE_FIRSTGX2_PATCH_TYPE_LAST.tr_GX2PatchTypeW4_GX2PatchType@@ GX2_PERF_U64_TIMEGX2_PERF_U64_GPU_TIMEGX2_PERF_F32_GPU_BUSYGX2_PERF_F32_SHADER_BUSYGX2_PERF_U64_REUSED_INDICES_VSGX2_PERF_F32_SHADER_BUSY_VSGX2_PERF_F32_SHADER_BUSY_GSGX2_PERF_F32_SHADER_BUSY_PSGX2_PERF_F32_ALU_BUSY GX2_PERF_F32_TEX_BUSY GX2_PERF_U64_VS_VERTICES_IN GX2_PERF_F32_VS_TEX_INST_COUNT GX2_PERF_F32_VS_TEX_BUSY GX2_PERF_F32_VS_ALU_INST_COUNTGX2_PERF_F32_VS_ALU_BUSYGX2_PERF_F32_VS_ALU_EFFICIENCYGX2_PERF_F32_VS_ALU_TEX_RATIOGX2_PERF_F32_GS_TEX_INST_COUNTGX2_PERF_F32_GS_TEX_BUSYGX2_PERF_F32_GS_ALU_INST_COUNTGX2_PERF_F32_GS_ALU_BUSYGX2_PERF_F32_GS_ALU_EFFICIENCYGX2_PERF_F32_GS_ALU_TEX_RATIOGX2_PERF_F32_PRIMITIVE_ASSEMBLY_BUSYGX2_PERF_U64_PRIMITIVES_INGX2_PERF_F32_PA_STALLED_ON_RASTERIZERGX2_PERF_F32_INTERP_BUSYGX2_PERF_U64_PS_PIXELS_INGX2_PERF_F32_PS_TEX_INST_COUNTGX2_PERF_F32_PS_TEX_BUSYGX2_PERF_F32_PS_ALU_INST_COUNTGX2_PERF_F32_PS_ALU_BUSY GX2_PERF_F32_PS_ALU_EFFICIENCY!GX2_PERF_F32_PS_ALU_TEX_RATIO"GX2_PERF_U64_PS_PIXELS_OUT#GX2_PERF_F32_PS_EXPORT_STALLS$GX2_PERF_F32_TEX_UNIT_BUSY%GX2_PERF_U64_TEXEL_FETCH_COUNT&GX2_PERF_F32_TEX_CACHE_STALLED'GX2_PERF_F32_TEX_MISS_RATE(GX2_PERF_U64_TEX_MEM_BYTES_READ)GX2_PERF_F32_DEPTH_STENCIL_TEST_BUSY*GX2_PERF_F32_HIZ_TRIVIAL_ACCEPT+GX2_PERF_F32_HIZ_REJECT,GX2_PERF_U64_PRE_Z_SAMPLES_PASSING-GX2_PERF_U64_PRE_Z_SAMPLES_FAILING_S.GX2_PERF_U64_PRE_Z_SAMPLES_FAILING_Z/GX2_PERF_U64_POST_Z_SAMPLES_PASSING0GX2_PERF_U64_POST_Z_SAMPLES_FAILING_S1GX2_PERF_U64_POST_Z_SAMPLES_FAILING_Z2GX2_PERF_F32_Z_UNIT_STALLED3GX2_PERF_U64_PIXELS_AT_CB4GX2_PERF_U64_PIXELS_CB_MEM_WRITTEN5GX2_PERF_U64_IA_VERTICES6GX2_PERF_U64_IA_PRIMITIVES7GX2_PERF_U64_VS_INVOCATIONS8GX2_PERF_U64_GS_INVOCATIONS9GX2_PERF_U64_GS_PRIMITIVES:GX2_PERF_U64_C_INVOCATIONS;GX2_PERF_U64_C_PRIMITIVES<GX2_PERF_U64_PS_INVOCATIONS=GX2_PERF_U64_PA_INPUT_PRIM=GX2_PERF_LASTGX2_PERF_FIRST2@tt_GX2PerfMetricW4_GX2PerfMetric@@VGX2_INVALIDATE_ATTRIB_BUFFERGX2_INVALIDATE_TEXTUREGX2_INVALIDATE_UNIFORM_BLOCKGX2_INVALIDATE_SHADERGX2_INVALIDATE_COLOR_BUFFER GX2_INVALIDATE_DEPTH_BUFFER@GX2_INVALIDATE_CPUGX2_INVALIDATE_STREAMOUT_BUFFERGX2_INVALIDATE_EXPORT_BUFFERAGX2_INVALIDATE_CPU_ATTRIB_BUFFERBGX2_INVALIDATE_CPU_TEXTUREDGX2_INVALIDATE_CPU_UNIFORM_BLOCKHGX2_INVALIDATE_CPU_SHADERGX2_INVALIDATE_CONSTANT_BUFFERDGX2_INVALIDATE_CPU_CONSTANT_BUFFERGX2_INVALIDATE_FIRSTGX2_INVALIDATE_LAST:tv_GX2InvalidateTypeW4_GX2InvalidateType@@ u tPARSE_CANONICALIZEPARSE_FRIENDLYPARSE_SECURITY_URLPARSE_ROOTDOCUMENTPARSE_DOCUMENTPARSE_ANCHORPARSE_ENCODEPARSE_DECODE PARSE_PATH_FROM_URL PARSE_URL_FROM_PATH PARSE_MIME PARSE_SERVER PARSE_SCHEMAPARSE_SITEPARSE_DOMAINPARSE_LOCATIONPARSE_SECURITY_DOMAINPARSE_ESCAPEPARSE_UNESCAPE2tz_tagPARSEACTIONW4_tagPARSEACTION@@GX2_TOSS_STAGE_NONEGX2_TOSS_STAGE_AFTER_VERTEX_FETCHGX2_TOSS_STAGE_AFTER_VERTEX_SHADERGX2_TOSS_STAGE_AFTER_GEOMETRY_SHADERGX2_TOSS_STAGE_AFTER_CLIPPINGGX2_TOSS_STAGE_AFTER_PRIMITIVE_SETUPGX2_TOSS_STAGE_AFTER_SCAN_CONVERSIONGX2_TOSS_STAGE_AFTER_RASTERIZATIONGX2_TOSS_STAGE_AFTER_PIXEL_SHADERGX2_TOSS_STAGE_FIRSTGX2_TOSS_STAGE_LAST. t|_GX2TossStageW4_GX2TossStage@@ADDR_OKADDR_ERRORADDR_OUTOFMEMORYADDR_INVALIDPARAMSADDR_NOTSUPPORTEDADDR_NOTIMPLEMENTEDADDR_PARAMSIZEMISMATCH:t~_ADDR_E_RETURNCODEW4_ADDR_E_RETURNCODE@@nGX2_PERF_COLLECT_NONEGX2_PERF_COLLECT_TAGS_ACCUMULATEGX2_PERF_COLLECT_TAGS_INDIVIDUALFt_GX2PerfCollectionMethodW4_GX2PerfCollectionMethod@@GX2_ENDIANSWAP_NONEGX2_ENDIANSWAP_8IN16GX2_ENDIANSWAP_8IN32GX2_ENDIANSWAP_DEFAULTGX2_ENDIANSWAP_FIRSTGX2_ENDIANSWAP_LAST:t_GX2EndianSwapModeW4_GX2EndianSwapMode@@2PSU_DEFAULTPSU_SECURITY_URL_ONLY.t_tagPSUACTIONW4_tagPSUACTION@@>TC2TileModeConvertUTC2TileModeConvert@@#GX2_TESSELLATION_MODE_DISCRETEGX2_TESSELLATION_MODE_CONTINUOUSGX2_TESSELLATION_MODE_ADAPTIVEGX2_TESSELLATION_MODE_FIRSTGX2_TESSELLATION_MODE_LAST>t_GX2TessellationModeW4_GX2TessellationMode@@GX2_FETCH_SHADER_TESSELATION_NONEGX2_FETCH_SHADER_TESSELATION_LINESGX2_FETCH_SHADER_TESSELATION_TRIANGLESGX2_FETCH_SHADER_TESSELATION_QUADSGX2_FETCH_SHADER_TYPE_FIRSTGX2_FETCH_SHADER_TYPE_LAST:tGX2FetchShaderTypeW4GX2FetchShaderType@@BINDSTATUS_FINDINGRESOURCEBINDSTATUS_CONNECTINGBINDSTATUS_REDIRECTINGBINDSTATUS_BEGINDOWNLOADDATABINDSTATUS_DOWNLOADINGDATABINDSTATUS_ENDDOWNLOADDATABINDSTATUS_BEGINDOWNLOADCOMPONENTSBINDSTATUS_INSTALLINGCOMPONENTS BINDSTATUS_ENDDOWNLOADCOMPONENTS BINDSTATUS_USINGCACHEDCOPY BINDSTATUS_SENDINGREQUEST BINDSTATUS_CLASSIDAVAILABLE BINDSTATUS_MIMETYPEAVAILABLEBINDSTATUS_CACHEFILENAMEAVAILABLEBINDSTATUS_BEGINSYNCOPERATIONBINDSTATUS_ENDSYNCOPERATIONBINDSTATUS_BEGINUPLOADDATABINDSTATUS_UPLOADINGDATABINDSTATUS_ENDUPLOADDATABINDSTATUS_PROTOCOLCLASSIDBINDSTATUS_ENCODINGBINDSTATUS_VERIFIEDMIMETYPEAVAILABLEBINDSTATUS_CLASSINSTALLLOCATIONBINDSTATUS_DECODINGBINDSTATUS_LOADINGMIMEHANDLERBINDSTATUS_CONTENTDISPOSITIONATTACHBINDSTATUS_FILTERREPORTMIMETYPEBINDSTATUS_CLSIDCANINSTANTIATEBINDSTATUS_IUNKNOWNAVAILABLEBINDSTATUS_DIRECTBINDBINDSTATUS_RAWMIMETYPE BINDSTATUS_PROXYDETECTING!BINDSTATUS_ACCEPTRANGES"BINDSTATUS_COOKIE_SENT#BINDSTATUS_COMPACT_POLICY_RECEIVED$BINDSTATUS_COOKIE_SUPPRESSED%BINDSTATUS_COOKIE_STATE_UNKNOWN&BINDSTATUS_COOKIE_STATE_ACCEPT'BINDSTATUS_COOKIE_STATE_REJECT(BINDSTATUS_COOKIE_STATE_PROMPT)BINDSTATUS_COOKIE_STATE_LEASH*BINDSTATUS_COOKIE_STATE_DOWNGRADE+BINDSTATUS_POLICY_HREF,BINDSTATUS_P3P_HEADER-BINDSTATUS_SESSION_COOKIE_RECEIVED.BINDSTATUS_PERSISTENT_COOKIE_RECEIVED/BINDSTATUS_SESSION_COOKIES_ALLOWED0BINDSTATUS_CACHECONTROL1BINDSTATUS_CONTENTDISPOSITIONFILENAME2BINDSTATUS_MIMETEXTPLAINMISMATCH3BINDSTATUS_PUBLISHERAVAILABLE4BINDSTATUS_DISPLAYNAMEAVAILABLE5BINDSTATUS_SSLUX_NAVBLOCKED.5ttagBINDSTATUSW4tagBINDSTATUS@@QUERY_EXPIRATION_DATEQUERY_TIME_OF_LAST_CHANGEQUERY_CONTENT_ENCODINGQUERY_CONTENT_TYPEQUERY_REFRESHQUERY_RECOMBINEQUERY_CAN_NAVIGATEQUERY_USES_NETWORK QUERY_IS_CACHED QUERY_IS_INSTALLEDENTRY QUERY_IS_CACHED_OR_MAPPED QUERY_USES_CACHE QUERY_IS_SECUREQUERY_IS_SAFEQUERY_USES_HISTORYFOLDER2t_tagQUERYOPTIONW4_tagQUERYOPTION@@zGX2_STREAMOUT_OFFSET_READ_FROM_CONTEXTGX2_STREAMOUT_OFFSET_RESETGX2_STREAMOUT_OFFSET_EXPLICITBt_GX2StreamOutOffsetInitW4_GX2StreamOutOffsetInit@@rGX2_ZRANGE_BASE_ZMINGX2_ZRANGE_BASE_ZMAXGX2_ZRANGE_BASE_FIRSTGX2_ZRANGE_BASE_LAST2t_GX2ZRangeBaseW4_GX2ZRangeBase@@BSYS_WIN16SYS_WIN32SYS_MACSYS_WIN64*ttagSYSKINDW4tagSYSKIND@@GX2_COUNTER_CP_0GX2_COUNTER_GRBM_0GX2_COUNTER_GRBM_1GX2_COUNTER_PA_SU_0GX2_COUNTER_PA_SU_1GX2_COUNTER_PA_SU_2GX2_COUNTER_PA_SU_3GX2_COUNTER_PA_SC_0GX2_COUNTER_PA_SC_1 GX2_COUNTER_PA_SC_2 GX2_COUNTER_PA_SC_3 GX2_COUNTER_VGT_0 GX2_COUNTER_VGT_1 GX2_COUNTER_VGT_2GX2_COUNTER_VGT_3GX2_COUNTER_SQ_0GX2_COUNTER_SQ_1GX2_COUNTER_SQ_2GX2_COUNTER_SQ_3GX2_COUNTER_SPI_0GX2_COUNTER_SPI_1GX2_COUNTER_SPI_2GX2_COUNTER_SPI_3GX2_COUNTER_SX_0GX2_COUNTER_SX_1GX2_COUNTER_SX_2GX2_COUNTER_SX_3GX2_COUNTER_SMX_0GX2_COUNTER_SMX_1GX2_COUNTER_SMX_2GX2_COUNTER_SMX_3GX2_COUNTER_TD_0_0 GX2_COUNTER_TD_0_1!GX2_COUNTER_TA_0_0"GX2_COUNTER_TA_0_1#GX2_COUNTER_TA_1_0$GX2_COUNTER_TA_1_1%GX2_COUNTER_TCP_0_0&GX2_COUNTER_TCP_0_1'GX2_COUNTER_TCP_1_0(GX2_COUNTER_TCP_1_1)GX2_COUNTER_TCP_2_0*GX2_COUNTER_TCP_2_1+GX2_COUNTER_TCP_3_0,GX2_COUNTER_TCP_3_1-GX2_COUNTER_TCC_0_0.GX2_COUNTER_TCC_0_1/GX2_COUNTER_TCC_1_00GX2_COUNTER_TCC_1_11GX2_COUNTER_TCC_2_02GX2_COUNTER_TCC_2_13GX2_COUNTER_TCC_3_04GX2_COUNTER_TCC_3_1=GX2_COUNTER_CB_0_0>GX2_COUNTER_CB_0_1?GX2_COUNTER_CB_1_0@GX2_COUNTER_CB_1_1AGX2_COUNTER_CB_2_0BGX2_COUNTER_CB_2_1CGX2_COUNTER_CB_3_0DGX2_COUNTER_CB_3_15GX2_COUNTER_DB_0_06GX2_COUNTER_DB_0_17GX2_COUNTER_DB_1_08GX2_COUNTER_DB_1_19GX2_COUNTER_DB_2_0:GX2_COUNTER_DB_2_1;GX2_COUNTER_DB_3_0<GX2_COUNTER_DB_3_1EGX2_COUNTER_PIPELINEGX2_COUNTER_FIRSTEGX2_COUNTER_LAST2Ht__GX2CounterIdW4__GX2CounterId@@FEATURE_OBJECT_CACHINGFEATURE_ZONE_ELEVATIONFEATURE_MIME_HANDLINGFEATURE_MIME_SNIFFINGFEATURE_WINDOW_RESTRICTIONSFEATURE_WEBOC_POPUPMANAGEMENTFEATURE_BEHAVIORSFEATURE_DISABLE_MK_PROTOCOLFEATURE_LOCALMACHINE_LOCKDOWN FEATURE_SECURITYBAND FEATURE_RESTRICT_ACTIVEXINSTALL FEATURE_VALIDATE_NAVIGATE_URL FEATURE_RESTRICT_FILEDOWNLOAD FEATURE_ADDON_MANAGEMENTFEATURE_PROTOCOL_LOCKDOWNFEATURE_HTTP_USERNAME_PASSWORD_DISABLEFEATURE_SAFE_BINDTOOBJECTFEATURE_UNC_SAVEDFILECHECKFEATURE_GET_URL_DOM_FILEPATH_UNENCODEDFEATURE_TABBED_BROWSINGFEATURE_SSLUXFEATURE_DISABLE_NAVIGATION_SOUNDSFEATURE_DISABLE_LEGACY_COMPRESSIONFEATURE_FORCE_ADDR_AND_STATUSFEATURE_XMLHTTPFEATURE_DISABLE_TELNET_PROTOCOLFEATURE_FEEDSFEATURE_BLOCK_INPUT_PROMPTSFEATURE_ENTRY_COUNTBt_tagINTERNETFEATURELISTW4_tagINTERNETFEATURELIST@@2NoMaybeYesFtvc_attributes::YesNoMaybeW4YesNoMaybe@vc_attributes@@TKIND_ENUMTKIND_RECORDTKIND_MODULETKIND_INTERFACETKIND_DISPATCHTKIND_COCLASSTKIND_ALIASTKIND_UNIONTKIND_MAX* ttagTYPEKINDW4tagTYPEKIND@@:NoAccessReadWriteReadWriteFtvc_attributes::AccessTypeW4AccessType@vc_attributes@@jGX2_SQ_PSGX2_SQ_VSGX2_SQ_GSGX2_SQ_ESGX2_SQ_FIRSTGX2_SQ_LAST*t__GX2SqTypeW4__GX2SqType@@COMIMAGE_FLAGS_ILONLYCOMIMAGE_FLAGS_32BITREQUIREDCOMIMAGE_FLAGS_IL_LIBRARYCOMIMAGE_FLAGS_STRONGNAMESIGNEDCOMIMAGE_FLAGS_TRACKDEBUGDATACOR_VERSION_MAJOR_V2COR_VERSION_MAJORCOR_VERSION_MINORCOR_DELETED_NAME_LENGTHCOR_VTABLEGAP_NAME_LENGTHNATIVE_TYPE_MAX_CBCOR_ILMETHOD_SECT_SMALL_MAX_DATASIZEIMAGE_COR_MIH_METHODRVAIMAGE_COR_MIH_EHRVAIMAGE_COR_MIH_BASICBLOCKCOR_VTABLE_32BITCOR_VTABLE_64BITCOR_VTABLE_FROM_UNMANAGEDCOR_VTABLE_FROM_UNMANAGED_RETAIN_APPDOMAINCOR_VTABLE_CALL_MOST_DERIVED IMAGE_COR_EATJ_THUNK_SIZEMAX_CLASS_NAMEMAX_PACKAGE_NAMENtReplacesCorHdrNumericDefinesW4ReplacesCorHdrNumericDefines@@ADDR_ROUND_BY_HALFADDR_ROUND_TRUNCATEADDR_ROUND_DITHERADDR_UNCOMPRESSEDADDR_EXPANDEDADDR_PACKED_STDADDR_PACKED_REVADDR_PACKED_GBGRADDR_PACKED_BGRG ADDR_PACKED_BC1 ADDR_PACKED_BC2 ADDR_PACKED_BC3 ADDR_PACKED_BC4 ADDR_PACKED_BC5ADDR_ZPLANE_R5XXADDR_ZPLANE_R6XXADDR_END_ELEMENT.tAddrElemModeW4AddrElemMode@@bADDR_DEPTH_PLANAR_NONEADDR_DEPTH_PLANAR_R600ADDR_DEPTH_PLANAR_R800:tAddrDepthPlanarTypeW4AddrDepthPlanarType@@:CIP_DISK_FULLCIP_ACCESS_DENIEDCIP_NEWER_VERSION_EXISTSCIP_OLDER_VERSION_EXISTSCIP_NAME_CONFLICTCIP_TRUST_VERIFICATION_COMPONENT_MISSINGCIP_EXE_SELF_REGISTERATION_TIMEOUTCIP_UNSAFE_TO_ABORTCIP_NEED_REBOOT CIP_NEED_REBOOT_UI_PERMISSIONF t__MIDL_ICodeInstall_0001W4__MIDL_ICodeInstall_0001@@CHANGEKIND_ADDMEMBERCHANGEKIND_DELETEMEMBERCHANGEKIND_SETNAMESCHANGEKIND_SETDOCUMENTATIONCHANGEKIND_GENERALCHANGEKIND_INVALIDATECHANGEKIND_CHANGEFAILEDCHANGEKIND_MAX.ttagCHANGEKINDW4tagCHANGEKIND@@Uri_PROPERTY_ABSOLUTE_URIUri_PROPERTY_STRING_STARTUri_PROPERTY_AUTHORITYUri_PROPERTY_DISPLAY_URIUri_PROPERTY_DOMAINUri_PROPERTY_EXTENSIONUri_PROPERTY_FRAGMENTUri_PROPERTY_HOSTUri_PROPERTY_PASSWORDUri_PROPERTY_PATH Uri_PROPERTY_PATH_AND_QUERY Uri_PROPERTY_QUERY Uri_PROPERTY_RAW_URI Uri_PROPERTY_SCHEME_NAME Uri_PROPERTY_USER_INFOUri_PROPERTY_USER_NAMEUri_PROPERTY_STRING_LASTUri_PROPERTY_HOST_TYPEUri_PROPERTY_DWORD_STARTUri_PROPERTY_PORTUri_PROPERTY_SCHEMEUri_PROPERTY_ZONEUri_PROPERTY_DWORD_LAST6t__MIDL_IUri_0001W4__MIDL_IUri_0001@@jUri_HOST_UNKNOWNUri_HOST_DNSUri_HOST_IPV4Uri_HOST_IPV6Uri_HOST_IDN6t__MIDL_IUri_0002W4__MIDL_IUri_0002@@JGX2_FALSEGX2_TRUEGX2_DISABLEGX2_ENABLE*t_GX2BooleanW4_GX2Boolean@@CC_FASTCALLCC_CDECLCC_MSCPASCALCC_PASCALCC_MACPASCALCC_STDCALLCC_FPFASTCALLCC_SYSCALLCC_MPWCDECLCC_MPWPASCAL CC_MAX* ttagCALLCONVW4tagCALLCONV@@GX2_COMPARE_NEVERGX2_COMPARE_LESSGX2_COMPARE_EQUALGX2_COMPARE_LEQUALGX2_COMPARE_GREATERGX2_COMPARE_NOTEQUALGX2_COMPARE_GEQUALGX2_COMPARE_ALWAYSGX2_COMPARE_FIRSTGX2_COMPARE_LAST: t_GX2CompareFunctionW4_GX2CompareFunction@@GX2_STENCIL_KEEPGX2_STENCIL_ZEROGX2_STENCIL_REPLACEGX2_STENCIL_INCRGX2_STENCIL_DECRGX2_STENCIL_INVERTGX2_STENCIL_INCR_WRAPGX2_STENCIL_DECR_WRAPGX2_STENCIL_FIRSTGX2_STENCIL_LAST: t_GX2StencilFunctionW4_GX2StencilFunction@@RVAR_PERINSTANCEVAR_STATICVAR_CONSTVAR_DISPATCH*ttagVARKINDW4tagVARKIND@@GX2_CHANNEL_MASK_NONEGX2_CHANNEL_MASK_RGX2_CHANNEL_MASK_GGX2_CHANNEL_MASK_RGGX2_CHANNEL_MASK_BGX2_CHANNEL_MASK_RBGX2_CHANNEL_MASK_GBGX2_CHANNEL_MASK_RGBGX2_CHANNEL_MASK_A GX2_CHANNEL_MASK_RA GX2_CHANNEL_MASK_GA GX2_CHANNEL_MASK_RGA GX2_CHANNEL_MASK_BA GX2_CHANNEL_MASK_RBAGX2_CHANNEL_MASK_GBAGX2_CHANNEL_MASK_RGBAGX2_CHANNEL_MASK_FIRSTGX2_CHANNEL_MASK_LAST2t_GX2ChannelMaskW4_GX2ChannelMask@@.IdleShutdownForcedShutdown2ttagShutdownTypeW4tagShutdownType@@GX2_BLEND_COMBINE_ADDGX2_BLEND_COMBINE_SRC_MINUS_DSTGX2_BLEND_COMBINE_MINGX2_BLEND_COMBINE_MAXGX2_BLEND_COMBINE_DST_MINUS_SRCGX2_BLEND_COMBINE_FIRSTGX2_BLEND_COMBINE_LAST6t_GX2BlendCombineW4_GX2BlendCombine@@GX2_ALPHA_TO_MASK_0GX2_ALPHA_TO_MASK_1GX2_ALPHA_TO_MASK_2GX2_ALPHA_TO_MASK_3GX2_ALPHA_TO_MASK_4GX2_ALPHA_TO_MASK_FIRSTGX2_ALPHA_TO_MASK_LAST:t_GX2AlphaToMaskModeW4_GX2AlphaToMaskMode@@URLZONE_INVALIDURLZONE_PREDEFINED_MINURLZONE_LOCAL_MACHINEURLZONE_INTRANETURLZONE_TRUSTEDURLZONE_INTERNETURLZONE_UNTRUSTEDURLZONE_PREDEFINED_MAXURLZONE_USER_MIN'URLZONE_USER_MAX* ttagURLZONEW4tagURLZONE@@"GX2_RENDER_TARGET_0GX2_RENDER_TARGET_1GX2_RENDER_TARGET_2GX2_RENDER_TARGET_3GX2_RENDER_TARGET_4GX2_RENDER_TARGET_5GX2_RENDER_TARGET_6GX2_RENDER_TARGET_7GX2_RENDER_TARGET_FIRSTGX2_RENDER_TARGET_LAST6 t_GX2RenderTargetW4_GX2RenderTarget@@GX2_SPECIAL_STATE_CLEARGX2_SPECIAL_STATE_CLEAR_HIZGX2_SPECIAL_STATE_COPYGX2_SPECIAL_STATE_EXPAND_COLORGX2_SPECIAL_STATE_EXPAND_DEPTHGX2_SPECIAL_STATE_CONVERT_DEPTHGX2_SPECIAL_STATE_CONVERT_AADEPTHGX2_SPECIAL_STATE_RESOLVE_COLORGX2_SPECIAL_STATE_CLEAR_COLOR_AS_DEPTHGX2_SPECIAL_STATE_FIRSTGX2_SPECIAL_STATE_LAST6 t_GX2SpecialStateW4_GX2SpecialState@@ GX2_ATTRIB_FORMAT_8_UNORMGX2_ATTRIB_FORMAT_8_UINTGX2_ATTRIB_FORMAT_8_SNORMGX2_ATTRIB_FORMAT_8_SINTGX2_ATTRIB_FORMAT_8_UINT_TO_FLOAT GX2_ATTRIB_FORMAT_8_SINT_TO_FLOATGX2_ATTRIB_FORMAT_4_4_UNORMGX2_ATTRIB_FORMAT_16_UNORMGX2_ATTRIB_FORMAT_16_UINTGX2_ATTRIB_FORMAT_16_SNORMGX2_ATTRIB_FORMAT_16_SINTGX2_ATTRIB_FORMAT_16_FLOATGX2_ATTRIB_FORMAT_16_UINT_TO_FLOAT GX2_ATTRIB_FORMAT_16_SINT_TO_FLOATGX2_ATTRIB_FORMAT_8_8_UNORMGX2_ATTRIB_FORMAT_8_8_UINTGX2_ATTRIB_FORMAT_8_8_SNORMGX2_ATTRIB_FORMAT_8_8_SINTGX2_ATTRIB_FORMAT_8_8_UINT_TO_FLOAT GX2_ATTRIB_FORMAT_8_8_SINT_TO_FLOATGX2_ATTRIB_FORMAT_32_UINTGX2_ATTRIB_FORMAT_32_SINTGX2_ATTRIB_FORMAT_32_FLOATGX2_ATTRIB_FORMAT_16_16_UNORMGX2_ATTRIB_FORMAT_16_16_UINTGX2_ATTRIB_FORMAT_16_16_SNORMGX2_ATTRIB_FORMAT_16_16_SINTGX2_ATTRIB_FORMAT_16_16_FLOATGX2_ATTRIB_FORMAT_16_16_UINT_TO_FLOAT GX2_ATTRIB_FORMAT_16_16_SINT_TO_FLOAT GX2_ATTRIB_FORMAT_10_11_11_FLOAT GX2_ATTRIB_FORMAT_8_8_8_8_UNORM GX2_ATTRIB_FORMAT_8_8_8_8_UINT GX2_ATTRIB_FORMAT_8_8_8_8_SNORM GX2_ATTRIB_FORMAT_8_8_8_8_SINT GX2_ATTRIB_FORMAT_8_8_8_8_UINT_TO_FLOAT GX2_ATTRIB_FORMAT_8_8_8_8_SINT_TO_FLOAT GX2_ATTRIB_FORMAT_10_10_10_2_UNORM GX2_ATTRIB_FORMAT_10_10_10_2_UINT GX2_ATTRIB_FORMAT_10_10_10_2_SNORM GX2_ATTRIB_FORMAT_10_10_10_2_SINT GX2_ATTRIB_FORMAT_32_32_UINT GX2_ATTRIB_FORMAT_32_32_SINT GX2_ATTRIB_FORMAT_32_32_FLOATGX2_ATTRIB_FORMAT_16_16_16_16_UNORMGX2_ATTRIB_FORMAT_16_16_16_16_UINTGX2_ATTRIB_FORMAT_16_16_16_16_SNORMGX2_ATTRIB_FORMAT_16_16_16_16_SINTGX2_ATTRIB_FORMAT_16_16_16_16_FLOATGX2_ATTRIB_FORMAT_16_16_16_16_UINT_TO_FLOAT GX2_ATTRIB_FORMAT_16_16_16_16_SINT_TO_FLOATGX2_ATTRIB_FORMAT_32_32_32_UINTGX2_ATTRIB_FORMAT_32_32_32_SINTGX2_ATTRIB_FORMAT_32_32_32_FLOATGX2_ATTRIB_FORMAT_32_32_32_32_UINTGX2_ATTRIB_FORMAT_32_32_32_32_SINTGX2_ATTRIB_FORMAT_32_32_32_32_FLOATGX2_ATTRIB_FORMAT_FIRST GX2_ATTRIB_FORMAT_LAST6;t_GX2AttribFormatW4_GX2AttribFormat@@NURLZONEREG_DEFAULTURLZONEREG_HKLMURLZONEREG_HKCU*t_URLZONEREGW4_URLZONEREG@@GX2_ATTRIB_INDEX_VERTEX_IDGX2_ATTRIB_INDEX_INSTANCE_IDGX2_ATTRIB_INDEX_FIRSTGX2_ATTRIB_INDEX_LAST:t_GX2AttribIndexTypeW4_GX2AttribIndexType@@J_ADDR_ALLOCSYSMEM_INPUTU_ADDR_ALLOCSYSMEM_INPUT@@      F_ADDR_FREESYSMEM_INPUTU_ADDR_FREESYSMEM_INPUT@@      F_ADDR_DEBUGPRINT_INPUTU_ADDR_DEBUGPRINT_INPUT@@      J allocSysMem freeSysMem debugPrint:_ADDR_CALLBACKSU_ADDR_CALLBACKS@@6tagPARAMDESCEXUtagPARAMDESCEX@@  2 pparamdescex !wParamFlags2tagPARAMDESCUtagPARAMDESC@@.tagVARIANTUtagVARIANT@@2 "cBytes varDefaultValue6 tagPARAMDESCEXUtagPARAMDESCEX@@ ugbAddrConfig ubackendDisables ubackendMap u noOfBanks unoOfRanks upTileConfig u noOfEntriesB(_ADDR_REGISTER_VALUEU_ADDR_REGISTER_VALUE@@2tagFUNCDESCUtagFUNCDESC@@  .tagVARDESCUtagVARDESC@@  .ITypeCompUITypeComp@@  B lpfuncdesc lpvardesc lptcomp&tagBINDPTRTtagBINDPTR@@ u u u u u u u u u u u u u u u u u tile1DThin1 tile1DThick tile2DThin1 tile2DThin2 tile2DThin4 tile2DThick tile2BThin1 tile2BThin2 tile2BThin4 tile2BThick tile3DThin1 tile3DThick tile3BThin1 tile3BThick tile2DXThick tile3DXThick tilePowerSave uvalue2_ADDR_TILE_CAPST_ADDR_TILE_CAPS@@ u u u u forceLinearAligned noCubeMipSlicesPad sliceSizeComputing fillSizeFields useTileIndex useTileCaps  reserved uvalue6 _ADDR_CREATE_FLAGST_ADDR_CREATE_FLAGS@@nFUNC_VIRTUALFUNC_PUREVIRTUALFUNC_NONVIRTUALFUNC_STATICFUNC_DISPATCH*t tagFUNCKINDW4tagFUNCKIND@@&_GUIDU_GUID@@z guid "lcid syskind !wMajorVerNum !wMinorVerNum !wLibFlags2 tagTLIBATTRUtagTLIBATTR@@2tagTYPEDESCUtagTYPEDESC@@.tagIDLDESCUtagIDLDESC@@2tagPARAMDESCUtagPARAMDESC@@: tdesc idldesc paramdesc2 tagELEMDESCUtagELEMDESC@@ q tagCYTtagCY@@*IUnknownUIUnknown@@  .IDispatchUIDispatch@@  2tagSAFEARRAYUtagSAFEARRAY@@            &tagDECUtagDEC@@ # 2IRecordInfoUIRecordInfo@@ %  !vt !wReserved1 !wReserved2 !wReserved3 llVal lVal  bVal iVal @fltVal AdblVal boolVal scode cyVal Adate qbstrVal punkVal pdispVal parray  pbVal piVal plVal pllVal @pfltVal ApdblVal pboolVal pscode pcyVal Apdate pbstrVal ppunkVal  ppdispVal !pparray "pvarVal byref pcVal !uiVal "ulVal #ullVal tintVal uuintVal $pdecVal ppcVal !puiVal "pulVal #pullVal tpintVal upuintVal pvRecord &pRecInfo #decVal.2'tagVARIANTUtagVARIANT@@  ) p#6 *pVFTable spare +name:,_TypeDescriptorU_TypeDescriptor@@* "cElements lLbound>.tagSAFEARRAYBOUNDUtagSAFEARRAYBOUND@@* pmodeStr modeGX2>0TC2TileModeConvertUTC2TileModeConvert@@. ueyeHeight urightOffset>2_ADDR_QBSTEREOINFOU_ADDR_QBSTEREOINFO@@  2tagARRAYDESCUtagARRAYDESC@@ 5 N 4lptdesc 6lpadesc "hreftype !vt27tagTYPEDESCUtagTYPEDESC@@2tagEXCEPINFOUtagEXCEPINFO@@ 9  :; <  !wCode !wReserved qbstrSource qbstrDescription qbstrHelpFile " dwHelpContext (pvReserved =0pfnDeferredFillIn 8scode2 >@tagEXCEPINFOUtagEXCEPINFO@@2_ULARGE_INTEGERT_ULARGE_INTEGER@@._FILETIMEU_FILETIME@@ qpwcsName "type @cbSize Amtime A ctime A(atime "0grfMode "4grfLocksSupported 8clsid "HgrfStateBits "Lreserved. BPtagSTATSTGUtagSTATSTG@@2 tmdisp tpdisp tvdisp"D _PMDU_PMD@@2tagELEMDESCUtagELEMDESC@@ F jINVOKE_FUNCINVOKE_PROPERTYGETINVOKE_PROPERTYPUTINVOKE_PROPERTYPUTREF.tHtagINVOKEKINDW4tagINVOKEKIND@@ memid lprgscode GlprgelemdescParam  funckind Iinvkind  callconv $cParams &cParamsOpt (oVft *cScodes F0elemdescFunc !PwFuncFlags2 JXtagFUNCDESCUtagFUNCDESC@@v_ADDR_ALLOCSYSMEM_FLAGS::U@_ADDR_ALLOCSYSMEM_FLAGS@@FL Lfields uvalueBM_ADDR_ALLOCSYSMEM_FLAGST_ADDR_ALLOCSYSMEM_FLAGS@@ u  OreservedvP_ADDR_ALLOCSYSMEM_FLAGS::U@_ADDR_ALLOCSYSMEM_FLAGS@@. #dwReserved !wIDLFlags.RtagIDLDESCUtagIDLDESC@@ #B "Data1 !Data2 !Data3 TData4&U_GUIDU_GUID@@ # Wreserved2X_GX2PerfDataU_GX2PerfData@@GX2_TV_RENDER_NONEGX2_TV_RENDER_480_NARROWGX2_TV_RENDER_480_WIDEGX2_TV_RENDER_720GX2_TV_RENDER_RESERVEDGX2_TV_RENDER_1080GX2_TV_RENDER_FIRSTGX2_TV_RENDER_LAST6tZ_GX2TVRenderModeW4_GX2TVRenderMode@@rADDR_TM_LINEAR_GENERALADDR_TM_LINEAR_ALIGNEDADDR_TM_1D_TILED_THIN1ADDR_TM_1D_TILED_THICKADDR_TM_2D_TILED_THIN1ADDR_TM_2D_TILED_THIN2ADDR_TM_2D_TILED_THIN4ADDR_TM_2D_TILED_THICKADDR_TM_2B_TILED_THIN1 ADDR_TM_2B_TILED_THIN2 ADDR_TM_2B_TILED_THIN4 ADDR_TM_2B_TILED_THICK ADDR_TM_3D_TILED_THIN1 ADDR_TM_3D_TILED_THICKADDR_TM_3B_TILED_THIN1ADDR_TM_3B_TILED_THICKADDR_TM_2D_TILED_XTHICKADDR_TM_3D_TILED_XTHICKADDR_TM_POWER_SAVEADDR_TM_COUNT.t\_AddrTileModeW4_AddrTileMode@@ u6_ADDR_TILEINFOU_ADDR_TILEINFO@@ _  usize #addr ubitPosition upitch uheight unumSamples u numFrags ]$tileMode u(pipeSwizzle u,bankSwizzle 0resolved 0ignoreSE ^0reserved `8pTileInfoja@_ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUTU_ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT@@6ServerApplicationLibraryApplication:tctagApplicationTypeW4tagApplicationType@@ u usize ]tileMode upitch u height unumSlices unumSamples unumFrags resolved ereserved ` pTileInfo t(tileIndexV f0_ADDR_COMPUTE_FMASK_INFO_INPUTU_ADDR_COMPUTE_FMASK_INFO_INPUT@@ADDR_COLOR_INVALIDADDR_COLOR_8ADDR_COLOR_4_4ADDR_COLOR_3_3_2ADDR_COLOR_RESERVED_4ADDR_COLOR_16ADDR_COLOR_16_FLOATADDR_COLOR_8_8ADDR_COLOR_5_6_5 ADDR_COLOR_6_5_5 ADDR_COLOR_1_5_5_5 ADDR_COLOR_4_4_4_4 ADDR_COLOR_5_5_5_1 ADDR_COLOR_32ADDR_COLOR_32_FLOATADDR_COLOR_16_16ADDR_COLOR_16_16_FLOATADDR_COLOR_8_24ADDR_COLOR_8_24_FLOATADDR_COLOR_24_8ADDR_COLOR_24_8_FLOATADDR_COLOR_10_11_11ADDR_COLOR_10_11_11_FLOATADDR_COLOR_11_11_10ADDR_COLOR_11_11_10_FLOATADDR_COLOR_2_10_10_10ADDR_COLOR_8_8_8_8ADDR_COLOR_10_10_10_2ADDR_COLOR_X24_8_32_FLOATADDR_COLOR_32_32ADDR_COLOR_32_32_FLOATADDR_COLOR_16_16_16_16 ADDR_COLOR_16_16_16_16_FLOAT!ADDR_COLOR_RESERVED_33"ADDR_COLOR_32_32_32_32#ADDR_COLOR_32_32_32_32_FLOAT6$th_AddrColorFormatW4_AddrColorFormat@@ADDR_NUMBER_UNORMADDR_NUMBER_SNORMADDR_NUMBER_USCALEDADDR_NUMBER_SSCALEDADDR_NUMBER_UINTADDR_NUMBER_SINTADDR_NUMBER_SRGBADDR_NUMBER_FLOAT:tj_AddrSurfaceNumberW4_AddrSurfaceNumber@@ZADDR_SWAP_STDADDR_SWAP_ALTADDR_SWAP_STD_REVADDR_SWAP_ALT_REV6tl_AddrSurfaceSwapW4_AddrSurfaceSwap@@*ADDR_FLT_32TADDR_FLT_32@@n#^ usize iformat ksurfNum m surfSwap ocompsVp _ELEM_FLT32TOCOLORPIXEL_INPUTU_ELEM_FLT32TOCOLORPIXEL_INPUT@@* "cElems pElems.rtagCABSTRUtagCABSTR@@nADDR_DISPLAYABLEADDR_NON_DISPLAYABLEADDR_DEPTH_SAMPLE_ORDERADDR_THICK_TILING.tt_AddrTileTypeW4_AddrTileType@@ usize #addr ubitPosition ubpp upitch uheight u numSlices u$numSamples ](tileMode t,isDepth u0tileBase u4compBits u8pipeSwizzle u<bankSwizzle u@numFrags uDtileType HignoreSE eHreserved `PpTileInfo tXtileIndexnv`_ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUTU_ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT@@& usize `pTileInfo^x_ADDR_CONVERT_TILEINFOTOHW_OUTPUTU_ADDR_CONVERT_TILEINFOTOHW_OUTPUT@@PIDMSI_STATUS_NORMALPIDMSI_STATUS_NEWPIDMSI_STATUS_PRELIMPIDMSI_STATUS_DRAFTPIDMSI_STATUS_INPROGRESSPIDMSI_STATUS_EDITPIDMSI_STATUS_REVIEWPIDMSI_STATUS_PROOFPIDMSI_STATUS_FINALPIDMSI_STATUS_OTHER: tzPIDMSI_STATUS_VALUEW4PIDMSI_STATUS_VALUE@@R_s__RTTIBaseClassDescriptor2U_s__RTTIBaseClassDescriptor2@@ | } ~#* arrayOfBaseClassDescriptorsf$_s__RTTIBaseClassArray$_extraBytes_16U$_s__RTTIBaseClassArray$_extraBytes_16@@  * "cElems pElems.tagCACLSIDUtagCACLSID@@* "cElems ApElems*tagCADBLUtagCADBL@@ usize ux uy u slice usample ubpp upitch uheight u numSlices u$numSamples ](tileMode t,isDepth u0tileBase u4compBits u8pipeSwizzle u<bankSwizzle u@numFrags uDtileType HignoreSE eHreserved `PpTileInfo tXtileIndexn`_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT@@^ usize ux uy u slice uplane usamplej_ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT@@@#& value uoffsetJ_GX2UniformInitialValueU_GX2UniformInitialValue@@GX2_TEX_Z_PERF_0GX2_TEX_Z_PERF_1GX2_TEX_Z_PERF_2GX2_TEX_Z_PERF_3GX2_TEX_Z_PERF_FIRSTGX2_TEX_Z_PERF_LAST6t_GX2TexZPerfTypeW4_GX2TexZPerfType@@FthreadlocaleinfostructUthreadlocaleinfostruct@@  BthreadmbcinfostructUthreadmbcinfostruct@@  * locinfo mbcinfo>localeinfo_structUlocaleinfo_struct@@^GX2_UDAID_NOALERTGX2_UDAID_ENABLESTATESHADOWINGGX2_UDAID_LAST2t_GX2UDAAlertIDW4_GX2UDAAlertID@@* "cElems  pElems*tagCAUBUtagCAUB@@:_TypeDescriptorU_TypeDescriptor@@  Z_s__RTTIClassHierarchyDescriptorU_s__RTTIClassHierarchyDescriptor@@   V_s__RTTICompleteObjectLocator2U_s__RTTICompleteObjectLocator2@@    "signature "offset "cdOffset  pTypeDescriptor pClassDescriptor pSelfV$_s__RTTICompleteObjectLocator2U_s__RTTICompleteObjectLocator2@@: usize #addr ubitPositionj_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT@@GX2_POLYGON_MODE_POINTGX2_POLYGON_MODE_LINEGX2_POLYGON_MODE_TRIANGLEGX2_POLYGON_MODE_FIRSTGX2_POLYGON_MODE_LAST2t_GX2PolygonModeW4_GX2PolygonMode@@* "cElems pElems*tagCACYUtagCACY@@>_GX2HiStencilStateU_GX2HiStencilState@@#u#" state _regs> _GX2HiStencilInfoU_GX2HiStencilInfo@@N usize treverse `pTileInfo ttileIndexZ_ADDR_CONVERT_TILEINFOTOHW_INPUTU_ADDR_CONVERT_TILEINFOTOHW_INPUT@@nGX2_FRONT_FACE_CCWGX2_FRONT_FACE_CWGX2_FRONT_FACE_FIRSTGX2_FRONT_FACE_LAST6t_GX2FrontFaceModeW4_GX2FrontFaceMode@@BADDR_HTILE_BLOCKSIZE_4ADDR_HTILE_BLOCKSIZE_8:t_AddrHtileBlockSizeW4_AddrHtileBlockSize@@ usize #addr ubitPosition upitch uheight unumSlices t isLinear $blockWidth (blockHeight `0pTileInfo t8tileIndexj @_ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUTU_ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT@@GX2_BLEND_ZEROGX2_BLEND_ONEGX2_BLEND_SRC_COLORGX2_BLEND_ONE_MINUS_SRC_COLORGX2_BLEND_SRC_ALPHAGX2_BLEND_ONE_MINUS_SRC_ALPHAGX2_BLEND_DST_ALPHAGX2_BLEND_ONE_MINUS_DST_ALPHAGX2_BLEND_DST_COLOR GX2_BLEND_ONE_MINUS_DST_COLOR GX2_BLEND_SRC_ALPHA_SATURATE GX2_BLEND_CONSTANT_COLORGX2_BLEND_ONE_MINUS_CONSTANT_COLORGX2_BLEND_SRC1_COLORGX2_BLEND_ONE_MINUS_SRC1_COLORGX2_BLEND_SRC1_ALPHAGX2_BLEND_ONE_MINUS_SRC1_ALPHAGX2_BLEND_CONSTANT_ALPHAGX2_BLEND_ONE_MINUS_CONSTANT_ALPHAGX2_BLEND_FIRSTGX2_BLEND_LAST6t_GX2BlendFunctionW4_GX2BlendFunction@@B_ADDR_ALLOCSYSMEM_FLAGST_ADDR_ALLOCSYSMEM_FLAGS@@N usize flags usizeInBytes hClientJ_ADDR_ALLOCSYSMEM_INPUTU_ADDR_ALLOCSYSMEM_INPUT@@ q  ~ usize ubankSwizzle upipeSwizzle #baseAddr `pTileInfo t tileIndexb(_ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUTU_ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT@@ usize upitch uheight u numSlices #fmaskBytes ubaseAlign upitchAlign u heightAlign u$bpp u(numSamples `0pTileInfo t8tileIndexZ @_ADDR_COMPUTE_FMASK_INFO_OUTPUTU_ADDR_COMPUTE_FMASK_INFO_OUTPUT@@:_ADDR_CALLBACKSU_ADDR_CALLBACKS@@6_ADDR_CREATE_FLAGST_ADDR_CREATE_FLAGS@@B_ADDR_REGISTER_VALUEU_ADDR_REGISTER_VALUE@@2_ADDR_TILE_CAPST_ADDR_TILE_CAPS@@ usize uchipEngine uchipFamily u chipRevision callbacks (createFlags 0regValue XhClient `tileCaps> h_ADDR_CREATE_INPUTU_ADDR_CREATE_INPUT@@6 "dwLowDateTime "dwHighDateTime._FILETIMEU_FILETIME@@ memid qlpstrSchema "oInst "lpvarValue FelemdescVar !8wVarFlags <varkind.@tagVARDESCUtagVARDESC@@ q   UP      ,    "  ,    , v QueryInterfaceAddRefReleaseIUnknownoperator=*&IUnknownUIUnknown@@>tagSAFEARRAYBOUNDUtagSAFEARRAYBOUND@@#: tdescElem !cDims rgbounds2 tagARRAYDESCUtagARRAYDESC@@u# data>_GX2ContextStateU_GX2ContextState@@.AddrObjectVAddrObject@@2AddrElemLibVAddrElemLib@@    ,  *AddrLibVAddrLib@@          >_ADDR_CREATE_INPUTU_ADDR_CREATE_INPUT@@      ikm tADDR_DEPTH_INVALIDADDR_DEPTH_16ADDR_DEPTH_X8_24ADDR_DEPTH_8_24ADDR_DEPTH_X8_24_FLOATADDR_DEPTH_8_24_FLOATADDR_DEPTH_32_FLOATADDR_DEPTH_X24_8_32_FLOAT6t_AddrDepthFormatW4_AddrDepthFormat@@ n    ikm  6ADDR_NO_NUMBERADDR_EPSILONADDR_ZEROADDR_ONEADDR_UNORMADDR_SNORMADDR_GAMMAADDR_UNORM_R5XXRBADDR_SNORM_R5XXRB ADDR_GAMMA_R5XXRB ADDR_UNORM_R5XXBC ADDR_SNORM_R5XXBC ADDR_GAMMA_R5XXBC ADDR_UNORM_R6XXADDR_UNORM_R6XXDBADDR_SNORM_R6XXADDR_GAMMA8_R6XXADDR_GAMMA8_R7XX_TPADDR_U4FLOATCADDR_GAMMA_4SEGADDR_U0FIXEDADDR_USCALEDADDR_SSCALEDADDR_USCALED_R5XXRBADDR_SSCALED_R5XXRBADDR_UINT_BITSADDR_SINT_BITSADDR_UINTBITSADDR_SINTBITSADDR_S8FLOATADDR_S8FLOAT32ADDR_S5FLOAT ADDR_S5FLOATM!ADDR_U5FLOAT"ADDR_U3FLOATM#ADDR_S5FIXED$ADDR_END_NUMBER2%tAddrNumberTypeW4AddrNumberType@@nu u  :ADDR_COMPONENT_FLAGSTADDR_COMPONENT_FLAGS@@"uuuu u   FADDR_PIXEL_FORMATINFOUADDR_PIXEL_FORMATINFO@@  ikm  >ADDR_FMT_INVALIDADDR_FMT_8ADDR_FMT_4_4ADDR_FMT_3_3_2ADDR_FMT_RESERVED_4ADDR_FMT_16ADDR_FMT_16_FLOATADDR_FMT_8_8ADDR_FMT_5_6_5 ADDR_FMT_6_5_5 ADDR_FMT_1_5_5_5 ADDR_FMT_4_4_4_4 ADDR_FMT_5_5_5_1 ADDR_FMT_32ADDR_FMT_32_FLOATADDR_FMT_16_16ADDR_FMT_16_16_FLOATADDR_FMT_8_24ADDR_FMT_8_24_FLOATADDR_FMT_24_8ADDR_FMT_24_8_FLOATADDR_FMT_10_11_11ADDR_FMT_10_11_11_FLOATADDR_FMT_11_11_10ADDR_FMT_11_11_10_FLOATADDR_FMT_2_10_10_10ADDR_FMT_8_8_8_8ADDR_FMT_10_10_10_2ADDR_FMT_X24_8_32_FLOATADDR_FMT_32_32ADDR_FMT_32_32_FLOATADDR_FMT_16_16_16_16 ADDR_FMT_16_16_16_16_FLOAT!ADDR_FMT_RESERVED_33"ADDR_FMT_32_32_32_32#ADDR_FMT_32_32_32_32_FLOAT$ADDR_FMT_RESERVED_36%ADDR_FMT_1&ADDR_FMT_1_REVERSED'ADDR_FMT_GB_GR(ADDR_FMT_BG_RG)ADDR_FMT_32_AS_8*ADDR_FMT_32_AS_8_8+ADDR_FMT_5_9_9_9_SHAREDEXP,ADDR_FMT_8_8_8-ADDR_FMT_16_16_16.ADDR_FMT_16_16_16_FLOAT/ADDR_FMT_32_32_320ADDR_FMT_32_32_32_FLOAT1ADDR_FMT_BC12ADDR_FMT_BC23ADDR_FMT_BC34ADDR_FMT_BC45ADDR_FMT_BC56ADDR_FMT_BC67ADDR_FMT_BC78ADDR_FMT_32_AS_32_32_32_329ADDR_FMT_APC3:ADDR_FMT_APC4;ADDR_FMT_APC5<ADDR_FMT_APC6=ADDR_FMT_APC7>ADDR_FMT_CTX1?ADDR_FMT_RESERVED_63*@t_AddrFormatW4_AddrFormat@@  uuu u n tt uuuuu * uuuuuuuu t  t6ADDR_CONFIG_FLAGSTADDR_CONFIG_FLAGS@@ " #uuuu %ik 'm )uu + , - u /AddrElemLib~AddrElemLib CreatePixGetExportNormFlt32ToDepthPixelFlt32ToColorPixel Flt32sToInt32s Int32sToPixelPixGetColorCompInfoPixGetDepthCompInfoGetBitsPerPixel SetClearCompsAdjustSurfaceInfo AdjustSurfaceInfoFromLevel0RestoreSurfaceInfo!IsDepthStencilTilePlanar$SetConfigFlags &GetCompBits (GetCompType *GetCompSwap ,SwapComps um_fp16ExportNorm m_depthPlanarType " m_configFlags (m_pAddrLib.operator=0__vecDelDtor P2&120AddrElemLibVAddrElemLib@@## #@#A##b 4results 5padding 6enabled 7stats 8sqType:9(__GX2CounterInfoU__GX2CounterInfo@@u#0:_GX2UniformBlockU_GX2UniformBlock@@ < 6_GX2UniformVarU_GX2UniformVar@@ > J_GX2UniformInitialValueU_GX2UniformInitialValue@@ @ 6_GX2SamplerVarU_GX2SamplerVar@@ B 2_GX2RBufferU_GX2RBuffer@@ ;_regs u0shaderSize 8shaderPtr u@numUniformBlocks =HuniformBlocks uPnumUniforms ?XuniformVars u`numInitialValues AhinitialValues up_numLoops x_loopVars unumSamplers CsamplerVars ulayout_size_x ulayout_size_y ulayout_size_z Over64Mode unumWavesPerSIMD DshaderProgram>E_GX2ComputeShaderU_GX2ComputeShader@@2 "Lo Hi int64GtagCYTtagCY@@ usize upitch uheight #cmaskBytes ubaseAlign ublockMax u macroWidth u$macroHeightZI(_ADDR_COMPUTE_CMASK_INFO_OUTPUTU_ADDR_COMPUTE_CMASK_INFO_OUTPUT@@ !wReserved  scale  sign !signscale "Hi32 "Lo32 " Mid32 #Lo64&KtagDECUtagDEC@@ usize ]tileMode ubaseSwizzle u slice #baseAddr `pTileInfo t tileIndexZM(_ADDR_COMPUTE_SLICESWIZZLE_INPUTU_ADDR_COMPUTE_SLICESWIZZLE_INPUT@@B usize ubankSwizzle upipeSwizzlefO _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUTU_ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT@@ usize upitch uheight #htileBytes ubaseAlign ubpp u macroWidth u$macroHeightZQ(_ADDR_COMPUTE_HTILE_INFO_OUTPUTU_ADDR_COMPUTE_HTILE_INFO_OUTPUT@@u# SdataBT_GX2StreamOutContextU_GX2StreamOutContext@@* "cElems "pElems*VtagCAULUtagCAUL@@~ usize  pPixel udepthBase ustencilBase udepthBits ustencilBitsVX _ELEM_FLT32TODEPTHPIXEL_OUTPUTU_ELEM_FLT32TODEPTHPIXEL_OUTPUT@@& ti uu @f*ZADDR_FLT_32TADDR_FLT_32@@: usize pVirtAddr hClientF\_ADDR_FREESYSMEM_INPUTU_ADDR_FREESYSMEM_INPUT@@& "cbSize  pData2^tagBSTRBLOBUtagBSTRBLOB@@._LARGE_INTEGERT_LARGE_INTEGER@@ ` * "cElems apElems&btagCAHUtagCAH@@* @f32Result #u64Result2d_GX2MetricResultT_GX2MetricResult@@*_TP_POOLU_TP_POOL@@ f >_TP_CLEANUP_GROUPU_TP_CLEANUP_GROUP@@ h j k B_ACTIVATION_CONTEXTU_ACTIVATION_CONTEXT@@ m F_TP_CALLBACK_INSTANCEU_TP_CALLBACK_INSTANCE@@ o pq r ^_TP_CALLBACK_ENVIRON::T@_TP_CALLBACK_ENVIRON@@ "Version gPool iCleanupGroup lCleanupGroupCancelCallback  RaceDll n(ActivationContext s0FinalizationCallbackt t8uB u@_TP_CALLBACK_ENVIRONU_TP_CALLBACK_ENVIRON@@_TP_CALLBACK_ENVIRON::::U@@_TP_CALLBACK_ENVIRON@@: "Flagsw ws^x_TP_CALLBACK_ENVIRON::T@_TP_CALLBACK_ENVIRON@@ " ". zLongFunction {Private|_TP_CALLBACK_ENVIRON::::U@@_TP_CALLBACK_ENVIRON@@ usize upitch uheight u numSlices tisLinear `pTileInfo t tileIndexV~(_ADDR_COMPUTE_CMASKINFO_INPUTU_ADDR_COMPUTE_CMASKINFO_INPUT@@  .ITypeInfoUITypeInfo@@     Y &tagBINDPTRTtagBINDPTR@@  q"!   q"   ,    , bBind BindTypeITypeCompoperator= UUP.&ITypeCompUITypeComp@@* "cElems !pElems*tagCAUIUtagCAUI@@N function  reference  mask enable> _GX2HiStencilStateU_GX2HiStencilState@@ADDR_PIPECFG_INVALIDADDR_PIPECFG_P2ADDR_PIPECFG_P4_8x16ADDR_PIPECFG_P4_16x16ADDR_PIPECFG_P4_16x32ADDR_PIPECFG_P4_32x32 ADDR_PIPECFG_P8_16x16_8x16 ADDR_PIPECFG_P8_16x32_8x16 ADDR_PIPECFG_P8_32x32_8x16 ADDR_PIPECFG_P8_16x32_16x16 ADDR_PIPECFG_P8_32x32_16x16ADDR_PIPECFG_P8_32x32_16x32ADDR_PIPECFG_P8_32x64_32x32ADDR_PIPECFG_MAX.t_AddrPipeCfgW4_AddrPipeCfg@@ A * "cElems pElems6tagCAFILETIMEUtagCAFILETIME@@& usize  pPixelV_ELEM_FLT32TOCOLORPIXEL_OUTPUTU_ELEM_FLT32TOCOLORPIXEL_OUTPUT@@F_s__RTTIBaseClassArrayU_s__RTTIBaseClassArray@@   f "signature "attributes "numBaseClasses  pBaseClassArrayZ_s__RTTIClassHierarchyDescriptorU_s__RTTIClassHierarchyDescriptor@@Z "rgvarg rgdispidNamedArgs ucArgs ucNamedArgs6tagDISPPARAMSUtagDISPPARAMS@@:_ADDR_SURFACE_FLAGST_ADDR_SURFACE_FLAGS@@ usize ]tileMode format u bpp unumSamples uwidth uheight unumSlices u slice u$mipLevel (flags u,numFrags `0pTileInfo u8tileType t<tileIndexZ@_ADDR_COMPUTE_SURFACE_INFO_INPUTU_ADDR_COMPUTE_SURFACE_INFO_INPUT@@z !cDims !fFeatures "cbElements "cLocks pvData rgsabound2 tagSAFEARRAYUtagSAFEARRAY@@GX2_QUERY_TYPE_OCCLUSION_CPUGX2_QUERY_TYPE_STREAMOUT_STATS_CPUGX2_QUERY_TYPE_OCCLUSION_GPUGX2_QUERY_TYPE_STREAMOUT_STATS_GPUGX2_QUERY_TYPE_FIRSTGX2_QUERY_TYPE_LAST.t_GX2QueryTypeW4_GX2QueryType@@"_PMDU_PMD@@~ pTypeDescriptor "numContainedBases  where "attributes pClassDescriptorR$_s__RTTIBaseClassDescriptor2U_s__RTTIBaseClassDescriptor2@@2tagCLIPDATAUtagCLIPDATA@@  2tagBSTRBLOBUtagBSTRBLOB@@*tagBLOBUtagBLOB@@*IStreamUIStream@@  *IStorageUIStorage@@  >tagVersionedStreamUtagVersionedStream@@  &tagCACUtagCAC@@*tagCAUBUtagCAUB@@&tagCAIUtagCAI@@*tagCAUIUtagCAUI@@&tagCALUtagCAL@@*tagCAULUtagCAUL@@&tagCAHUtagCAH@@*tagCAUHUtagCAUH@@*tagCAFLTUtagCAFLT@@*tagCADBLUtagCADBL@@.tagCABOOLUtagCABOOL@@.tagCASCODEUtagCASCODE@@*tagCACYUtagCACY@@.tagCADATEUtagCADATE@@6tagCAFILETIMEUtagCAFILETIME@@.tagCACLSIDUtagCACLSID@@6tagCACLIPDATAUtagCACLIPDATA@@.tagCABSTRUtagCABSTR@@6tagCABSTRBLOBUtagCABSTRBLOB@@.tagCALPSTRUtagCALPSTR@@2tagCALPWSTRUtagCALPWSTR@@:tagCAPROPVARIANTUtagCAPROPVARIANT@@6tagPROPVARIANTUtagPROPVARIANT@@   !vt !wReserved1 !wReserved2 !wReserved3 pcVal  bVal iVal !uiVal lVal "ulVal tintVal uuintVal `hVal @uhVal @fltVal AdblVal boolVal scode cyVal Adate Afiletime puuid pclipdata qbstrVal bstrblobVal blob ppszVal qpwszVal punkVal pdispVal pStream pStorage pVersionedStream parray cac caub cai caui cal caul cah cauh caflt cadbl cabool cascode cacy cadate cafiletime cauuid caclipdata cabstr cabstrblob calpstr calpwstr capropvar ppcVal  pbVal piVal !puiVal plVal "pulVal tpintVal upuintVal @pfltVal ApdblVal pboolVal $pdecVal pscode pcyVal Apdate pbstrVal ppunkVal  ppdispVal !pparray pvarVal #decVal6MtagPROPVARIANTUtagPROPVARIANT@@~#* arrayOfBaseClassDescriptorsf $_s__RTTIBaseClassArray$_extraBytes_8U$_s__RTTIBaseClassArray$_extraBytes_8@@GX2_CB_EVENT_USER_TS_TOPGX2_CB_EVENT_USER_TS_BOTTOMGX2_CB_EVENT_VSYNCGX2_CB_EVENT_FLIPGX2_CB_EVENT_DL_OVERRUNGX2_CB_EVENT_LAST6t_GX2CallbackEventW4_GX2CallbackEvent@@ type S_regs ushaderSize shaderPtr unumAttribs u_num_divisors  _divisors:(_GX2FetchShaderU_GX2FetchShader@@* "cElems pElems:tagCAPROPVARIANTUtagCAPROPVARIANT@@GX2_DRC_ENCODING_INVALLIDATEGX2_DRC_ENCODING_MOTION_VECTORGX2_DRC_ENCODING_FIRSTGX2_DRC_ENCODING_LAST:t_GX2DRCEncodingHintW4_GX2DRCEncodingHint@@> "cbSize ulClipFmt  pClipData2tagCLIPDATAUtagCLIPDATA@@.tagCADATEUtagCADATE@@ p  6 name ulocation u size:_GX2UniformBlockU_GX2UniformBlock@@*GX2_TV_SCAN_MODE_NONEGX2_TV_SCAN_MODE_576IGX2_TV_SCAN_MODE_480IGX2_TV_SCAN_MODE_480PGX2_TV_SCAN_MODE_720PGX2_TV_SCAN_MODE_RESERVEDGX2_TV_SCAN_MODE_1080IGX2_TV_SCAN_MODE_1080PGX2_TV_SCAN_MODE_FIRSTGX2_TV_SCAN_MODE_LAST2 t_GX2TVScanModeW4_GX2TVScanMode@@GX2_TEX_BORDER_CLEAR_BLACKGX2_TEX_BORDER_SOLID_BLACKGX2_TEX_BORDER_SOLID_WHITEGX2_TEX_BORDER_USE_REGISTERGX2_TEX_BORDER_FIRSTGX2_TEX_BORDER_LAST6t_GX2TexBorderTypeW4_GX2TexBorderType@@bGX2_PERF_TYPE_GPU_METRICGX2_PERF_TYPE_GPU_STATGX2_PERF_TYPE_MEM_STAT.t_GX2PerfTypeW4_GX2PerfType@@* "cElems ppElems&tagCACUtagCAC@@ guid "lcid "dwReserved memidConstructor memidDestructor q lpstrSchema "(cbSizeInstance ,typekind !0cFuncs !2cVars !4cImplTypes !6cbSizeVft !8cbAlignment !:wTypeFlags !<wMajorVerNum !>wMinorVerNum @tdescAlias PidldescType2`tagTYPEATTRUtagTYPEATTR@@u# surface uviewFirstMip uviewNumMips uviewFirstSlice uviewNumSlices ucompSel _regs2_GX2TextureU_GX2Texture@@* "cbSize  pBlobData*tagBLOBUtagBLOB@@u# #b compBit numType  compStart 0elemMode u4compsF8ADDR_PIXEL_FORMATINFOUADDR_PIXEL_FORMATINFO@@~GX2_PIPE_EVENT_TOPGX2_PIPE_EVENT_BOTTOMGX2_PIPE_EVENT_BOTTOM_AFTER_FLUSHGX2_PIPE_EVENT_LAST.t_GX2PipeEventW4_GX2PipeEvent@@Z_LARGE_INTEGER::U@_LARGE_INTEGER@@f "LowPart HighPart u QuadPart._LARGE_INTEGERT_LARGE_INTEGER@@* "LowPart HighPartZ_LARGE_INTEGER::U@_LARGE_INTEGER@@Z_ULARGE_INTEGER::U@_ULARGE_INTEGER@@f "LowPart "HighPart u #QuadPart2_ULARGE_INTEGERT_ULARGE_INTEGER@@* "LowPart "HighPartZ_ULARGE_INTEGER::U@_ULARGE_INTEGER@@>ISequentialStreamUISequentialStream@@  ""   *""     ,      ,  f Read  WriteISequentialStreamoperator=>&ISequentialStreamUISequentialStream@@ usize upitch uheight u numSlices tisLinear blockWidth blockHeight ` pTileInfo t(tileIndexV 0_ADDR_COMPUTE_HTILE_INFO_INPUTU_ADDR_COMPUTE_HTILE_INFO_INPUT@@>_ADDR_QBSTEREOINFOU_ADDR_QBSTEREOINFO@@   usize upitch uheight u depth #surfSize ]tileMode ubaseAlign u pitchAlign u$heightAlign u(depthAlign u,bpp u0pixelPitch u4pixelHeight u8pixelBits u<sliceSize u@pitchTileMax uDheightTileMax uHsliceTileMax `PpTileInfo uXtileType t\tileIndex `pStereoInfo^h_ADDR_COMPUTE_SURFACE_INFO_OUTPUTU_ADDR_COMPUTE_SURFACE_INFO_OUTPUT@@> !wLanguage !wCountry !wCodePage*tagLC_IDUtagLC_ID@@GX2_DEBUG_TAG_INDENTGX2_DEBUG_TAG_UNDENTGX2_DEBUG_TAG_COMMENTGX2_DEBUG_TAG_BOOKMARKGX2_DEBUG_TAG_FIRSTGX2_DEBUG_TAG_LASTJt _GX2DebugTagUserStringTypeW4_GX2DebugTagUserStringType@@* "cElems pElems&"tagCAIUtagCAI@@n_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT@@ q % N usize ]tileMode utileType `pTileInfoV'_ADDR_CONVERT_TILEINDEX_OUTPUTU_ADDR_CONVERT_TILEINDEX_OUTPUT@@* usize utileSwizzlef)_ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUTU_ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT@@" usize tindexN+_ADDR_GET_TILEINDEX_OUTPUTU_ADDR_GET_TILEINDEX_OUTPUT@@V byteAligned exportNorm floatComp uvalue:-ADDR_COMPONENT_FLAGSTADDR_COMPONENT_FLAGS@@: usize ux uy u slicej/_ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT@@N usize ux uy u slice usamplen1_ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT@@2IEnumSTATSTGUIEnumSTATSTG@@ 3 .tagSTATSTGUtagSTATSTG@@ 5 "6" 347 " 349 34 3  <  = 34> 3 @, A 34B 34CD 3, F34B8Next: Skip;(Reset?0CloneEIEnumSTATSTGGoperator= UUUP2&HIIEnumSTATSTGUIEnumSTATSTG@@*ITypeLibUITypeLib@@ K  uKLu KLN  uP KLQ KLS2tagTLIBATTRUtagTLIBATTR@@ U  V  W KLX  KLZt" KL\q"t KL^q"! KL` V KLb K d, e KLf KLgh K, jKLfBMGetTypeInfoCountO GetTypeInfoR(GetTypeInfoTypeT0GetTypeInfoOfGuidY8GetLibAttr[@GetTypeComp]HGetDocumentation_PIsNameaXFindNamec`ReleaseTLibAttriITypeLibkoperator= UUUUUUP*&lmITypeLibUITypeLib@@NGX2_TEX_CLAMP_WRAPGX2_TEX_CLAMP_MIRRORGX2_TEX_CLAMP_CLAMPGX2_TEX_CLAMP_MIRROR_ONCEGX2_TEX_CLAMP_CLAMP_HALF_BORDERGX2_TEX_CLAMP_MIRROR_ONCE_HALF_BORDERGX2_TEX_CLAMP_CLAMP_BORDERGX2_TEX_CLAMP_MIRROR_ONCE_BORDERGX2_TEX_CLAMP_FIRSTGX2_TEX_CLAMP_LAST. to_GX2TexClampW4_GX2TexClamp@@u#6_GX2AttribVarU_GX2AttribVar@@ r  q_regs ushaderSize shaderPtr CshaderMode unumUniformBlocks =uniformBlocks unumUniforms ?uniformVars unumInitialValues AinitialValues u_numLoops _loopVars u numSamplers C(samplerVars u0numAttribs s8attribVars u@ringItemsize DhasStreamOut HstreamOutVertexStride DXshaderProgram:th_GX2VertexShaderU_GX2VertexShader@@"#*tagLC_IDUtagLC_ID@@w#$~threadlocaleinfostruct::U@threadlocaleinfostruct@@y#&lconvUlconv@@ {  ! }     6__lc_time_dataU__lc_time_data@@   trefcount ulc_codepage ulc_collate_cp v lc_handle x$lc_idy zHlc_category tlc_clike t mb_cur_max tlconv_intl_refcount tlconv_num_refcount t lconv_mon_refcount |(lconv t0ctype1_refcount !8ctype1 ~@pctype Hpclmap Ppcumap Xlc_time_currF`threadlocaleinfostructUthreadlocaleinfostruct@@R plocale qwlocale trefcount twrefcount~ threadlocaleinfostruct::U@threadlocaleinfostruct@@j/_ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT@@Nvc_attributes::PreAttributeUPreAttribute@vc_attributes@@   6PreAttribute uDeref Valid Null  Tainted Access #ValidElementsConst # ValidBytesConst (ValidElements 0ValidBytes 8ValidElementsLength @ValidBytesLength #HWritableElementsConst #PWritableBytesConst XWritableElements `WritableBytes hWritableElementsLength pWritableBytesLength #xElementSizeConst ElementSize NullTerminated ConditionNvc_attributes::PreAttributeUPreAttribute@vc_attributes@@Rvc_attributes::PostAttributeUPostAttribute@vc_attributes@@   JPostAttribute uDeref Valid Null  Tainted Access #ValidElementsConst # ValidBytesConst (ValidElements 0ValidBytes 8ValidElementsLength @ValidBytesLength #HWritableElementsConst #PWritableBytesConst XWritableElements `WritableBytes hWritableElementsLength pWritableBytesLength #xElementSizeConst ElementSize NullTerminated MustCheck ConditionRvc_attributes::PostAttributeUPostAttribute@vc_attributes@@bvc_attributes::FormatStringAttributeUFormatStringAttribute@vc_attributes@@   VFormatStringAttribute Style UnformattedAlternativebvc_attributes::FormatStringAttributeUFormatStringAttribute@vc_attributes@@ usize ux uy u slice upitch uheight unumSlices tisLinear ` pTileInfo t(tileIndexj 0_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT@@GX2_LOGIC_OP_CLEARGX2_LOGIC_OP_SETGX2_LOGIC_OP_COPY3GX2_LOGIC_OP_INVCOPYGX2_LOGIC_OP_NOOPUGX2_LOGIC_OP_INVGX2_LOGIC_OP_ANDwGX2_LOGIC_OP_NANDGX2_LOGIC_OP_ORGX2_LOGIC_OP_NORfGX2_LOGIC_OP_XORGX2_LOGIC_OP_EQUIVDGX2_LOGIC_OP_REVAND"GX2_LOGIC_OP_INVANDGX2_LOGIC_OP_REVORGX2_LOGIC_OP_INVORGX2_LOGIC_OP_NONEGX2_LOGIC_OP_FIRSTGX2_LOGIC_OP_LAST*t_GX2LogicOpW4_GX2LogicOp@@ surface uviewMip uviewFirstSlice uviewNumSlices auxPtr uauxSize _regs:_GX2ColorBufferU_GX2ColorBuffer@@2GPU_V1GPU_V2GPU_Cafe.tTC2GPUVersionW4TC2GPUVersion@@F ugbTilingConfig gpu tbugFix2197. TC2ConfigUTC2Config@@u# surface uviewMip uviewFirstSlice uviewNumSlices hiZPtr uhiZSize @clearDepth uclearStencil _regs: _GX2DepthBufferU_GX2DepthBuffer@@* "cElems pElems&tagCALUtagCAL@@>localeinfo_structUlocaleinfo_struct@@  > usize ttileIndex ttileInfoHwV _ADDR_CONVERT_TILEINDEX_INPUTU_ADDR_CONVERT_TILEINDEX_INPUT@@^ /resourceFlags uelementSize uelementCount S reserved2_GX2RBufferU_GX2RBuffer@@ @ * "cElems pElems*tagCAUHUtagCAUH@@ %   % %j  %  % " %  %" %" %"" %" % & t% % % % ,  % % %, %RecordInit RecordClear(RecordCopy0GetGuid8GetName@GetSizeHGetTypeInfoPGetFieldXGetFieldNoCopy`PutFieldhPutFieldNoCopypGetFieldNamesxIsMatchingTypeRecordCreateRecordCreateCopyRecordDestroyIRecordInfooperator= UUUUUUUUUP2&IRecordInfoUIRecordInfo@@N usize ppDebugString pap hClientF _ADDR_DEBUGPRINT_INPUTU_ADDR_DEBUGPRINT_INPUT@@" quot rem*_ldiv_tU_ldiv_t@@.tagCASCODEUtagCASCODE@@ p_ptr t_cnt p_base t_flag t_file t _charbuf t$_bufsiz p(_tmpfname&0_iobufU_iobuf@@u#^ _regs ushaderSize shaderPtr CshaderMode unumUniformBlocks =uniformBlocks unumUniforms ?uniformVars unumInitialValues AinitialValues u_numLoops _loopVars unumSamplers CsamplerVars DshaderProgram:_GX2PixelShaderU_GX2PixelShader@@ usize #addr ubitPosition upitch uheight unumSlices t isLinear `(pTileInfo t0tileIndexj 8_ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUTU_ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT@@6 name Itype u location6_GX2SamplerVarU_GX2SamplerVar@@N name Etype u arrayCount ulocation6_GX2AttribVarU_GX2AttribVar@@GX2_UDALEVEL_NONEGX2_UDALEVEL_SEVEREGX2_UDALEVEL_ORDINARYGX2_UDALEVEL_PEDANTICGX2_UDALEVEL_LAST6t_GX2UDAAlertLevelW4_GX2UDAAlertLevel@@j_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT@@^)_ADDR_COMPUTE_SLICESWIZZLE_OUTPUTU_ADDR_COMPUTE_SLICESWIZZLE_OUTPUT@@" usize hLibB_ADDR_CREATE_OUTPUTU_ADDR_CREATE_OUTPUT@@VGX2ViewportReg::T@GX2ViewportReg@@#0. reg60GX2ViewportRegUGX2ViewportReg@@GX2_ROUNDING_MODE_ROUND_TO_EVENGX2_ROUNDING_MODE_TRUNCATEGX2_ROUNDING_MODE_FIRSTGX2_ROUNDING_MODE_LAST>t_GX2RoundingModeTypeW4_GX2RoundingModeType@@ u color depth stencil texture cube volume fmask cubeAsArray compressZ linearWA overlay noStencil inputBaseMap display opt4Space prt qbStereo pow2Pad reserved uvalue:_ADDR_SURFACE_FLAGST_ADDR_SURFACE_FLAGS@@n#6 usize format compsV_ELEM_FLT32TODEPTHPIXEL_INPUTU_ELEM_FLT32TODEPTHPIXEL_INPUT@@2rtagCALPWSTRUtagCALPWSTR@@* "cElems @pElems*tagCAFLTUtagCAFLT@@ p * "cElems pElems.tagCALPSTRUtagCALPSTR@@GX2_INIT_ATTRIB_NULLGX2_INIT_ATTRIB_CB_BASEGX2_INIT_ATTRIB_CB_SIZEGX2_INIT_ATTRIB_UDA_LEVELGX2_INIT_ATTRIB_UDA_TESTMODEGX2_INIT_ATTRIB_UDA_DISABLE_ALERTGX2_INIT_ATTRIB_UDA_MAXFIRECOUNTGX2_INIT_ATTRIB_ARGCGX2_INIT_ATTRIB_ARGV GX2_INIT_ATTRIB_PROFILE_MODE GX2_INIT_ATTRIB_TOSS_STAGE GX2_INIT_ATTRIB_LAST2 t_GX2InitAttribW4_GX2InitAttrib@@B usize ux uy u slice uplane usample upitch uheight u numSamples u$numFrags ](tileMode u,pipeSwizzle u0bankSwizzle 4resolved 4ignoreSE ^4reserved `8pTileInfoj@_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT@@ usize upitch uheight u x uy uslice unumSlices tisLinear  blockWidth $blockHeight `(pTileInfo t0tileIndexj 8_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT@@ ulocation ubuffer uoffset  format indexType ualuDivisor udestSel endianSwap: _GX2AttribStreamU_GX2AttribStream@@:GX2_LOG_ATTRIB_ENABLEGX2_LOG_ATTRIB_LAST.t_GXLogAttribW4_GXLogAttrib@@."tagCABOOLUtagCABOOL@@N'_ADDR_GET_TILEINDEX_INPUTU_ADDR_GET_TILEINDEX_INPUT@@:__GX2CounterInfoU__GX2CounterInfo@@  counterInfo  (usedCpCount  )usedGrbmCount  *usedPaSuCount  +usedVgtCount  ,usedSqCount  -usedSpiCount  .usedSxCount  /usedTaCount  0usedTcpCount  1usedTccCount  2usedDbCount  3usedCbCount  4idxGrbmCount  5idxGrbmGuiActive  6idxGrbmShBusy  7idxPaSuClipBusy  8idxPaSuClprCullPrim  9idxPaSuSuZeroAreaCullPrim  :idxPaSuSuBackFaceCullPrim  ;idxPaSuSuFrontFaceCullPrim  <idxPaSuSuPolyModeFaceCull  =idxPaSuPaInputPrim  >idxPaSuSuStalledSc  ?idxVgtVgtPaClippSend  @idxVgtVgtPaClippIsEvent  AidxVgtReusedVsIndices  BidxVgtPaClippSend  CidxVgtPaClippIsEvent  DidxSqEsVsItemsPerType  EidxSqPsItemsPerType  FidxSqEsVsGsPsTaTexInstrsPerType  GidxSqEsVsTaTexInstrsPerType  HidxSqGsTaTexInstrsPerType  IidxSqPsTaTexInstrsPerType  JidxSqEsVsAluClauseInstrsPerType  KidxSqGsAluClauseInstrsPerType  LidxSqPsAluClauseInstrsPerType  MidxSqEsVsGsPsAluClauseInstrGroupsPerType  NidxSqEsVsAluClauseInstrGroupsPerType  OidxSqGsAluClauseInstrGroupsPerType  PidxSqPsAluClauseInstrGroupsPerType  QidxSqEsVsThreadLevelPerType  RidxSqGsThreadLevelPerType  SidxSqPsThreadLevelPerType  TidxSqEsVsGsPsThreadLevelPerType  UidxSqEsVsThreadsPerType  VidxSqGsThreadsPerType  WidxSqPsThreadsPerType  XidxSpiPctL0PiBusy  YidxSpiPctL1PiBusy  ZidxSxDb0Pixels  [idxSxDb1Pixels  \idxSxDb0StallCycles  ]idxSxDb1StallCycles  ^idxTaAlignerCycles  _idxTcpTcpTaStallCycles  `idxTcpTcpTagconflictStallCycles  aidxTcpFmtV8Pixels  bidxTcpFmtV16Pixels  cidxTcpFmtV32Pixels  didxTcpFmtV642Pixels  eidxTcpFmtV641Pixels  fidxTcpFmtV1284CyclePixels  gidxTcpFmtV1282CyclePixels  hidxTcpFmtV1281CyclePixels  iidxTcpTotalPixels  jidxTccReqsTcTfMiss  kidxDbOpPipeBusy  lidxDbDbScTileNoOps  midxDbDbScTilePixelRate  nidxDbDbScTileFastOps  oidxDbDbScTileHierKill  pidxDbDbScQuadTiles  qidxDbPreZSamplesPassingZ  ridxDbPreZSamplesFailingS  sidxDbPreZSamplesFailingZ  tidxDbPostZSamplesPassingZ  uidxDbPostZSamplesFailingS  vidxDbPostZSamplesFailingZ  widxDbScDbTileTiles  xidxDbDbCbLqiadStalls  yidxCbDrawnPixel  zidxCbCcMcWriteRequest2T_GX2PerfInfoU_GX2PerfInfo@@    """    ""     """  ""    "  "    9  ""=         A " ###  $   &""  (6"  *  ,, -  .  /0 , 2 . CreateStream OpenStream(CreateStorage0OpenStorage8CopyTo@MoveElementToHCommitPRevertXEnumElements`DestroyElement!hRenameElement%pSetElementTimes'xSetClass)SetStateBits+Stat1IStorage3operator= UUUUUUUUU*&45IStorageUIStorage@@B_GX2StreamOutContextU_GX2StreamOutContext@@ 7 j usize dataPtr uvertexStride DstreamOutData 8(ctxPtrB90_GX2StreamOutBufferU_GX2StreamOutBuffer@@/ ; p#6 *pVFTable spare =nameZ>"$_TypeDescriptor$_extraBytes_18U$_TypeDescriptor$_extraBytes_18@@  2tagTYPEATTRUtagTYPEATTR@@ A  B  C @D @Z  uG @H  uJ @Kuu @Mu" @Out @Qu @S6tagDISPPARAMSUtagDISPPARAMS@@ U "!V":u @W" @YI! @[" @]I @_ @a @c K  e fu @g B @i  @k  @m  o, p @q @rs , u@q:EGetTypeAttrF GetTypeCompI(GetFuncDescL0GetVarDescN8GetNamesP@GetRefTypeOfImplTypeRHGetImplTypeFlagsTPGetIDsOfNamesXXInvokeZ`GetDocumentation\hGetDllEntry^pGetRefTypeInfo`xAddressOfMemberbCreateInstancedGetMopshGetContainingTypeLibjReleaseTypeAttrlReleaseFuncDescnReleaseVarDesctITypeInfovoperator= UUUUUUUUUUU.&wxITypeInfoUITypeInfo@@  `" z{ @ z}@ z z9 z@@" z z*   z  ,  z z , z|(Seek~0SetSize8CopyTo@CommitHRevertPLockRegionXUnlockRegion`StathCloneIStreamoperator= UUUUUUU* &IStreamUIStream@@* uu32All @f32AllVGX2ViewportReg::T@GX2ViewportReg@@ ubanks ubankWidth ubankHeight u macroAspectRatio utileSplitBytes pipeConfig6_ADDR_TILEINFOU_ADDR_TILEINFO@@  * "cElems pElems6tagCABSTRBLOBUtagCABSTRBLOB@@. guidVersion pStream>tagVersionedStreamUtagVersionedStream@@* "cElems pElems6tagCACLIPDATAUtagCACLIPDATA@@   u u" u" &"!V":u   ,    , GetTypeInfoCount GetTypeInfo(GetIDsOfNames0InvokeIDispatchoperator=.&IIDispatchUIDispatch@@N usize ubase256b `pTileInfo ttileIndexb_ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUTU_ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT@@~#* arrayOfBaseClassDescriptorsF_s__RTTIBaseClassArrayU_s__RTTIBaseClassArray@@j_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT@@u#L _regs uLshaderSize PshaderPtr uXcopyShaderSize `copyShaderPtr ChshaderMode ulnumUniformBlocks =puniformBlocks uxnumUniforms ?uniformVars unumInitialValues AinitialValues u_numLoops _loopVars unumSamplers CsamplerVars uringItemsize hasStreamOut streamOutVertexStride DshaderProgram DcopyShaderProgram>_GX2GeometryShaderU_GX2GeometryShader@@f name Etype u arrayCount uoffset ublockIndex6_GX2UniformVarU_GX2UniformVar@@^ usize iformat knum m swap unumSamplesN_ELEM_GETEXPORTNORM_INPUTU_ELEM_GETEXPORTNORM_INPUT@@B_TP_CALLBACK_ENVIRONU_TP_CALLBACK_ENVIRON@@   2     ,     #   j     #     ,  / AddrObject~AddrObject operator newoperator deleteAddrMallocAddrFree SetupSysMemFuncsDebugPrint m_hClient m_debugPrintm_allocSysMemm_freeSysMem ClientAlloc ClientFreeoperator=__local_vftable_ctor_closure__vecDelDtor.&2AddrObjectVAddrObject@@ u u  forceLinearAligned optimalBankSwap no1DTiledMSAA noCubeMipSlicesPad sliceSizeComputing fillSizeFields useTileIndex useTileCaps reserved uvalue6 ADDR_CONFIG_FLAGSTADDR_CONFIG_FLAGS@@ B_ADDR_CREATE_OUTPUTU_ADDR_CREATE_OUTPUT@@       uADDR_CHIP_FAMILY_IVLDADDR_CHIP_FAMILY_R6XXADDR_CHIP_FAMILY_R7XXADDR_CHIP_FAMILY_R8XXADDR_CHIP_FAMILY_R9XXADDR_CHIP_FAMILY_SI2tAddrChipFamilyW4AddrChipFamily@@   t t ]  u t` Z_ADDR_COMPUTE_SURFACE_INFO_INPUTU_ADDR_COMPUTE_SURFACE_INFO_INPUT@@  ^_ADDR_COMPUTE_SURFACE_INFO_OUTPUTU_ADDR_COMPUTE_SURFACE_INFO_OUTPUT@@   n_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT@@   n_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT@@   n_ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUTU_ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT@@   n_ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT@@   Z_ADDR_COMPUTE_SLICESWIZZLE_INPUTU_ADDR_COMPUTE_SLICESWIZZLE_INPUT@@   ^_ADDR_COMPUTE_SLICESWIZZLE_OUTPUTU_ADDR_COMPUTE_SLICESWIZZLE_OUTPUT@@      b_ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUTU_ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT@@    f_ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUTU_ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT@@   b_ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUTU_ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT@@   f_ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUTU_ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT@@   V_ADDR_COMPUTE_FMASK_INFO_INPUTU_ADDR_COMPUTE_FMASK_INFO_INPUT@@   Z_ADDR_COMPUTE_FMASK_INFO_OUTPUTU_ADDR_COMPUTE_FMASK_INFO_OUTPUT@@    j_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT@@ " # j_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT@@ % $& 'j_ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUTU_ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT@@ ) * j_ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT@@ , +- .Z_ADDR_CONVERT_TILEINFOTOHW_INPUTU_ADDR_CONVERT_TILEINFOTOHW_INPUT@@ 0 1 ^_ADDR_CONVERT_TILEINFOTOHW_OUTPUTU_ADDR_CONVERT_TILEINFOTOHW_OUTPUT@@ 3 24 5V_ADDR_CONVERT_TILEINDEX_INPUTU_ADDR_CONVERT_TILEINDEX_INPUT@@ 7 8 V_ADDR_CONVERT_TILEINDEX_OUTPUTU_ADDR_CONVERT_TILEINDEX_OUTPUT@@ : 9; <N_ADDR_GET_TILEINDEX_INPUTU_ADDR_GET_TILEINDEX_INPUT@@ > ? N_ADDR_GET_TILEINDEX_OUTPUTU_ADDR_GET_TILEINDEX_OUTPUT@@ A @B C>uuuttt`uu#uu#u uEV_ADDR_COMPUTE_HTILE_INFO_INPUTU_ADDR_COMPUTE_HTILE_INFO_INPUT@@ G H Z_ADDR_COMPUTE_HTILE_INFO_OUTPUTU_ADDR_COMPUTE_HTILE_INFO_OUTPUT@@ J IK LFM6 uuut`uu#uuuu  OV_ADDR_COMPUTE_CMASKINFO_INPUTU_ADDR_COMPUTE_CMASKINFO_INPUT@@ Q R Z_ADDR_COMPUTE_CMASK_INFO_OUTPUTU_ADDR_COMPUTE_CMASK_INFO_OUTPUT@@ T SU VPWj_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT@@ Y Z j_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT@@ \ [] ^j_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUTU_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT@@ ` a j_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUTU_ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT@@ c bd ej_ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUTU_ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT@@ g h j_ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT@@ j ik lj_ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUTU_ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT@@ n o j_ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUTU_ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT@@ q pr sV_ELEM_FLT32TODEPTHPIXEL_INPUTU_ELEM_FLT32TODEPTHPIXEL_INPUT@@ u v V_ELEM_FLT32TODEPTHPIXEL_OUTPUTU_ELEM_FLT32TODEPTHPIXEL_OUTPUT@@ x wy zV_ELEM_FLT32TOCOLORPIXEL_INPUTU_ELEM_FLT32TOCOLORPIXEL_INPUT@@ | } V_ELEM_FLT32TOCOLORPIXEL_OUTPUTU_ELEM_FLT32TOCOLORPIXEL_OUTPUT@@  ~ N_ELEM_GETEXPORTNORM_INPUTU_ELEM_GETEXPORTNORM_INPUT@@     tuuu` 6 uuuuuuuttt`u # : #uuuuuttt`uuu  uuuu  t ,        uu`#u tu utt uuuutuu # t. ]uttuuuuuu u * uuuuuuuuu # . #uuuuuuuuu  B#uuuuu]uuuuuuut uuuu]u u6 uuu]uuuuuuut   ` u#u u"uuu]ut` uuu u  t  ] u tu u uu   t ,  uuu #uu`uu RBASE_ADDRLIBR600_ADDRLIBR800_ADDRLIB SI_ADDRLIB.tAddrLibClassW4AddrLibClass@@ /* ~AddrLib CreateDestroy GetAddrLibGetVersionGetAddrChipFamilyGetElemLibUseTileIndexHwlSetupTileCfgComputeSurfaceInfoComputeSurfaceAddrFromCoordComputeSurfaceCoordFromAddr ComputeSliceTileSwizzleExtractBankPipeSwizzleCombineBankPipeSwizzle!ComputeFmaskInfo(ComputeFmaskAddrFromCoord/ComputeFmaskCoordFromAddr6ConvertTileInfoToHW=ConvertTileIndexDGetTileIndexNComputeHtileInfoXComputeCmaskInfo_ComputeHtileAddrFromCoordfComputeCmaskAddrFromCoordmComputeHtileCoordFromAddrtComputeCmaskCoordFromAddr{Flt32ToDepthPixelFlt32ToColorPixelGetExportNormHwlComputeTileDataWidthAndHeightLinearHwlComputeXmaskAddrFromCoord HwlComputeXmaskCoordFromAddrComputeMipLevelComputeBCMipLevelAddrLib(HwlComputeSurfaceInfo0HwlComputeSurfaceAddrFromCoord8HwlComputeSurfaceCoordFromAddr @HwlComputeSliceTileSwizzleHHwlExtractBankPipeSwizzlePHwlCombineBankPipeSwizzleXHwlComputeHtileBaseAlign`HwlComputeHtileBpphHwlComputeHtileBytes!pHwlComputeFmaskInfo(xHwlComputeFmaskAddrFromCoord/HwlComputeFmaskCoordFromAddr6HwlConvertTileInfoToHWHwlComputeMipLevelHwlGetMaxCmaskBlockMaxDHwlGetTileIndexPadDimensionsComputeSurfaceAddrFromCoordLinearComputeSurfaceCoordFromAddrLinearComputeSurfaceCoordFromAddrMicroTiledComputePixelIndexWithinMicroTileHwlComputePixelCoordFromOffsetGetNumPipesComputePipeFromAddrComputePipeFromCoordHwlComputeXmaskCoordYFrom8PipeHwlInitGlobalParamsHwlConvertChipFamily ComputeSurfaceThickness IsMacroTiled IsLinear Bits2NumberGetSliceComputingFlagsGetFillSizeFieldsFlagsAdjustPitchAlignmentComputeQbStereoInfooperator=SetAddrChipFamilyComputeCmaskBaseAlignComputeCmaskBytesComputeTileDataWidthAndHeightComputeXmaskCoordYFromPipe m_class m_chipFamily u m_chipRevision u$m_version (m_pElemLib "0m_configFlags u4m_pipes u8m_banks u<m_pipeInterleaveBytes u@m_rowSize uDm_backendDisables__local_vftable_ctor_closure__vecDelDtor UUUUUUUUUUUUUU*`&HAddrLibVAddrLib@@"uuuu#)x#:FmtConversionRecUFmtConversionRec@@  #t Wut# W #tt u "dwSize "dwWidth "dwHeight " dwPitch Wformat "dwDataSize  pData6 ATI_TC_TextureUATI_TC_Texture@@6ATI_TC_OKATI_TC_ABORTEDATI_TC_ERR_INVALID_SOURCE_TEXTUREATI_TC_ERR_INVALID_DEST_TEXTUREATI_TC_ERR_UNSUPPORTED_SOURCE_FORMATATI_TC_ERR_UNSUPPORTED_DEST_FORMATATI_TC_ERR_SIZE_MISMATCHATI_TC_ERR_UNABLE_TO_INIT_CODECATI_TC_ERR_GENERIC. tATI_TC_ERRORW4ATI_TC_ERROR@@VATI_TC_Speed_NormalATI_TC_Speed_FastATI_TC_Speed_SuperFast.tATI_TC_SpeedW4ATI_TC_Speed@@ "dwSize tbUseChannelWeighting AfWeightingRed AfWeightingGreen AfWeightingBlue t bUseAdaptiveWeighting t$bDXT1UseAlpha  (nAlphaThreshold t,bDisableMultiThreading 0nCompressionSpeedF 8ATI_TC_CompressOptionsUATI_TC_CompressOptions@@ # pt @u@/ #format ur_msk ug_msk u b_msk ua_msk ur_shft ug_shft ub_shft u a_shft u$r_maxval u(g_maxval u,b_maxval u0a_maxval: 4FmtConversionRecUFmtConversionRec@@#t#:TC2FormatConvertUTC2FormatConvert@@#@R pformatStr #formatGX2 W formatATI thasAlpha:TC2FormatConvertUTC2FormatConvert@@@##0  CF_UnknownCF_8bitCF_Float16CF_Float32CF_CompressedCF_16bitCF_2101010CF_1555CF_4444 CF_32bit. tChannelFormatW4ChannelFormat@@ttttt&COLORUCOLOR@@   # rgba&COLORUCOLOR@@ # rgjGenerateMipLevel88::__l2::COLORUCOLOR@?1??GenerateMipLevel88@@YAXPEAUMipLevel@@00@Z@jGenerateMipLevel88::__l2::COLORUCOLOR@?1??GenerateMipLevel88@@YAXPEAUMipLevel@@00@Z@   p#    utPM4CAP_BLOCK_TYPE_COMMENTPM4CAP_BLOCK_TYPE_ISPM4CAP_BLOCK_TYPE_MSPM4CAP_BLOCK_TYPE_CSPM4CAP_BLOCK_TYPE_TERMINATORPM4CAP_BLOCK_TYPE_CSZPM4CAP_BLOCK_TYPE_NUMPM4CAP_BLOCK_TYPE_FORCE_DWORD6tPM4CAP_BLOCK_TYPEW4PM4CAP_BLOCK_TYPE@@F blockType udwBlockSize #qwTimeStampBPM4CAP_BLOCK_HEADERUPM4CAP_BLOCK_HEADER@@*u u   p####PM4CAP_IS_OPCODE_TIMESTAMP_INFOPM4CAP_IS_OPCODE_APP_INFOPM4CAP_IS_OPCODE_HW_INFOPM4CAP_IS_OPCODE_MODE_INFOPM4CAP_IS_OPCODE_PRESENT_INFOPM4CAP_IS_OPCODE_PRESENTPM4CAP_IS_OPCODE_RESERVED1PM4CAP_IS_OPCODE_RESERVED2PM4CAP_IS_OPCODE_CB_INFO PM4CAP_IS_OPCODE_VCOP PM4CAP_IS_OPCODE_PATCH_LIST PM4CAP_IS_OPCODE_INIT_REG PM4CAP_IS_OPCODE_NUMPM4CAP_IS_OPCODE_FORCE_DWORD6t PM4CAP_IS_OPCODEW4PM4CAP_IS_OPCODE@@J !opcode udwPadding #qwTimestampResolutionJ"PM4CAP_IS_TIMESTAMP_INFOUPM4CAP_IS_TIMESTAMP_INFO@@up$p# J !opcode &szAppName t$bFullScreenRendering>'(PM4CAP_IS_APP_INFOUPM4CAP_IS_APP_INFO@@z !opcode tbPCIE udwChipFamily u dwChipID udwChipRev udwPadding #qwVramInstalled u dwVramType u$dwVramBitWidth u(dwCoreClock u,dwMemClock #0qwMCFBBase #8qwMCFBSize #@qwMCNonLocBase #HqwMCNonLocSize #PqwMCInvSize>)XPM4CAP_IS_HW_INFOUPM4CAP_IS_HW_INFO@@b !opcode udwScreenWidth udwScreenHeight u dwScreenBPPB,PM4CAP_IS_MODE_INFOUPM4CAP_IS_MODE_INFO@@ . PM4CAP_TILE_LINEARPM4CAP_TILE_ZPM4CAP_TILE_MACROPM4CAP_TILE_MICROPM4CAP_TILE_1DTHIN1PM4CAP_TILE_MACROMICROPM4CAP_TILE_2BTHIN1PM4CAP_TILE_2DXTHICK PM4CAP_TILE_MICROSQRPM4CAP_TILE_MACROMICROSQRPM4CAP_TILE_INVALIDPM4CAP_TILE_LINEARGENERALPM4CAP_TILE_2DTHIN1PM4CAP_TILE_2DTHIN2PM4CAP_TILE_1DTHICKPM4CAP_TILE_2BTHIN2PM4CAP_TILE_3DTHIN1PM4CAP_TILE_3DTHICKPM4CAP_TILE_2DTHIN4PM4CAP_TILE_2DTHICKPM4CAP_TILE_3BTHIN1PM4CAP_TILE_3DXTHICKPM4CAP_TILE_3BTHICKPM4CAP_TILE_POWER_SAVEPM4CAP_TILE_2BTHIN4PM4CAP_TILE_2BTHICKPM4CAP_TILE_MAX PM4CAP_TILE_COUNT6t0PM4CAP_TILE_ENUMW4PM4CAP_TILE_ENUM@@*PM4CAP_MS_OPCODE_PRIMARY_INFOPM4CAP_MS_OPCODE_ALLOCPM4CAP_MS_OPCODE_FREEPM4CAP_MS_OPCODE_LOADPM4CAP_MS_OPCODE_CACHE_ALLOCPM4CAP_MS_OPCODE_CACHE_FREEPM4CAP_MS_OPCODE_LOADZPM4CAP_MS_OPCODE_NUMPM4CAP_MS_OPCODE_FORCE_DWORD6 t2PM4CAP_MS_OPCODEW4PM4CAP_MS_OPCODE@@ 3opcode udwPadding #qwHandle #qwMCAddress #qwSize u dwTileFlags u$dwPadding2R4(PM4CAP_MS_BLOCK_PRIMARY_INFOUPM4CAP_MS_BLOCK_PRIMARY_INFO@@ *u6uu8 # 3opcode udwPadding #qwHandle #qwMCAddress #qwSize u dwAlignment u$dwNHC u(dwNBC :,aHeapChoices :<aBankChoices uLdwFlagsF ;PPM4CAP_MS_BLOCK_ALLOCUPM4CAP_MS_BLOCK_ALLOC@@> 3opcode udwPadding #qwHandleB>PM4CAP_MS_BLOCK_FREEUPM4CAP_MS_BLOCK_FREE@@u@ 3opcode udwFlags #qwHandle #qwOffset #qwSize u dwTileFlags u$dwPitch u(dwHeight u,dwDepth u0dwBPP u4dwPadding2B B8PM4CAP_MS_BLOCK_LOADUPM4CAP_MS_BLOCK_LOAD@@~std::vector >V?$vector@IV?$STLtoGX2RAllocator@I@@@std@@ D E,uFuGF_PM4CMDINDIRECTBUFFERU_PM4CMDINDIRECTBUFFER@@ I uFKBPM4Parser::BaseParserVBaseParser@PM4Parser@@FPM4Parser::SearchParserVSearchParser@PM4Parser@@ N  N P, Q NOR NOST DNO8uuuu NOW NO N, ZNOR NO/MUSearchParserVoperator()XOnType3 um_SearchOpCode Dm_ResultsY~SearchParser[operator=\__vecDelDtor UUUF &]^8PM4Parser::SearchParserVSearchParser@PM4Parser@@std::_Vector_val >V?$_Vector_val@IV?$STLtoGX2RAllocator@I@@@std@@RSTLtoGX2RAllocatorV?$STLtoGX2RAllocator@I@@ x  u, x,std::_Vector_iterator >V?$_Vector_iterator@IV?$STLtoGX2RAllocator@I@@@std@@std::_Vector_const_iterator >V?$_Vector_const_iterator@IV?$STLtoGX2RAllocator@I@@@std@@std::reverse_iterator > >V?$reverse_iterator@V?$_Vector_iterator@IV?$STLtoGX2RAllocator@I@@@std@@@std@@std::reverse_iterator > >V?$reverse_iterator@V?$_Vector_const_iterator@IV?$STLtoGX2RAllocator@I@@@std@@@std@@ D  F Dij a l,#dm Din#d Dip Di m Dis Di2koqrtu Dip Di D, yDij Di E  #D| fD| eDi~ f eD| hD| gDi Di{ 0D| aD| cDi dD| dD| cDi d Dif#d Difd eDiuu Diff eDi eDi y Di 0Diu#d uDi D D| Di/`D_Myt`_Mybasea_Allocaallocator_type#size_type_Diftdifference_typeu_Tptrb_Ctptrupointerbconst_pointerc_Reftcreferencedconst_referenceuvalue_typeeiteratorfconst_iteratorgreverse_iteratorhconst_reverse_iteratorvvector >w_Construct_nx~vector >zoperator={reserve}capacitybeginend_Make_iterrbeginrendresize}size}max_sizeemptyget_allocatoratoperator[]frontbackpush_backxpop_backwassigninsert_Reverseerasexclearswapw_Assign_n_Buy_Destroyx_Tidy_Insert_n_Ufill _Xlen _Xran _Xinvarg_Orphan_range u_Myfirst u_Mylast u _Myend__vecDelDtor~N6(std::vector >V?$vector@IV?$STLtoGX2RAllocator@I@@@std@@BPM4CAP_PIXEL_FORMATUPM4CAP_PIXEL_FORMAT@@ !opcode udwX udwY u dwPadding #qwMCAddr udwWidth udwHeight u dwWidthAlgn u$dwHeightAlgn u(dwPitch u,dwFlags 0pfF PPM4CAP_IS_PRESENT_INFOUPM4CAP_IS_PRESENT_INFO@@~IT_NOPIT_INDIRECT_BUFFER_ENDIT_OCCLUSION_QUERY IT_SET_PREDICATION!IT_REG_RMW"IT_COND_EXEC#IT_PRED_EXEC&IT_INDEX_BASE'IT_DRAW_INDEX_2(IT_CONTEXT_CONTROL)IT_DRAW_INDEX_OFFSET)IT_DRAW_INDEX_IMMD_BE*IT_INDEX_TYPE+IT_DRAW_INDEX-IT_DRAW_INDEX_AUTO.IT_DRAW_INDEX_IMMD/IT_NUM_INSTANCES0IT_DRAW_INDEX_MULTI_AUTO2IT_INDIRECT_BUFFER_PRIV4IT_STRMOUT_BUFFER_UPDATE5IT_DRAW_INDEX_OFFSET_26IT_DRAW_INDEX_MULTI_ELEMENT8IT_INDIRECT_BUFFER_MP9IT_MEM_SEMAPHORE:IT_MPEG_INDEX;IT_COPY_DW<IT_WAIT_REG_MEM=IT_MEM_WRITE>IT_PER_FRAME?IT_INDIRECT_BUFFERAIT_CP_DMABIT_PFP_SYNC_MECIT_SURFACE_SYNCDIT_ME_INITIALIZEEIT_COND_WRITEFIT_EVENT_WRITEGIT_EVENT_WRITE_EOPHIT_LOAD_SURFACE_PROBEIIT_SURFACE_PROBEJIT_PREAMBLE_CNTLKIT_RB_OFFSETRIT_GFX_CNTX_UPDATESIT_BLK_CNTX_UPDATETIT_IB_OFFSETUIT_INCR_UPDT_STATEVIT_INCR_UPDT_CONSTWIT_ONE_REG_WRITE`IT_LOAD_CONFIG_REGaIT_LOAD_CONTEXT_REGbIT_LOAD_ALU_CONSTcIT_LOAD_BOOL_CONSTdIT_LOAD_LOOP_CONSTeIT_LOAD_RESOURCEfIT_LOAD_SAMPLERgIT_LOAD_CTL_CONSThIT_SET_CONFIG_REGiIT_SET_CONTEXT_REGjIT_SET_ALU_CONSTkIT_SET_BOOL_CONSTlIT_SET_LOOP_CONSTmIT_SET_RESOURCEnIT_SET_SAMPLERoIT_SET_CTL_CONSTpIT_SET_RESOURCE_OFFSETrIT_STRMOUT_BASE_UPDATEsIT_SURFACE_BASE_UPDATEtIT_SET_ALL_CONTEXTSxIT_INDIRECT_BUFFER_BASEyIT_EXECUTE_IB2{IT_PFP_REG_WR|IT_FORWARD_HEADERIT_SET_SCISSORSIT_2D_ENDIAN_MODE$IT_START_3D_CMDBUF%IT_START_2D_CMDBUF,IT_LOAD_PALETTEIT_PAINTIT_BITBLTIT_HOSTDATA_BLTIT_POLYLINEIT_POLYSCANLINESIT_NEXTCHARIT_PAINT_MULTIIT_BITBLT_MULTIIT_TRANS_BITBLTIT_PLY_NEXTSCANIT_DRAW_2D_DIRTY_AREA.WtIT_OpCodeTypeW4IT_OpCodeType@@GX2_PROFILE_MODE_NONEGX2_PROFILE_MODE_INFINITELY_FAST_HARDWAREGX2_PROFILE_MODE_WIREFRAMEGX2_PROFILE_MODE_DISABLE_ALPHABLENDGX2_PROFILE_MODE_DISABLE_COLORWRITESGX2_PROFILE_MODE_DISABLE_COLOR GX2_PROFILE_MODE_MIN_VERTEX_SHADER@GX2_PROFILE_MODE_MIN_GEOMETRY_SHADERGX2_PROFILE_MODE_MIN_PIXEL_SHADERGX2_PROFILE_MODE_MIN_VERTEX_FETCHGX2_PROFILE_MODE_MIN_TEXTURE_FETCHGX2_PROFILE_MODE_DISABLE_ZGX2_PROFILE_MODE_DISABLE_ZWRITESGX2_PROFILE_MODE_DISABLE_STENCIL GX2_PROFILE_MODE_DISABLE_TRILINEAR@GX2_PROFILE_MODE_DISABLE_ANISOGX2_PROFILE_MODE_DISABLE_COLOR_CLEARSGX2_PROFILE_MODE_DISABLE_Z_CLEARSGX2_PROFILE_MODE_DISABLE_STENCIL_CLEARSGX2_PROFILE_MODE_DISABLE_EARLY_ZGX2_PROFILE_MODE_FIRSTGX2_PROFILE_MODE_LAST2t_GX2ProfileModeW4_GX2ProfileMode@@f  ch  fh ustate  buf u bufpos u$mutex:(pm4capio_privateUpm4capio_private@@:pm4capio_surfaceUpm4capio_surface@@#V_GX2_DEBUG_TAG_API_SET_CONTEXT_STATE_GX2_DEBUG_TAG_API_SET_DEFAULT_STATE_GX2_DEBUG_TAG_API_CLEAR_COLOR_GX2_DEBUG_TAG_API_CLEAR_DEPTH_STENCIL_EX_GX2_DEBUG_TAG_API_CLEAR_BUFFERS_EX_GX2_DEBUG_TAG_API_COPY_SURFACE_GX2_DEBUG_TAG_API_COPY_SURFACE_EX_GX2_DEBUG_TAG_API_RESOLVE_AA_COLOR_BUFFER_GX2_DEBUG_TAG_API_EXPAND_AA_COLOR_BUFFER _GX2_DEBUG_TAG_API_EXPAND_DEPTH_BUFFER _GX2_DEBUG_TAG_API_CONVERT_DEPTH_BUFFER_TO_TEXTURE_SURFACE _GX2_DEBUG_TAG_API_COPY_COLOR_BUFFER_TO_SCAN_BUFFER _GX2_DEBUG_TAG_API_SWAP_SCAN_BUFFERS _GX2_DEBUG_TAG_API_PERF_PASS_START_GX2_DEBUG_TAG_API_PERF_PASS_END_GX2_DEBUG_TAG_API_PERF_TAG_START_GX2_DEBUG_TAG_API_PERF_TAG_END_GX2_DEBUG_TAG_API_FIRST_GX2_DEBUG_TAG_API_LASTJt_GX2DebugTagAPIBracketTypeW4_GX2DebugTagAPIBracketType@@6_PM4_TYPE3_CONFIG_REG_PM4_TYPE3_CONTEXT_REG_PM4_TYPE3_ALU_CONST_PM4_TYPE3_RESOURCE_PM4_TYPE3_SAMPLER_PM4_TYPE3_CTL_CONST_PM4_TYPE3_SPARSE_SAMPLER_PM4_TYPE3_LOOP_CONST_PM4_TYPE3_BOOL_CONST_PM4_TYPE3_FIRST_PM4_TYPE3_LAST6 t_PM4RegisterTypeW4_PM4RegisterType@@/uu  /  VGPUDB_CAPTURE_IDLEGPUDB_CAPTURE_RUNNINGGPUDB_CAPTURE_ERROR:teGPUDBCaptureStatusW4eGPUDBCaptureStatus@@    u        *uu  6  *u   / 2_TCLSubmitFlagsT_TCLSubmitFlags@@uu#u  6 uVersion pShutdown pSetAllocator pCaptureStart  pCaptureEnd (pCaptureGetStatus 0pCaptureAllocInfo 8pCaptureFreeInfo @pCaptureLoadInfo HpCaptureDisplayInfo PpCapturePresent XpSubmitToRingF `_GPUDBCaptureInterfaceU_GPUDBCaptureInterface@@Jdenorm_indeterminatedenorm_absentdenorm_presentBtstd::float_denorm_styleW4float_denorm_style@std@@round_indeterminateround_toward_zeroround_to_nearestround_toward_infinityround_toward_neg_infinityBtstd::float_round_styleW4float_round_style@std@@:_GX2PerCoreDataU_GX2PerCoreData@@#2__GX2CBMgmtU__GX2CBMgmt@@:_GX2ColorBufferU_GX2ColorBuffer@@#p##@###>_DisplayQueueEntryU_DisplayQueueEntry@@#GX2_DEBUG_MODE_NONEGX2_DEBUG_MODE_FLUSH_PER_DRAWGX2_DEBUG_MODE_DONE_PER_FLUSHGX2_DEBUG_MODE_FIRSTGX2_DEBUG_MODE_LAST.t_GX2DebugModeW4_GX2DebugMode@@6_GXVerifyDataU_GXVerifyData@@:_GXCallbackDataU_GXCallbackData@@#P u6 core uinitialized umainCoreId pAddrH uasicType hMEM1 variableSizeCB mainCB #@timeStamp HuseDefaultHeapCB PscanBuffer scanBufferPtr @scanBufferCnt HscanBufferIdx PscanBufferPrv XscanMode `scanEnabled hstereoScan pcopySrc PcopyDst u0 copyFlg u4 vsyncCount u8 lastFlipVC @ surfQ u@ swapCount uD swapCount50 uH flipCount50 uL swapInterval uP waitVsyncQueue uT waitFlipQueue X lastFlipTime ` lastVsyncTime uh lastScanMode l pullDownMode p scaleDownMode t debugMode ux uHDPEA  verifyData  debugCaptureFilename u debugCaptureNumFrames u debugCapturePrevSwapInterval u waitGpuTimeoutMilliSec u HangState u HangResponse u HangResetTimeout u HangResetCount u interruptCountLimit  startCpuCycle # startGpuCycle u GpuCycles u CpuCycles  pUbmClientHandle  pUbmVidMem u ubmFlags u numRenderBackend u GpuSysClock u numEsPerGS u numQpPerSimd  callbackData @ allocFunc H freeFunc uP procSDKVer T cbReadPtr X pad t gpuSwapCount x pad1  flipCount  pad22D _GX2ContextU_GX2Context@@* uoffset unumRegsB_PM4SHADOW_REG_RANGEU_PM4SHADOW_REG_RANGE@@fVGT_DMA_BASE::U@VGT_DMA_BASE@@ bitfields bits uu32All ti32All @f32All*VGT_DMA_BASETVGT_DMA_BASE@@>_s__CatchableTypeU_s__CatchableType@@   #> tnCatchableTypes arrayOfCatchableTypesF_s__CatchableTypeArrayU_s__CatchableTypeArray@@fVGT_DMA_SIZE::U@VGT_DMA_SIZE@@ bitfields bits uu32All ti32All @f32All*VGT_DMA_SIZETVGT_DMA_SIZE@@ ONUM_INDICESfVGT_DMA_SIZE::U@VGT_DMA_SIZE@@nSEMA_ADDRESS_HIGH::U@SEMA_ADDRESS_HIGH@@ bitfields bits uu32All ti32All @f32All6SEMA_ADDRESS_HIGHTSEMA_ADDRESS_HIGH@@" addr usize:pm4capio_surfaceUpm4capio_surface@@6PM4_TYPE_3_HEADERTPM4_TYPE_3_HEADER@@N header uaddrLo uaddrHi u sizeF_PM4CMDINDIRECTBUFFERU_PM4CMDINDIRECTBUFFER@@    &  cbf userData: _GXCallbackDataU_GXCallbackData@@GX2_VERIFY_WARNING_NONEGX2_VERIFY_WARNING_SEVEREGX2_VERIFY_WARNING_MEDIUMGX2_VERIFY_WARNING_ALL2tGX2VerifyLevelW4GX2VerifyLevel@@u  Nstd::_Container_base_secureV_Container_base_secure@std@@    ,    ,       ! !>std::_Iterator_baseV_Iterator_base@std@@ $  /_Container_base_secureoperator=~_Container_base_secure _Orphan_all"_Swap_all#_Swap_aux %_Myfirstiter&__vecDelDtorN &'std::_Container_base_secureV_Container_base_secure@std@@  std::basic_streambuf >V?$basic_streambuf@_WU?$char_traits@_W@std@@@std@@ * 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_Widen_s%narrow'_Narrow_s (_Id_funcid0ctype 1_Getcat2~ctype3_Init4do_isdo_scan_is do_scan_not5do_tolower6do_toupper_Dowiden7do_widen X_Do_widen_s$_Donarrow8do_narrow'p_Do_narrow_s _Ctype (_Cvt:operator=2__dflt_ctor_closure2__local_vftable_ctor_closure;__vecDelDtorB16<0std::ctypeV?$ctype@G@std@@:std::range_errorVrange_error@std@@ >  > @, A >?B >?wCD >? >, G>?B >?/jErange_errorF~range_errorHoperator=I__vecDelDtor:&JHstd::range_errorVrange_error@std@@   pL pLnMN Ll L LQRnstd::_DebugHeapAllocator::rebindU?$rebind@D@?$_DebugHeapAllocator@D@std@@n^OallocatePdeallocateS_DebugHeapAllocatorT?$rebind@DRUstd::_DebugHeapAllocatorV?$_DebugHeapAllocator@D@std@@othernWstd::_DebugHeapAllocator::rebindU?$rebind@D@?$_DebugHeapAllocator@D@std@@Vstd::_Undefined_inner_type_tagU_Undefined_inner_type_tag@std@@      \, ] [^   `,at [b a [d ["_cef , h[^ [ \  k [/ Zgexceptionioperator=j~exceptionlwhat _m_what t_m_doFreej__local_vftable_ctor_closurem__vecDelDtor6 &nstd::exceptionVexception@std@@vstd::basic_ios >V?$basic_ios@_WU?$char_traits@_W@std@@@std@@~std::basic_ostream >V?$basic_ostream@_WU?$char_traits@_W@std@@@std@@ p  p s, t pru pr E prxvwy pr pr/ prn|} p, pru q   pr s  p Eprx Ep HprK qprU qp pp qpE0 pr pr/Vp_Mytq_Myos*_Mysbr_Ctypeqchar_type8traits_type!int_type:pos_typeoff_typezbasic_ios >{~basic_ios >~clear~setstatecopyfmttierdbufimbuefillnarrowwideninitoperator= EH_Mystrbuf P_Tiestr qX_Fillch{__local_vftable_ctor_closure__vecDelDtorv#62`std::basic_ios >V?$basic_ios@_WU?$char_traits@_W@std@@@std@@*_CollvecU_Collvec@@2std::_TimevecV_Timevec@std@@  t v        ,     wt  "     t    {      t2std::_LockitV_Lockit@std@@  /^_Collvec_Ctypevec_Cvtvec_Timevec_Locinfo_ctor _Locinfo_dtor _Locinfo_Addcats_Locinfo~_Locinfo_Addcats_Getname_Getcoll_Getctype_Getcvt_Getlconv_Gettnames_Getdays_Getmonths_Getfalse_Gettrue_Getdateorder _Lock t_Days t8_Months th_Oldlocname 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q"# qU qW q q q() :q q q/pq_Mytp_Myios*_Mysb_Iter_Nput basic_ostream > ~basic_ostream >!int_type:pos_typeoff_type _Sentry_base sentry opfxosfx_Osfx$operator<<%put&write'flush*seekp+tellp,operator=-__vecDelDtor~+6.hstd::basic_ostream >V?$basic_ostream@_WU?$char_traits@_W@std@@@std@@      1, 2  03  045  0 1  0 8  , : 03  0/ 6sentry7~sentry9operator bool;operator= 0_Ok<__vecDelDtorn=std::basic_ostream >::sentryVsentry@?$basic_ostream@_WU?$char_traits@_W@std@@@std@@     ?  ?  ?/^@_Sentry_baseA~_Sentry_base _MyostrB__vecDelDtor Cstd::basic_ostream >::_Sentry_baseV_Sentry_base@?$basic_ostream@_WU?$char_traits@_W@std@@@std@@std::_String_iterator,std::allocator >V?$_String_iterator@DU?$char_traits@D@std@@V?$allocator@D@2@@std@@std::reverse_iterator,std::allocator > >V?$reverse_iterator@V?$_String_iterator@DU?$char_traits@D@std@@V?$allocator@D@2@@std@@@std@@std::reverse_iterator,std::allocator > >V?$reverse_iterator@V?$_String_const_iterator@DU?$char_traits@D@std@@V?$allocator@D@2@@std@@@std@@ t  tHw tHJ tH#pg tHM tHg tHP tH#g tHS tH v##g tHVv## tHX tHh tHjIKLNOQRTUWYZ[ tH t, ^tH ^tH ^tHw_`a ^tHJ ^tH ^tH ^tH  ^tHX:cde`fga tHi tHk#p tHmp EtHo  EtHq ^tH ^tH ^tH#v## ^tHv#v ^tHxRjlnprstuwy EtHJ ^tH{r| ^tH~ ^tH#p ^tH ^tH# ^tHv ^tH ^tH( ^tH* ^tH,##v## ^tH##v ^tHZ u  t EtH Gt FtH t ]tH tH t #t tH tH 0t #tD #tF ^ tH #tJ #t  #tMv# #t" tt tt, tt* tt tt tt ttw2 ^tt[std::basic_string,std::allocator >::W4@?$basic_string@DU?$char_traits@D@std@@V?$allocator@D@2@@std@@t]std::basic_string,std::allocator >::W4@?$basic_string@DU?$char_traits@D@std@@V?$allocator@D@2@@std@@ tH tH 0tHa 0tH #tJ tHestd::basic_string,std::allocator >::_BxtyT_Bxty@?$basic_string@DU?$char_traits@D@std@@V?$allocator@D@2@@std@@ ptH tH/Mt_MytM_Mybase^_Alloc#size_type_Diftdifference_typep_Tptr_Ctptrppointerconst_pointer]_Reft]referenceconst_referencepvalue_typeEiteratorconst_iteratorFreverse_iteratorGconst_reverse_iterator \basic_string,std::allocator >]~basic_string,std::allocator >traits_type^allocator_typenposboperator=boperator+=happendhassign zinsert}erase]clear replacebeginendrbeginrendatoperator[]push_backc_strdatalengthsizemax_sizeresizecapacityreserveemptycopy_Copy_sswapfindrfindfind_first_offind_last_offind_first_not_offind_last_not_ofsubstrcompareget_allocator_Chassign_Copy_Eos_Grow_Inside _Pdif_Tidy_Bxty _Bx_Myptr # _Mysize #(_Myres__vecDelDtor60std::basic_string,std::allocator >V?$basic_string@DU?$char_traits@D@std@@V?$allocator@D@2@@std@@>std::_LocbaseV?$_Locbase@H@std@@Bstd::locale::_LocimpV_Locimp@locale@std@@ H, H   ## H    HJt Ht HJJt H HK H. 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level6_GXVerifyDataU_GXVerifyData@@ pdecimal_point pthousands_sep pgrouping pint_curr_symbol p currency_symbol p(mon_decimal_point p0mon_thousands_sep p8mon_grouping p@positive_sign pHnegative_sign pPint_frac_digits pQfrac_digits pRp_cs_precedes pSp_sep_by_space pTn_cs_precedes pUn_sep_by_space pVp_sign_posn pWn_sign_posn&XlconvUlconv@@jCB_COLOR0_SIZE::U@CB_COLOR0_SIZE@@ bitfields bits uu32All ti32All @f32All. CB_COLOR0_SIZETCB_COLOR0_SIZE@@ u u :  PITCH_TILE_MAX  SLICE_TILE_MAXj CB_COLOR0_SIZE::U@CB_COLOR0_SIZE@@ ucopyFlg usurfAddr0a usurfAddr0b u surfAddr1a usurfAddr1b time> _DisplayQueueEntryU_DisplayQueueEntry@@fADDRESS_HIGH::U@ADDRESS_HIGH@@  bitfields  bits uu32All ti32All @f32All* ADDRESS_HIGHTADDRESS_HIGH@@p#46 *pVFTable spare  nameZ D$_TypeDescriptor$_extraBytes_52U$_TypeDescriptor$_extraBytes_52@@* header uoffset6 _PM4CMDSETDATAU_PM4CMDSETDATA@@~#*  arrayOfBaseClassDescriptorsf $_s__RTTIBaseClassArray$_extraBytes_24U$_s__RTTIBaseClassArray$_extraBytes_24@@f_TCLSubmitFlags::U@_TCLSubmitFlags@@F  sFlags uulAll2 _TCLSubmitFlagsT_TCLSubmitFlags@@rDB_PRELOAD_CONTROL::U@DB_PRELOAD_CONTROL@@  bitfields  bits uu32All ti32All @f32All6 DB_PRELOAD_CONTROLTDB_PRELOAD_CONTROL@@ u u uJ START_X  START_Y  MAX_X  MAX_Yr DB_PRELOAD_CONTROL::U@DB_PRELOAD_CONTROL@@p#6 *pVFTable spare  nameZ +$_TypeDescriptor$_extraBytes_27U$_TypeDescriptor$_extraBytes_27@@zSQ_TEX_RESOURCE_WORD4_0::U@SQ_TEX_RESOURCE_WORD4_0@@! ! bitfields ! bits uu32All ti32All @f32AllB" SQ_TEX_RESOURCE_WORD4_0TSQ_TEX_RESOURCE_WORD4_0@@ u u u u u u u u u uF $ FORMAT_COMP_X FORMAT_COMP_Y FORMAT_COMP_Z % FORMAT_COMP_W & NUM_FORMAT_ALL SRF_MODE_ALL FORCE_DEGAMMA ' ENDIAN_SWAP ( REQUEST_SIZE ) DST_SEL_X * DST_SEL_Y + DST_SEL_Z , DST_SEL_W - BASE_LEVELz. SQ_TEX_RESOURCE_WORD4_0::U@SQ_TEX_RESOURCE_WORD4_0@@#> tnCatchableTypes 0 arrayOfCatchableTypesf1 $_s__CatchableTypeArray$_extraBytes_16U$_s__CatchableTypeArray$_extraBytes_16@@fDB_DEPTH_INFO::U@DB_DEPTH_INFO@@3 3 bitfields 3 bits uu32All ti32All @f32All.4 DB_DEPTH_INFOTDB_DEPTH_INFO@@ u u u u u 6 FORMAT READ_SIZE 7 ARRAY_MODE 8 TILE_SURFACE_ENABLE 9 TILE_COMPACT : ZRANGE_PRECISIONf; DB_DEPTH_INFO::U@DB_DEPTH_INFO@@fDB_DEPTH_VIEW::U@DB_DEPTH_VIEW@@= = bitfields = bits uu32All ti32All @f32All.> DB_DEPTH_VIEWTDB_DEPTH_VIEW@@ u u . @ SLICE_START A SLICE_MAXfB DB_DEPTH_VIEW::U@DB_DEPTH_VIEW@@J "_Hand u_Page _Table t_Delfl.D _CtypevecU_Ctypevec@@p#6 *pVFTable spare F nameZG ($_TypeDescriptor$_extraBytes_24U$_TypeDescriptor$_extraBytes_24@@ u n bWaitForIdleAfterSubmit bUseDRMDMARing bSubmitRetiredTimestamp bAvoidCacheFlushOnRetiredTS bForceCacheInvalidateOnRetiredTS bUseNonPrivledgedMode bAutoDCFlush bFreeOnTS bCheckSpaceFirst bInvalidateSrcCaches bNoInterrupt I reservedf J _TCLSubmitFlags::U@_TCLSubmitFlags@@2 cbData @pUbmDeviceHandle:L H_GX2PerCoreDataU_GX2PerCoreData@@p#6 *pVFTable spare N nameZO *$_TypeDescriptor$_extraBytes_26U$_TypeDescriptor$_extraBytes_26@@fCP_COHER_SIZE::U@CP_COHER_SIZE@@Q Q bitfields Q bits uu32All ti32All @f32All.R CP_COHER_SIZETCP_COHER_SIZE@@ OCOHER_SIZE_256BfT CP_COHER_SIZE::U@CP_COHER_SIZE@@fCP_COHER_BASE::U@CP_COHER_BASE@@V V bitfields V bits uu32All ti32All @f32All.W CP_COHER_BASETCP_COHER_BASE@@ OCOHER_BASE_256BfY CP_COHER_BASE::U@CP_COHER_BASE@@!#R [ _Word @_Float A_Double A_Long_double"\ _DconstT_Dconst@@" "_Hand u_Page*^ _CollvecU_Collvec@@v uproperties pType  thisDisplacement tsizeOrOffset copyFunction>` $_s__CatchableTypeU_s__CatchableType@@nDB_PREFETCH_LIMIT::U@DB_PREFETCH_LIMIT@@b b bitfields b bits uu32All ti32All @f32All6c DB_PREFETCH_LIMITTDB_PREFETCH_LIMIT@@"  DEPTH_HEIGHT_TILE_MAXne DB_PREFETCH_LIMIT::U@DB_PREFETCH_LIMIT@@D1_BLANKD1_MISCD2_BLANKD2_MISCD1_CRTC_V_UPDATE D1_PAGE_FLIP D2_CRTC_V_UPDATE D2_PAGE_FLIPrUVD_TRAPsUVD_IDLEtUVD_BUSYuUVD_GPFvUVD_CTX_DATA_ERRwUVD_START_CMDxUVD_STOP_CMDyUVD_SOFT_RESETzUVD_NEW_RL{UVD_FIRM_VALID|UVD_SYS_MSG}UVD_DEBUG~UVD_SEM_WAIT_INCOMPLETEUVD_SEM_WAIT_FAILUVD_SEM_SIG_INCOMPLETEUVD_SYSCMDUVD_IDCT_ERRUVD_MPEG2_DONEUVD_SEM_ADVUVD_MPEG2_ERRUVD_VM_FAULTUVD_DRV_TO_FIRMUVD_FIRM_TO_DRVCP_INT_RBCP_INT_IB1CP_INT_IB2CP_DMA_EOLCP_PM4_PKT_RSV_BITS_ERRORCP_EOPCP_SCRATCH_REG_COMPARECP_BAD_OPCODECP_PRIV_REG_FAULTCP_PRIV_INSTR_FAULTCP_SEM_WAIT_FAILCP_CTX_EMPTYCP_CTX_BUSYCP_ENABLE_NEW_RLCP_DISABLE_NEW_RLCP_SEM_ADVCP_WAIT_TIMEOUTCP_SURF_PROBE_FAULTCP_PREEMPT_ACKCP_GPFRLC_NEW_RLSQ_ADV_FAULTDRMDMA_TRAPDRMDMA_GPFDRMDMA_SEM_WAIT_FAILDRMDMA_NEW_RLDRMDMA_CTX_EMPTYGRBM_READ_TIMEOUTGRBM_GUI_IDLECG_SCLK_DIS_REQCG_CTX_SW_TRIGCG_PERF_MONGPU7_INT_COUNTINT_ENTRY_COUNTIHSOURCE_LAST*Btg IHSOURCEtagW4IHSOURCEtag@@p#6 *pVFTable spare i nameZj .$_TypeDescriptor$_extraBytes_30U$_TypeDescriptor$_extraBytes_30@@ a  al s al m n  al  bal  ual q r  ual nu# al u l  #aw ud al y  al  0al s al /rSTLtoGX2RAllocator::rebindU?$rebind@I@?$STLtoGX2RAllocator@I@@uvalue_typeupointerbconst_pointercreferencedconst_reference#size_typedifference_typeo STLtoGX2RAllocatorp ~STLtoGX2RAllocators addresst allocatev deallocatex max_sizez construct{ destroy| operator==| operator!=} __vecDelDtor~ ?$rebind@IR STLtoGX2RAllocatorV?$STLtoGX2RAllocator@I@@aotherr STLtoGX2RAllocator::rebindU?$rebind@I@?$STLtoGX2RAllocator@I@@p#6 *pVFTable spare  nameZ #$_TypeDescriptor$_extraBytes_19U$_TypeDescriptor$_extraBytes_19@@ t  F_s__CatchableTypeArrayU_s__CatchableTypeArray@@    n uattributes pmfnUnwind  pForwardCompat  pCatchableTypeArray6 _s__ThrowInfoU_s__ThrowInfo@@6MEM_SPACE_FUNCTIONTMEM_SPACE_FUNCTION@@*ADDRESS_HIGHTADDRESS_HIGH@@ header  spaceAndFunction uaddrLo  addrHi ureference umask upollInterval> _PM4CMDWAITREGMEMU_PM4CMDWAITREGMEM@@jCB_COLOR0_VIEW::U@CB_COLOR0_VIEW@@  bitfields  bits uu32All ti32All @f32All. CB_COLOR0_VIEWTCB_COLOR0_VIEW@@jB CB_COLOR0_VIEW::U@CB_COLOR0_VIEW@@rVGT_DRAW_INITIATOR::U@VGT_DRAW_INITIATOR@@  bitfields  bits uu32All ti32All @f32All6 VGT_DRAW_INITIATORTVGT_DRAW_INITIATOR@@z $ SOURCE_SELECT MAJOR_MODE SPRITE_EN_R6XX NOT_EOP USE_OPAQUEr VGT_DRAW_INITIATOR::U@VGT_DRAW_INITIATOR@@__vc_attributes::helper_attributes::source_annotation_attributeAttributeUsource_annotation_attributeAttribute@helper_attributes@__vc_attributes@@        yAllyAssemblyyClassyConstructoryDelegateyEnumyEventyFieldyGenericParameteryInterfaceyMethodyModuleyParameteryPropertyyReturnValueyStruct source_annotation_attributeAttribute tValidOn 0AllowMultiple __vc_attributes::helper_attributes::source_annotation_attributeAttributeUsource_annotation_attributeAttribute@helper_attributes@__vc_attributes@@__vc_attributes::helper_attributes::repeatableAttributeUrepeatableAttribute@helper_attributes@__vc_attributes@@     repeatableAttribute __vc_attributes::helper_attributes::repeatableAttributeUrepeatableAttribute@helper_attributes@__vc_attributes@@Zvc_attributes::PostRangeAttributeUPostRangeAttribute@vc_attributes@@    V PostRangeAttribute uDeref MinVal MaxValZ vc_attributes::PostRangeAttributeUPostRangeAttribute@vc_attributes@@Zvc_attributes::PreBoundAttributeUPreBoundAttribute@vc_attributes@@    . PreBoundAttribute uDerefZ vc_attributes::PreBoundAttributeUPreBoundAttribute@vc_attributes@@bvc_attributes::InvalidCheckAttributeUInvalidCheckAttribute@vc_attributes@@    2 InvalidCheckAttribute Valueb vc_attributes::InvalidCheckAttributeUInvalidCheckAttribute@vc_attributes@@Vvc_attributes::SuccessAttributeUSuccessAttribute@vc_attributes@@    2 SuccessAttribute ConditionV vc_attributes::SuccessAttributeUSuccessAttribute@vc_attributes@@Zvc_attributes::PostBoundAttributeUPostBoundAttribute@vc_attributes@@    . PostBoundAttribute uDerefZ vc_attributes::PostBoundAttributeUPostBoundAttribute@vc_attributes@@Zvc_attributes::PreRangeAttributeUPreRangeAttribute@vc_attributes@@    V PreRangeAttribute uDeref MinVal MaxValZ vc_attributes::PreRangeAttributeUPreRangeAttribute@vc_attributes@@p#6 *pVFTable spare  nameZ &$_TypeDescriptor$_extraBytes_22U$_TypeDescriptor$_extraBytes_22@@ udwSize udwFlags udwFourCC u dwRGBBitCount udwRBitMask udwGBitMask udwBBitMask udwRGBAlphaBitMaskB PM4CAP_PIXEL_FORMATUPM4CAP_PIXEL_FORMAT@@fDB_DEPTH_SIZE::U@DB_DEPTH_SIZE@@  bitfields  bits uu32All ti32All @f32All. DB_DEPTH_SIZETDB_DEPTH_SIZE@@f DB_DEPTH_SIZE::U@DB_DEPTH_SIZE@@v header ustartAddrLo ustartAddrHi u queryAddrLo uqueryAddrHiF _PM4CMDOCCLUSIONQUERYU_PM4CMDOCCLUSIONQUERY@@    wgPtr ubase ucsize umaxCmds ucmdSize ucmdSizeTarget  displayList u(poolBase u0poolSize u4numCbs u8currCb2  @__GX2CBMgmtU__GX2CBMgmt@@rMEM_SPACE_FUNCTION::U@MEM_SPACE_FUNCTION@@  bitfields  bits uu32All ti32All @f32All6 MEM_SPACE_FUNCTIONTMEM_SPACE_FUNCTION@@ OBASE_ADDRf VGT_DMA_BASE::U@VGT_DMA_BASE@@2MW_ADDRESS_HIGHTMW_ADDRESS_HIGH@@f header uaddrLo  addrHi u dataLo udataHi: _PM4CMDMEMWRITEU_PM4CMDMEMWRITE@@ OMAX_SIZEn VGT_DMA_MAX_SIZE::U@VGT_DMA_MAX_SIZE@@zSQ_TEX_RESOURCE_WORD1_0::U@SQ_TEX_RESOURCE_WORD1_0@@  bitfields  bits uu32All ti32All @f32AllB SQ_TEX_RESOURCE_WORD1_0TSQ_TEX_RESOURCE_WORD1_0@@ u u uF  TEX_HEIGHT  TEX_DEPTH  DATA_FORMATz SQ_TEX_RESOURCE_WORD1_0::U@SQ_TEX_RESOURCE_WORD1_0@@B_PM4SHADOW_REG_RANGEU_PM4SHADOW_REG_RANGE@@R header uaddrLo uaddrHi  regRange: _PM4CMDLOADDATAU_PM4CMDLOADDATA@@jMW_ADDRESS_HIGH::U@MW_ADDRESS_HIGH@@  bitfields  bits uu32All ti32All @f32All2 MW_ADDRESS_HIGHTMW_ADDRESS_HIGH@@rLOAD_CONFIG_ADDR_HI::U@LOAD_CONFIG_ADDR_HI@@  bitfields  bits uu32All ti32All @f32All: LOAD_CONFIG_ADDR_HITLOAD_CONFIG_ADDR_HI@@PA_SU_POLY_OFFSET_DB_FMT_CNTL::U@PA_SU_POLY_OFFSET_DB_FMT_CNTL@@  bitfields  bits uu32All ti32All @f32AllN PA_SU_POLY_OFFSET_DB_FMT_CNTLTPA_SU_POLY_OFFSET_DB_FMT_CNTL@@R POLY_OFFSET_NEG_NUM_DB_BITS POLY_OFFSET_DB_IS_FLOAT_FMT PA_SU_POLY_OFFSET_DB_FMT_CNTL::U@PA_SU_POLY_OFFSET_DB_FMT_CNTL@@jCB_COLOR0_INFO::U@CB_COLOR0_INFO@@  bitfields  bits uu32All ti32All @f32All. CB_COLOR0_INFOTCB_COLOR0_INFO@@ u u u u u u u u u u uV $ ENDIAN  FORMAT  ARRAY_MODE  NUMBER_TYPE READ_SIZE  COMP_SWAP  TILE_MODE  BLEND_CLAMP  CLEAR_COLOR  BLEND_BYPASS  BLEND_FLOAT32  SIMPLE_FLOAT 8 ROUND_MODE 9 TILE_COMPACT !SOURCE_FORMATj!CB_COLOR0_INFO::U@CB_COLOR0_INFO@@>CONTEXT_CONTROL_ENABLETCONTEXT_CONTROL_ENABLE@@F header !loadEnable !shadowEnableF! _PM4CMDCONTEXTCONTROLU_PM4CMDCONTEXTCONTROL@@p#6 *pVFTable spare !nameZ!'$_TypeDescriptor$_extraBytes_23U$_TypeDescriptor$_extraBytes_23@@nPM4_TYPE_3_HEADER::U@PM4_TYPE_3_HEADER@@ !  !bitfields  !bits uu32All ti32All @f32All6 !PM4_TYPE_3_HEADERTPM4_TYPE_3_HEADER@@~# *  !arrayOfBaseClassDescriptorsf !$$_s__RTTIBaseClassArray$_extraBytes_32U$_s__RTTIBaseClassArray$_extraBytes_32@@jCB_COLOR0_MASK::U@CB_COLOR0_MASK@@! !bitfields !bits uu32All ti32All @f32All.!CB_COLOR0_MASKTCB_COLOR0_MASK@@ u u : !CMASK_BLOCK_MAX !FMASK_TILE_MAXj!CB_COLOR0_MASK::U@CB_COLOR0_MASK@@p#6 *pVFTable spare !nameZ!$$_TypeDescriptor$_extraBytes_20U$_TypeDescriptor$_extraBytes_20@@& memPtr next:!__type_info_nodeU__type_info_node@@zSQ_TEX_RESOURCE_WORD5_0::U@SQ_TEX_RESOURCE_WORD5_0@@! !bitfields !bits uu32All ti32All @f32AllB!SQ_TEX_RESOURCE_WORD5_0TSQ_TEX_RESOURCE_WORD5_0@@ u u  u  u^ !LAST_LEVEL !BASE_ARRAY  !LAST_ARRAY !!YUV_CONVz"!SQ_TEX_RESOURCE_WORD5_0::U@SQ_TEX_RESOURCE_WORD5_0@@zCONTEXT_CONTROL_ENABLE::U@CONTEXT_CONTROL_ENABLE@@$! $!bitfields $!bits uu32All ti32All @f32All>%!CONTEXT_CONTROL_ENABLETCONTEXT_CONTROL_ENABLE@@ uJ $ TYPE '!COUNT  OPCODE : PREDICATEn(!PM4_TYPE_3_HEADER::U@PM4_TYPE_3_HEADER@@ u u u u ENABLE_ORDINAL *!ENABLE_UNUSED  ENABLE_CTL_CONST 8 ENABLE_SAMPLER 9 ENABLE_RESOURCE !ENABLE_LOOP_CONST +!ENABLE_BOOL_CONST ,!ENABLE_ALU_CONST -!ENABLE_CONTEXT_REG : ENABLE_CONFIG_REGz .!CONTEXT_CONTROL_ENABLE::U@CONTEXT_CONTROL_ENABLE@@& 6 SWAP  ADDR_HIf0!ADDRESS_HIGH::U@ADDRESS_HIGH@@* WAIT_IDLE  ADDR_HIr2!LOAD_CONFIG_ADDR_HI::U@LOAD_CONFIG_ADDR_HI@@ u>  ENGINE !MEM_SPACE 4!FUNCTIONr5!MEM_SPACE_FUNCTION::U@MEM_SPACE_FUNCTION@@jCOPY_DW_SELECT::U@COPY_DW_SELECT@@7! 7!bitfields 7!bits uu32All ti32All @f32All.8!COPY_DW_SELECTTCOPY_DW_SELECT@@" -!DST : SRCj:!COPY_DW_SELECT::U@COPY_DW_SELECT@@rSET_PRED_PROPERTIES::U@SET_PRED_PROPERTIES@@ U@SET_PRED_PROPERTIES@@V DATA32 WR_CONFIRM CNTR_SEL  ADDR_HIjC!MW_ADDRESS_HIGH::U@MW_ADDRESS_HIGH@@rPM4_EVENT_INITIATOR::U@PM4_EVENT_INITIATOR@@E! E!bitfields E!bits uu32All ti32All @f32All:F!PM4_EVENT_INITIATORTPM4_EVENT_INITIATOR@@ u" H!INDEX  TYPErI!PM4_EVENT_INITIATOR::U@PM4_EVENT_INITIATOR@@rSELECT_ADDRESS_HIGH::U@SELECT_ADDRESS_HIGH@@K! K!bitfields K!bits uu32All ti32All @f32All:L!SELECT_ADDRESS_HIGHTSELECT_ADDRESS_HIGH@@> 6 DATA_SEL % INT_SEL  ADDR_HIrN!SELECT_ADDRESS_HIGH::U@SELECT_ADDRESS_HIGH@@jSTRMOUT_CONTROL::U@STRMOUT_CONTROL@@P! P!bitfields P!bits uu32All ti32All @f32All2Q!STRMOUT_CONTROLTSTRMOUT_CONTROL@@ u uN S!BUFFER_SELECT T!OFFSET_SOURCE : STORE_FILLSIZEjU!STRMOUT_CONTROL::U@STRMOUT_CONTROL@@ 6 SEM_SEL % CLIENT_CODE SIGNAL_TYPE USE_MAILBOX @!WAIT_ON_SIGNAL  ADDR_HInW!SEMA_ADDRESS_HIGH::U@SEMA_ADDRESS_HIGH@@Z udwFlags uhBuffer udwRegValue u dwPatchOffset2Y!PM4CAP_VCOPUPM4CAP_VCOP@@f #qwOfsPatch #qwHandle #qwRegVal uresID udwFlags:[! PM4CAP_CB_PATCHUPM4CAP_CB_PATCH@@" uaddr udataJ]!PM4CAP_IS_INIT_REG_PAIRUPM4CAP_IS_INIT_REG_PAIR@@.COPY_DW_SELECTTCOPY_DW_SELECT@@z header _!select usrcAddrLo u srcAddrHi udstAddrLo udstAddrHi6`!_PM4CMDCOPYDWU_PM4CMDCOPYDW@@vVGT_DMA_NUM_INSTANCES::U@VGT_DMA_NUM_INSTANCES@@b! b!bitfields b!bits uu32All ti32All @f32All>c!VGT_DMA_NUM_INSTANCESTVGT_DMA_NUM_INSTANCES@@ ONUM_INSTANCESve!VGT_DMA_NUM_INSTANCES::U@VGT_DMA_NUM_INSTANCES@@zSQ_TEX_RESOURCE_WORD6_0::U@SQ_TEX_RESOURCE_WORD6_0@@g! g!bitfields g!bits uu32All ti32All @f32AllBh!SQ_TEX_RESOURCE_WORD6_0TSQ_TEX_RESOURCE_WORD6_0@@ u u u u  $ MPEG_CLAMP j!MAX_ANISO_RATIO k!PERF_MODULATION INTERLACED l!ADVIS_FAULT_LOD m!ADVIS_CLAMP_LOD !!TYPEzn!SQ_TEX_RESOURCE_WORD6_0::U@SQ_TEX_RESOURCE_WORD6_0@@*VGT_DMA_SIZETVGT_DMA_SIZE@@6VGT_DRAW_INITIATORTVGT_DRAW_INITIATOR@@B header p!indexCount q!drawIniBr! _PM4CMDDRAWINDEXAUTOU_PM4CMDDRAWINDEXAUTO@@2VGT_DMA_MAX_SIZETVGT_DMA_MAX_SIZE@@*VGT_DMA_BASETVGT_DMA_BASE@@2VGT_DMA_BASE_HITVGT_DMA_BASE_HI@@ header t!maxSize u!lowIBBase v! highIBBase p!indexCount q!drawIni:w!PM4CMDDRAWINDEX2UPM4CMDDRAWINDEX2@@zSQ_TEX_RESOURCE_WORD0_0::U@SQ_TEX_RESOURCE_WORD0_0@@y! y!bitfields y!bits uu32All ti32All @f32AllBz!SQ_TEX_RESOURCE_WORD0_0TSQ_TEX_RESOURCE_WORD0_0@@ u u  u ^ 6 DIM |!TILE_MODE TILE_TYPE }!PITCH ~!TEX_WIDTHz!SQ_TEX_RESOURCE_WORD0_0::U@SQ_TEX_RESOURCE_WORD0_0@@fCP_COHER_CNTL::U@CP_COHER_CNTL@@! !bitfields !bits uu32All ti32All @f32All.!CP_COHER_CNTLTCP_COHER_CNTL@@R DEST_BASE_0_ENA DEST_BASE_1_ENA SO0_DEST_BASE_ENA SO1_DEST_BASE_ENA SO2_DEST_BASE_ENA SO3_DEST_BASE_ENA CB0_DEST_BASE_ENA CB1_DEST_BASE_ENA CB2_DEST_BASE_ENA CB3_DEST_BASE_ENA CB4_DEST_BASE_ENA CB5_DEST_BASE_ENA CB6_DEST_BASE_ENA CB7_DEST_BASE_ENA DB_DEST_BASE_ENA  FULL_CACHE_ENA  TC_ACTION_ENA  VC_ACTION_ENA 8 CB_ACTION_ENA 9 DB_ACTION_ENA !SH_ACTION_ENA +!SX_ACTION_ENAf!CP_COHER_CNTL::U@CP_COHER_CNTL@@& header udummy:!_PM4CMDPFPSYNCMEU_PM4CMDPFPSYNCME@@*^ _CvtvecU_Cvtvec@@Br! _PM4CMDDRAWINDEXIMMDU_PM4CMDDRAWINDEXIMMD@@p#6 *pVFTable spare !nameZ!)$_TypeDescriptor$_extraBytes_25U$_TypeDescriptor$_extraBytes_25@@rVGT_DMA_INDEX_TYPE::U@VGT_DMA_INDEX_TYPE@@! !bitfields !bits uu32All ti32All @f32All6!VGT_DMA_INDEX_TYPETVGT_DMA_INDEX_TYPE@@. $ INDEX_TYPE SWAP_MODEr!VGT_DMA_INDEX_TYPE::U@VGT_DMA_INDEX_TYPE@@6SEMA_ADDRESS_HIGHTSEMA_ADDRESS_HIGH@@> header uaddrLo !addrHiB! _PM4CMDMEMSEMAPHOREU_PM4CMDMEMSEMAPHORE@@ %  f  !  a ffu uDi! a,u#d!!uu!!uuu uDi!uud!u!ffu!u!Rstd::_Scalar_ptr_iterator_tagU_Scalar_ptr_iterator_tag@std@@ u,!!!!u#d!!!uu!!!uuu!u! !u! u  !,!!!Jstd::_Undefined_move_tagU_Undefined_move_tag@std@@ !!!uuu!u! Tf!T!!!ffu!!u!uuu!!u!!u!uuu!uuu!u!Tf!ffu!uu!!u#d!uuu!Jffu!u#d!uuu!!u!Tu!  6__GX2CBTSDataU__GX2CBTSData@@ ! / u!F_GX2DisplayListOverrunU_GX2DisplayListOverrun@@ ! !uu! !!u!:_PM4CMDMEMWRITEU_PM4CMDMEMWRITE@@" IibCmd !mwCmdf!$_GX2QueueCB::__l2::U@?1?_GX2QueueCB@u!!u!GX2_HANG_STATE_OKGX2_HANG_STATE_TSGX2_HANG_STATE_CBGX2_HANG_STATE_RBGX2_HANG_STATE_WFGX2_HANG_STATE_ETC.t!_GX2HangStateW4_GX2HangState@@RENDIAN_NONEENDIAN_8IN16ENDIAN_8IN32ENDIAN_8IN64.t!SurfaceEndianW4SurfaceEndian@@ oldDisplayList uoldByteSize newDisplayList unewByteSize upadding0 u padding1F!(_GX2DisplayListOverrunU_GX2DisplayListOverrun@@* tisPending #timestamp6!__GX2CBTSDataU__GX2CBTSData@@TCORE_OKTCORE_ERRORTCORE_UNSUPPORTED_ASICTCORE_INVALID_INPUTTCORE_COMMAND_GENERATION_FAILEDTCORE_NOT_INITIALIZEDTCORE_INSUFFICIENT_RESOURCESTCORE_UNSUPPORTED_FEATURETCORE_INVALID_CLIENT TCORE_NO_RESOURCES_CLEANED TCORE_NO_RESOURCES_TO_CLEAN TCORE_INVALID_RESOURCE TCORE_INVALID_HEAP TCORE_NON_MAPPABLE_HEAPTCORE_CLIENT_CALLBACK_FAILEDTCORE_INVALID_MAPPINGTCORE_ONETIME_INIT_ALREADY_DONETCORE_INVALID_MODETCORE_INVALID_USERTCORE_INVALID_DEVICETCORE_INVALID_PRIMARYTCORE_DEVICE_MISMATCHTCORE_REQUEST_TIMEOUTTCORE_VERSION_MISMATCHTCORE_CMODEL_PROCESS_MAP_ERRORTCORE_SUPPORT_NOT_ENABLEDTCORE_SUPPORT_ALREADY_ENABLEDTCORE_VIDMEM_INIT_ERRORTCORE_ILLEGAL_ALIGNMENT_RQSTTCORE_INVALID_TILE_MODETCORE_ATOM_BIOS_INVALID_IMAGETCORE_ATOM_BIOS_PARSER_ERROR TCORE_ATOM_BIOS_TABLE_NOT_FOUND!TCORE_ATOM_BIOS_VERSION_MISMATCH"TCORE_INVALID_TIMESTAMP_TYPE#TCORE_BLOCK_IP_NOT_PRESENT$TCORE_UVD_RING_NOT_SUPPORTED%TCORE_HOST_DEST_SURFACE_MISMATCH&TCORE_INVALID_VIDMEM_SIZE'TCORE_INVALID_DESKTOP_NUMBER(TCORE_INVALID_DISPLAY_CONTROLLER)TCORE_INVALID_DISPLAY_MODE_TABLE*TCORE_NO_SAVED_DISPLAY_SETTINGS+TCORE_INVALID_PALETTE,TCORE_CLOCK_SETTING_OUT_OF_RANGE-TCORE_UNKNOWN_INTERRUPT.TCORE_UNSUPPORTED_INTERRUPT_SERVICE/TCORE_DUPLICATE_INTERRUPT_SERVICE0TCORE_AVP_RING_NOT_SUPPORTED1TCORE_DRMDMA_RING_NOT_SUPPORTED2TCORE_NO_CHANGES_APPLIED3TCORE_UNRECOGNIZED_NAME4TCORE_ERROR_LOADING_RLC5TCORE_ERROR_LOADING_SMC6TCORE_PM4_RING_NOT_SUPPORTED7TCORE_INVALID_CMD_BUF_SIZE8TCORE_DRMDMA1_RING_NOT_SUPPORTED*9t!_TCORE_RETW4_TCORE_RET@@u!uu"!uu"uuu*"zSQ_VTX_CONSTANT_WORD2_0::U@SQ_VTX_CONSTANT_WORD2_0@@" "bitfields "bits uu32All ti32All @f32AllB "SQ_VTX_CONSTANT_WORD2_0TSQ_VTX_CONSTANT_WORD2_0@@zSQ_VTX_CONSTANT_WORD6_0::U@SQ_VTX_CONSTANT_WORD6_0@@ "  "bitfields  "bits uu32All ti32All @f32AllB "SQ_VTX_CONSTANT_WORD6_0TSQ_VTX_CONSTANT_WORD6_0@@zSQ_VTX_CONSTANT_WORD3_0::U@SQ_VTX_CONSTANT_WORD3_0@@" "bitfields "bits uu32All ti32All @f32AllB"SQ_VTX_CONSTANT_WORD3_0TSQ_VTX_CONSTANT_WORD3_0@@uu"VGT_MULTI_PRIM_IB_RESET_INDX::U@VGT_MULTI_PRIM_IB_RESET_INDX@@" "bitfields "bits uu32All ti32All @f32AllJ"VGT_MULTI_PRIM_IB_RESET_INDXTVGT_MULTI_PRIM_IB_RESET_INDX@@SuQ*uu""SuQ*uuu"Suuu"Suuuu"B_GX2StreamOutBufferU_GX2StreamOutBuffer@@ "  " S!"""VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE::U@VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE@@$" $"bitfields $"bits uu32All ti32All @f32All^%"VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDETVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE@@>_GX2DispatchParamsU_GX2DispatchParams@@ '"  (")"zSQ_VTX_CONSTANT_WORD0_0::U@SQ_VTX_CONSTANT_WORD0_0@@+" +"bitfields +"bits uu32All ti32All @f32AllB,"SQ_VTX_CONSTANT_WORD0_0TSQ_VTX_CONSTANT_WORD0_0@@zSQ_VTX_CONSTANT_WORD1_0::U@SQ_VTX_CONSTANT_WORD1_0@@." ."bitfields ."bits uu32All ti32All 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>_GX2ComputeShaderU_GX2ComputeShader@@ " bGX2_HANG_RESPONSE_NONEGX2_HANG_RESPONSE_DEBUGGX2_HANG_RESPONSE_RESET6t"_GX2HangResponseW4_GX2HangResponse@@n_GX2_DEBUG_TAG_USER_STRING_GX2_DEBUG_TAG_API_BRACKET_GX2_DEBUG_TAG_TEXTURE_INFO6t"_GX2DebugTagTypeW4_GX2DebugTagType@@JIHENTRYtag::T@IHENTRYtag@@JIHENTRYtag::T@IHENTRYtag@@JIHENTRYtag::T@IHENTRYtag@@JIHENTRYtag::T@IHENTRYtag@@" "d0" "d1" "d2" " d3."IHENTRYtagUIHENTRYtag@@* CAPTURE eRESERVED"RLC_CAPTURE_GPU_CLOCK_COUNT::U@RLC_CAPTURE_GPU_CLOCK_COUNT@@~IHENTRYtag::::U@@IHENTRYtag@@B" "bits uu32AllJ"IHENTRYtag::T@IHENTRYtag@@ Ots_lo~"IHENTRYtag::::U@@IHENTRYtag@@~IHENTRYtag::::U@@IHENTRYtag@@B" "bits uu32AllJ"IHENTRYtag::T@IHENTRYtag@@ Otex_id~"IHENTRYtag::::U@@IHENTRYtag@@~IHENTRYtag::::U@@IHENTRYtag@@B" "bits uu32AllJ"IHENTRYtag::T@IHENTRYtag@@ u. !tex_lod "source_data~"IHENTRYtag::::U@@IHENTRYtag@@~IHENTRYtag::::U@@IHENTRYtag@@B" "bits uu32AllJ"IHENTRYtag::T@IHENTRYtag@@ u: "ts_hi  reserved  source_id~"IHENTRYtag::::U@@IHENTRYtag@@ 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@f32All>"SQ_GPR_RESOURCE_MGMT_1TSQ_GPR_RESOURCE_MGMT_1@@^SQ_CONFIG::U@SQ_CONFIG@@" "bitfields "bits uu32All ti32All @f32All&#SQ_CONFIGTSQ_CONFIG@@~SQ_STACK_RESOURCE_MGMT_2::U@SQ_STACK_RESOURCE_MGMT_2@@# #bitfields #bits uu32All ti32All @f32AllB#SQ_STACK_RESOURCE_MGMT_2TSQ_STACK_RESOURCE_MGMT_2@@zSQ_THREAD_RESOURCE_MGMT::U@SQ_THREAD_RESOURCE_MGMT@@# #bitfields #bits uu32All ti32All @f32AllB#SQ_THREAD_RESOURCE_MGMTTSQ_THREAD_RESOURCE_MGMT@@bVGT_GS_MODE::U@VGT_GS_MODE@@# #bitfields #bits uu32All ti32All @f32All* #VGT_GS_MODETVGT_GS_MODE@@uu* #!uu* #SQ_ALU_CONST_BUFFER_SIZE_VS_0::U@SQ_ALU_CONST_BUFFER_SIZE_VS_0@@# #bitfields #bits uu32All ti32All @f32AllN#SQ_ALU_CONST_BUFFER_SIZE_VS_0TSQ_ALU_CONST_BUFFER_SIZE_VS_0@@SQ_ALU_CONST_BUFFER_SIZE_GS_0::U@SQ_ALU_CONST_BUFFER_SIZE_GS_0@@# #bitfields #bits uu32All ti32All @f32AllN#SQ_ALU_CONST_BUFFER_SIZE_GS_0TSQ_ALU_CONST_BUFFER_SIZE_GS_0@@SQ_ALU_CONST_BUFFER_SIZE_PS_0::U@SQ_ALU_CONST_BUFFER_SIZE_PS_0@@# #bitfields #bits uu32All ti32All @f32AllN#SQ_ALU_CONST_BUFFER_SIZE_PS_0TSQ_ALU_CONST_BUFFER_SIZE_PS_0@@:_GX2UserContextU_GX2UserContext@@ #  " # ###nPA_CL_VS_OUT_CNTL::U@PA_CL_VS_OUT_CNTL@@# #bitfields #bits uu32All ti32All @f32All6#PA_CL_VS_OUT_CNTLTPA_CL_VS_OUT_CNTL@@F__GX2VertexShaderRegsU__GX2VertexShaderRegs@@ !# "# !b$# " &# #'#(#vSQ_GSVS_RING_ITEMSIZE::U@SQ_GSVS_RING_ITEMSIZE@@*# *#bitfields *#bits uu32All ti32All @f32All>+#SQ_GSVS_RING_ITEMSIZETSQ_GSVS_RING_ITEMSIZE@@J__GX2GeometryShaderRegsU__GX2GeometryShaderRegs@@ -# .#  " 0# #1#2#nDB_SHADER_CONTROL::U@DB_SHADER_CONTROL@@4# 4#bitfields 4#bits uu32All ti32All @f32All65#DB_SHADER_CONTROLTDB_SHADER_CONTROL@@B__GX2PixelShaderRegsU__GX2PixelShaderRegs@@ 7# 8#  " :# #;#<#B__GX2FetchShaderRegsU__GX2FetchShaderRegs@@ ># ?#  " A# #B#C#rSQ_PGM_RESOURCES_ES::U@SQ_PGM_RESOURCES_ES@@E# E#bitfields E#bits uu32All ti32All @f32All:F#SQ_PGM_RESOURCES_ESTSQ_PGM_RESOURCES_ES@@F__GX2ComputeShaderRegsU__GX2ComputeShaderRegs@@ H# I# nSQ_ESGS_RING_BASE::U@SQ_ESGS_RING_BASE@@K# K#bitfields K#bits uu32All ti32All @f32All6L#SQ_ESGS_RING_BASETSQ_ESGS_RING_BASE@@nSQ_ESGS_RING_SIZE::U@SQ_ESGS_RING_SIZE@@N# N#bitfields N#bits uu32All ti32All @f32All6O#SQ_ESGS_RING_SIZETSQ_ESGS_RING_SIZE@@nSQ_GSVS_RING_SIZE::U@SQ_GSVS_RING_SIZE@@Q# Q#bitfields Q#bits uu32All ti32All @f32All6R#SQ_GSVS_RING_SIZETSQ_GSVS_RING_SIZE@@nSQ_GSVS_RING_BASE::U@SQ_GSVS_RING_BASE@@T# T#bitfields T#bits uu32All ti32All @f32All6U#SQ_GSVS_RING_BASETSQ_GSVS_RING_BASE@@ #uW#rSQ_PGM_RESOURCES_VS::U@SQ_PGM_RESOURCES_VS@@Y# Y#bitfields Y#bits uu32All ti32All @f32All:Z#SQ_PGM_RESOURCES_VSTSQ_PGM_RESOURCES_VS@@ '#u\#rSQ_PGM_RESOURCES_GS::U@SQ_PGM_RESOURCES_GS@@^# ^#bitfields ^#bits uu32All ti32All @f32All:_#SQ_PGM_RESOURCES_GSTSQ_PGM_RESOURCES_GS@@ 1#ua#rSQ_PGM_RESOURCES_PS::U@SQ_PGM_RESOURCES_PS@@c# c#bitfields c#bits uu32All ti32All @f32All:d#SQ_PGM_RESOURCES_PSTSQ_PGM_RESOURCES_PS@@RLATE_ZEARLY_Z_THEN_LATE_ZRE_ZEARLY_Z_THEN_RE_Z"tf#ZOrderW4ZOrder@@FMT_INVALIDFMT_8FMT_4_4FMT_3_3_2FMT_RESERVED_4FMT_16FMT_16_FLOATFMT_8_8FMT_5_6_5 FMT_6_5_5 FMT_1_5_5_5 FMT_4_4_4_4 FMT_5_5_5_1 FMT_32FMT_32_FLOATFMT_16_16FMT_16_16_FLOATFMT_8_24FMT_8_24_FLOATFMT_24_8FMT_24_8_FLOATFMT_10_11_11FMT_10_11_11_FLOATFMT_11_11_10FMT_11_11_10_FLOATFMT_2_10_10_10FMT_8_8_8_8FMT_10_10_10_2FMT_X24_8_32_FLOATFMT_32_32FMT_32_32_FLOATFMT_16_16_16_16 FMT_16_16_16_16_FLOAT!FMT_RESERVED_33"FMT_32_32_32_32#FMT_32_32_32_32_FLOAT$FMT_RESERVED_36%FMT_1&FMT_1_REVERSED'FMT_GB_GR(FMT_BG_RG)FMT_32_AS_8*FMT_32_AS_8_8+FMT_5_9_9_9_SHAREDEXP,FMT_8_8_8-FMT_16_16_16.FMT_16_16_16_FLOAT/FMT_32_32_320FMT_32_32_32_FLOAT1FMT_BC12FMT_BC23FMT_BC34FMT_BC45FMT_BC56FMT_APC07FMT_APC18FMT_APC29FMT_APC3:FMT_APC4;FMT_APC5<FMT_APC6=FMT_APC7>FMT_CTX1?FMT_RESERVED_63.@th#SurfaceFormatW4SurfaceFormat@@" usq_pgm_resources_fsBj#__GX2FetchShaderRegsU__GX2FetchShaderRegs@@u#(u#r usq_pgm_resources_vs uvgt_primitiveid_en uspi_vs_out_config u num_spi_vs_out_id l#spi_vs_out_id u8pa_cl_vs_out_cntl u<sq_vtx_semantic_clear u@num_sq_vtx_semantic m#Dsq_vtx_semantic uvgt_strmout_buffer_en uvgt_vertex_reuse_block_cntl uvgt_hos_reuse_depthF n#__GX2VertexShaderRegsU__GX2VertexShaderRegs@@ CLIP_DIST_ENA_0 CLIP_DIST_ENA_1 CLIP_DIST_ENA_2 CLIP_DIST_ENA_3 CLIP_DIST_ENA_4 CLIP_DIST_ENA_5 CLIP_DIST_ENA_6 CLIP_DIST_ENA_7 CULL_DIST_ENA_0 CULL_DIST_ENA_1 CULL_DIST_ENA_2 CULL_DIST_ENA_3 CULL_DIST_ENA_4 CULL_DIST_ENA_5 CULL_DIST_ENA_6 CULL_DIST_ENA_7 USE_VTX_POINT_SIZE USE_VTX_EDGE_FLAG USE_VTX_RENDER_TARGET_INDX @!USE_VTX_VIEWPORT_INDX  USE_VTX_KILL_FLAG  VS_OUT_MISC_VEC_ENA  VS_OUT_CCDIST0_VEC_ENA  VS_OUT_CCDIST1_VEC_ENA  VS_OUT_MISC_SIDE_BUS_ENA 8 USE_VTX_GS_CUT_FLAGnp#PA_CL_VS_OUT_CNTL::U@PA_CL_VS_OUT_CNTL@@ u  r#DATAs#SQ_ALU_CONST_BUFFER_SIZE_PS_0::U@SQ_ALU_CONST_BUFFER_SIZE_PS_0@@ OMEM_BASEnu#SQ_GSVS_RING_BASE::U@SQ_GSVS_RING_BASE@@ u NUM_GPRS  STACK_SIZE  DX10_CLAMP  PRIME_CACHE_PGM_EN  PRIME_CACHE_ON_DRAW w#FETCH_CACHE_LINES +!UNCACHED_FIRST_INST ,!PRIME_CACHE_ENABLE -!PRIME_CACHE_ON_CONSTr x#SQ_PGM_RESOURCES_ES::U@SQ_PGM_RESOURCES_ES@@& usq_pgm_resources_gs uvgt_gs_out_prim_type uvgt_gs_mode u pa_cl_vs_out_cntl usq_pgm_resources_vs usq_gs_vert_itemsize uspi_vs_out_config unum_spi_vs_out_id l# spi_vs_out_id uHvgt_strmout_buffer_enJ z#L__GX2GeometryShaderRegsU__GX2GeometryShaderRegs@@u# usq_pgm_resources_es uvgt_vertex_reuse_block_cntl uvgt_hos_reuse_depth u vgt_gs_mode uspi_thread_grouping usq_dyn_gpr_cntl_ps_flush_req |#paddingF}#0__GX2ComputeShaderRegsU__GX2ComputeShaderRegs@@r NUM_PS_THREADS  NUM_VS_THREADS  NUM_GS_THREADS  NUM_ES_THREADSz#SQ_THREAD_RESOURCE_MGMT::U@SQ_THREAD_RESOURCE_MGMT@@. uoffset uinitial_value2#__GX2LoopVarU__GX2LoopVar@@& usq_pgm_resources_ps upgm_exports_ps uspi_ps_in_control_0 u spi_ps_in_control_1 unum_spi_ps_input_cntl m#spi_ps_input_cntl ucb_shader_mask ucb_shader_control udb_shader_control uspi_input_zB #__GX2PixelShaderRegsU__GX2PixelShaderRegs@@ u uN VC_ENABLE EXPORT_SRC_C DX9_CONSTS ALU_INST_PREFER_VECTOR DX10_CLAMP RESERVED_5 RESERVED_6 & CLAUSE_SEQ_PRIO NO_GPR_CLAMP EN_TEX_SKEW #PS_PRIO M"VS_PRIO #GS_PRIO !!ES_PRIO^#SQ_CONFIG::U@SQ_CONFIG@@nu#SQ_ESGS_RING_BASE::U@SQ_ESGS_RING_BASE@@ NUM_GPRS  STACK_SIZE  DX10_CLAMP  PRIME_CACHE_PGM_EN  PRIME_CACHE_ON_DRAW w#FETCH_CACHE_LINES +!UNCACHED_FIRST_INST ,!PRIME_CACHE_ENABLE -!PRIME_CACHE_ON_CONST : CLAMP_CONSTSr #SQ_PGM_RESOURCES_PS::U@SQ_PGM_RESOURCES_PS@@n NUM_PS_GPRS  NUM_VS_GPRS !DYN_GPR_ENABLE - NUM_CLAUSE_TEMP_GPRSz#SQ_GPR_RESOURCE_MGMT_1::U@SQ_GPR_RESOURCE_MGMT_1@@ u B !NUM_PS_STACK_ENTRIES #NUM_VS_STACK_ENTRIES~#SQ_STACK_RESOURCE_MGMT_1::U@SQ_STACK_RESOURCE_MGMT_1@@ u #ITEMSIZEv#SQ_GSVS_RING_ITEMSIZE::U@SQ_GSVS_RING_ITEMSIZE@@& Z_EXPORT_ENABLE STENCIL_REF_EXPORT_ENABLE Z_ORDER KILL_ENABLE COVERAGE_TO_MASK_ENABLE MASK_EXPORT_ENABLE DUAL_EXPORT_ENABLE EXEC_ON_HIER_FAIL EXEC_ON_NOOP ALPHA_TO_MASK_DISABLEn #DB_SHADER_CONTROL::U@DB_SHADER_CONTROL@@rGS_OFFGS_SCENARIO_AGS_SCENARIO_BGS_SCENARIO_GGS_SCENARIO_CSPRITE_EN6t#VGT_GS_MODE_TYPEW4VGT_GS_MODE_TYPE@@ OMEM_SIZEn#SQ_GSVS_RING_SIZE::U@SQ_GSVS_RING_SIZE@@r x#SQ_PGM_RESOURCES_VS::U@SQ_PGM_RESOURCES_VS@@B !NUM_GS_STACK_ENTRIES #NUM_ES_STACK_ENTRIES~#SQ_STACK_RESOURCE_MGMT_2::U@SQ_STACK_RESOURCE_MGMT_2@@r x#SQ_PGM_RESOURCES_GS::U@SQ_PGM_RESOURCES_GS@@#us# # F cbData @userData #HuserPatchCallback:#P_GX2UserContextU_GX2UserContext@@2 NUM_GS_GPRS  NUM_ES_GPRSz#SQ_GPR_RESOURCE_MGMT_2::U@SQ_GPR_RESOURCE_MGMT_2@@ u u " $ MODE ES_PASSTHRU #CUT_MODE k!RESERVED_0 MODE_HI #RESERVED_1 GS_C_PACK_EN ' RESERVED_2 COMPUTE_MODE FAST_COMPUTE_MODE ELEMENT_INFO_EN PARTIAL_THD_AT_EOIb #VGT_GS_MODE::U@VGT_GS_MODE@@s#SQ_ALU_CONST_BUFFER_SIZE_VS_0::U@SQ_ALU_CONST_BUFFER_SIZE_VS_0@@n#SQ_ESGS_RING_SIZE::U@SQ_ESGS_RING_SIZE@@s#SQ_ALU_CONST_BUFFER_SIZE_GS_0::U@SQ_ALU_CONST_BUFFER_SIZE_GS_0@@&!uuuuuuu#!uuu#!uub#!uuub#u!"#~VGT_STRMOUT_BUFFER_SIZE_0::U@VGT_STRMOUT_BUFFER_SIZE_0@@# #bitfields #bits uu32All ti32All @f32AllF#VGT_STRMOUT_BUFFER_SIZE_0TVGT_STRMOUT_BUFFER_SIZE_0@@B_GX2RBuffer_privateU_GX2RBuffer_private@@ # ~VGT_STRMOUT_BUFFER_BASE_0::U@VGT_STRMOUT_BUFFER_BASE_0@@# #bitfields #bits uu32All ti32All @f32AllF#VGT_STRMOUT_BUFFER_BASE_0TVGT_STRMOUT_BUFFER_BASE_0@@u!"#jVGT_STRMOUT_EN::U@VGT_STRMOUT_EN@@# #bitfields #bits uu32All ti32All @f32All.#VGT_STRMOUT_ENTVGT_STRMOUT_EN@@ STREAMOUTj#VGT_STRMOUT_EN::U@VGT_STRMOUT_EN@@~Z"VGT_STRMOUT_BUFFER_SIZE_0::U@VGT_STRMOUT_BUFFER_SIZE_0@@ OBASE~#VGT_STRMOUT_BUFFER_BASE_0::U@VGT_STRMOUT_BUFFER_BASE_0@@ #u##uu#u# #-##  # #u#u#uuu#u. :_GX2TextureRegsU_GX2TextureRegs@@ # uuuu#:_GX2DepthBufferU_GX2DepthBuffer@@ # #uu#  #uu#B_GX2ColorBufferRegsU_GX2ColorBufferRegs@@ # #uu# ## ##B_GX2DepthBufferRegsU_GX2DepthBufferRegs@@ # >_GX2HiStencilInfoU_GX2HiStencilInfo@@ #  ##DB_SRESULTS_COMPARE_STATE0::U@DB_SRESULTS_COMPARE_STATE0@@# #bitfields #bits uu32All ti32All @f32AllF#DB_SRESULTS_COMPARE_STATE0TDB_SRESULTS_COMPARE_STATE0@@DB_SRESULTS_COMPARE_STATE1::U@DB_SRESULTS_COMPARE_STATE1@@# #bitfields #bits uu32All ti32All @f32AllF#DB_SRESULTS_COMPARE_STATE1TDB_SRESULTS_COMPARE_STATE1@@####  $ $u$zSQ_TEX_RESOURCE_WORD2_0::U@SQ_TEX_RESOURCE_WORD2_0@@$ $bitfields $bits uu32All ti32All @f32AllB$SQ_TEX_RESOURCE_WORD2_0TSQ_TEX_RESOURCE_WORD2_0@@zSQ_TEX_RESOURCE_WORD3_0::U@SQ_TEX_RESOURCE_WORD3_0@@$ $bitfields $bits uu32All ti32All @f32AllB$SQ_TEX_RESOURCE_WORD3_0TSQ_TEX_RESOURCE_WORD3_0@@:_GX2AASampleLocU_GX2AASampleLoc@@  $  $  $+  $PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX::U@PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX@@$ $bitfields $bits uu32All ti32All @f32AllR$PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTXTPA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX@@jPA_SC_AA_CONFIG::U@PA_SC_AA_CONFIG@@$ $bitfields $bits uu32All ti32All @f32All2$PA_SC_AA_CONFIGTPA_SC_AA_CONFIG@@~PA_SC_AA_SAMPLE_LOCS_MCTX::U@PA_SC_AA_SAMPLE_LOCS_MCTX@@$ $bitfields $bits uu32All ti32All @f32AllF$PA_SC_AA_SAMPLE_LOCS_MCTXTPA_SC_AA_SAMPLE_LOCS_MCTX@@ +$p# $x $y:$_GX2AASampleLocU_GX2AASampleLoc@@  $ $+$   $ !$"$jCB_COLOR0_TILE::U@CB_COLOR0_TILE@@$$ $$bitfields $$bits uu32All ti32All @f32All.%$CB_COLOR0_TILETCB_COLOR0_TILE@@jCB_COLOR0_FRAG::U@CB_COLOR0_FRAG@@'$ '$bitfields '$bits uu32All ti32All @f32All.($CB_COLOR0_FRAGTCB_COLOR0_FRAG@@jCB_COLOR0_BASE::U@CB_COLOR0_BASE@@*$ *$bitfields *$bits uu32All ti32All @f32All.+$CB_COLOR0_BASETCB_COLOR0_BASE@@ # -$  .$/$fDB_DEPTH_BASE::U@DB_DEPTH_BASE@@1$ 1$bitfields 1$bits uu32All ti32All @f32All.2$DB_DEPTH_BASETDB_DEPTH_BASE@@jDB_DEPTH_CLEAR::U@DB_DEPTH_CLEAR@@4$ 4$bitfields 4$bits uu32All ti32All @f32All.5$DB_DEPTH_CLEARTDB_DEPTH_CLEAR@@nDB_STENCIL_CLEAR::U@DB_STENCIL_CLEAR@@7$ 7$bitfields 7$bits uu32All ti32All @f32All28$DB_STENCIL_CLEARTDB_STENCIL_CLEAR@@DEPTH_INVALIDDEPTH_16DEPTH_X8_24DEPTH_8_24DEPTH_X8_24_FLOATDEPTH_8_24_FLOATDEPTH_32_FLOATDEPTH_X24_8_32_FLOAT*t:$DepthFormatW4DepthFormat@@2ARRAY_COLOR_TILEARRAY_DEPTH_TILE&t<$TileTypeW4TileType@@2_GX2FmtDataU_GX2FmtData@@ >$?$#SQ_TEX_ANISO_RATIO_1SQ_TEX_ANISO_RATIO_2SQ_TEX_ANISO_RATIO_4SQ_TEX_ANISO_RATIO_8SQ_TEX_ANISO_RATIO_16:tA$SQ_TEX_ANISO_RATIOW4SQ_TEX_ANISO_RATIO@@NUMBER_UNORMNUMBER_SNORMNUMBER_USCALEDNUMBER_SSCALEDNUMBER_UINTNUMBER_SINTNUMBER_SRGBNUMBER_FLOAT.tC$SurfaceNumberW4SurfaceNumber@@JSWAP_STDSWAP_ALTSWAP_STD_REVSWAP_ALT_REV*tE$SurfaceSwapW4SurfaceSwap@@FTILE_DISABLETILE_CLEAR_ENABLETILE_FRAG_ENABLE.tG$ColorTileModeW4ColorTileMode@@*EXPORT_FULLEXPORT_NORM.tI$SourceFormatW4SourceFormat@@F  bits  uses  swap  expFmt2K$_GX2FmtDataU_GX2FmtData@@ OBASE_256BjM$CB_COLOR0_TILE::U@CB_COLOR0_TILE@@.CB_COLOR0_SIZETCB_COLOR0_SIZE@@.CB_COLOR0_INFOTCB_COLOR0_INFO@@.CB_COLOR0_VIEWTCB_COLOR0_VIEW@@.CB_COLOR0_MASKTCB_COLOR0_MASK@@ O$cb_colorN_size P$cb_colorN_info Q$cb_colorN_view R$ cb_colorN_mask ucmask_offsetBS$_GX2ColorBufferRegsU_GX2ColorBufferRegs@@JSQ_ENDIAN_NONESQ_ENDIAN_8IN16SQ_ENDIAN_8IN322tU$ENUM_SQ_ENDIANW4ENUM_SQ_ENDIAN@@ ODEPTH_CLEARjW$DB_DEPTH_CLEAR::U@DB_DEPTH_CLEAR@@RSQ_NUM_FORMAT_NORMSQ_NUM_FORMAT_INTSQ_NUM_FORMAT_SCALED.tY$SQ_NUM_FORMATW4SQ_NUM_FORMAT@@ u Z $ MSAA_NUM_SAMPLES AA_MASK_CENTROID_DTMN [$MAX_SAMPLE_DISTj\$PA_SC_AA_CONFIG::U@PA_SC_AA_CONFIG@@BSQ_TEX_RESOURCE_WORD0_0TSQ_TEX_RESOURCE_WORD0_0@@BSQ_TEX_RESOURCE_WORD1_0TSQ_TEX_RESOURCE_WORD1_0@@BSQ_TEX_RESOURCE_WORD4_0TSQ_TEX_RESOURCE_WORD4_0@@BSQ_TEX_RESOURCE_WORD5_0TSQ_TEX_RESOURCE_WORD5_0@@BSQ_TEX_RESOURCE_WORD6_0TSQ_TEX_RESOURCE_WORD6_0@@f ^$resource0 _$resource1 `$resource4 a$ resource5 b$resource6:c$_GX2TextureRegsU_GX2TextureRegs@@.DB_DEPTH_SIZETDB_DEPTH_SIZE@@.DB_DEPTH_VIEWTDB_DEPTH_VIEW@@.DB_DEPTH_INFOTDB_DEPTH_INFO@@2DB_HTILE_SURFACETDB_HTILE_SURFACE@@6DB_PREFETCH_LIMITTDB_PREFETCH_LIMIT@@6DB_PRELOAD_CONTROLTDB_PRELOAD_CONTROL@@NPA_SU_POLY_OFFSET_DB_FMT_CNTLTPA_SU_POLY_OFFSET_DB_FMT_CNTL@@ e$db_depth_size f$db_depth_view g$db_depth_info h$ db_htile_surface i$db_prefetch_limit j$db_preload_control k$pa_su_poly_offset_db_fmt_cntlBl$_GX2DepthBufferRegsU_GX2DepthBufferRegs@@ u u u u !S0_X n$S0_Y  S1_X o$S1_Y p$S2_X H!S2_Y q$S3_X - S3_Y~r$PA_SC_AA_SAMPLE_LOCS_MCTX::U@PA_SC_AA_SAMPLE_LOCS_MCTX@@jM$CB_COLOR0_BASE::U@CB_COLOR0_BASE@@FSQ_SRF_MODE_ZERO_CLAMP_MINUS_ONESQ_SRF_MODE_NO_ZERO*tu$SQ_SRF_MODEW4SQ_SRF_MODE@@ !S4_X n$S4_Y  S5_X o$S5_Y p$S6_X H!S6_Y q$S7_X - S7_Yw$PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX::U@PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX@@jM$CB_COLOR0_FRAG::U@CB_COLOR0_FRAG@@fM$DB_DEPTH_BASE::U@DB_DEPTH_BASE@@ u u ^ 6 COMPAREFUNC0 {$COMPAREVALUE0 |$COMPAREMASK0  ENABLE0}$DB_SRESULTS_COMPARE_STATE0::U@DB_SRESULTS_COMPARE_STATE0@@zJ"SQ_TEX_RESOURCE_WORD2_0::U@SQ_TEX_RESOURCE_WORD2_0@@" CLEAR  MINn$DB_STENCIL_CLEAR::U@DB_STENCIL_CLEAR@@^ 6 COMPAREFUNC1 {$COMPAREVALUE1 |$COMPAREMASK1  ENABLE1$DB_SRESULTS_COMPARE_STATE1::U@DB_SRESULTS_COMPARE_STATE1@@ OMIP_ADDRESSz$SQ_TEX_RESOURCE_WORD3_0::U@SQ_TEX_RESOURCE_WORD3_0@@u!!u$. !uuuuuuuuu $t*_TCLInfoU_TCLInfo@@ $  $u$uu#u$ARRAY_LINEAR_GENERALARRAY_LINEAR_ALIGNEDARRAY_1D_TILED_THIN1ARRAY_1D_TILED_THICKARRAY_2D_TILED_THIN1ARRAY_2D_TILED_THIN2ARRAY_2D_TILED_THIN4ARRAY_2D_TILED_THICKARRAY_2B_TILED_THIN1 ARRAY_2B_TILED_THIN2 ARRAY_2B_TILED_THIN4 ARRAY_2B_TILED_THICK ARRAY_3D_TILED_THIN1 ARRAY_3D_TILED_THICKARRAY_3B_TILED_THIN1ARRAY_3B_TILED_THICK&t$ArrayModeW4ArrayMode@@&uuuu$!uu$uuu$RTCORE_TS_PM4_CONSUMEDTCORE_TS_PM4_RETIREDTCORE_TS_DRMDMA6t$_TCLTimestampTypeW4_TCLTimestampType@@$#u$$#u$u"u$utu$m $ t$$$  [#ou$$m#ou$$u[#o$um#o$ @$!$q$uu$pp$q$q@$RWEKIVA_A11WEKIVA_A12 WEKIVA_A21MARIO_A11MARIO_A12MARIO_A13)LUIGI_A11*LUIGI_A123LUIGI_APU_A11=WALDEN_A11>WALDEN_A12GPUNE_A11HPUNE_A12JPUNE_A13KPUNE_A21LPUNE_A31MPUNE_A41NPUNE_A51WEKIVA_UNKNOWN.t$W4@@TCOREASIC_UNKNOWNTCOREASIC_WEKIVATCOREASIC_MARIOTCOREASIC_LUIGITCOREASIC_WALDENTCOREASIC_PUNETCOREASIC_INVALID.t$_TCLAsicTypeW4_TCLAsicType@@ uuTCoreAsicType uuChipRev uuCpMicrocodeVersion u uGPU__GC__QP_PER_SIMD uuGPU__SX__PARAMETER_CACHE_WIDTH uuGPU__GC__NUM_RB pAddrLibHandle u uGpuSysClock*$(_TCLInfoU_TCLInfo@@6PM4_TYPE_0_HEADERTPM4_TYPE_0_HEADER@@ $   nPM4_TYPE_0_HEADER::U@PM4_TYPE_0_HEADER@@$ $bitfields $bits uu32All ti32All @f32All6$PM4_TYPE_0_HEADERTPM4_TYPE_0_HEADER@@ u2 $ TYPE '!COUNT $BASEn$PM4_TYPE_0_HEADER::U@PM4_TYPE_0_HEADER@@ D  $$$u$$/$ D $ $/$$uu/$$ $$$$$$uuu$$uu$"S$Quuuu$$/$u$$u$$:_GX2AttribStreamU_GX2AttribStream@@ $ $ "$u$$ /u$/u$rstd::_List_nod,STLtoGX2RAllocator > >::_NodeU_Node@?$_List_nod@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@ $  $ $  $, $,STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Node>V?$STLtoGX2RAllocator@U_Node@?$_List_nod@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@@ $  $ %, % $%% $%%% $% $ $$%% $ $$% % % % $$%n$# $%% %  #$%$$ $%% $ $%% 0$%% $%/$value_type$pointer$const_pointer$reference$const_reference#size_typedifference_type%STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Node>%~STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Node> %address %allocate%deallocate%max_size%construct%destroy%operator==%operator!=%__vecDelDtor%STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Node>V?$STLtoGX2RAllocator@U_Node@?$_List_nod@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@@vstd::list,STLtoGX2RAllocator > >::_Iterator<1>V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@ %  % %  %, %,STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Iterator<1> >V?$STLtoGX2RAllocator@V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@@  %   % "%, #%  %!%$%  %!%%%&%  %!% % % %!%)% % % %!%+%*%,% % %!%n%#  %!%/% "%  # %1%%%  %!%3% %  %!%5% 0 %!%$%  %!%/STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Iterator<1> >::rebind,STLtoGX2RAllocator > >::_Iterator<1> >U?$rebind@V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@?$STLtoGX2RAllocator@V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@@%value_type%pointer%const_pointer%reference%const_reference#size_typedifference_type'%STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Iterator<1> >(%~STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Iterator<1> >-%address.%allocate0%deallocate2%max_size4%construct6%destroy7%operator==7%operator!=8%__vecDelDtor9%?$rebind@V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@:%STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Iterator<1> >V?$STLtoGX2RAllocator@V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@@ %other<%STLtoGX2RAllocator,STLtoGX2RAllocator > >::_Iterator<1> >::rebind,STLtoGX2RAllocator > >::_Iterator<1> >U?$rebind@V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@?$STLtoGX2RAllocator@V?$_Iterator@$00@?$list@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@V?$STLtoGX2RAllocator@U?$pair@$$CB_KUResourceInfo@_GX2RResourceTracker@@@std@@@@@std@@@@JSTLtoGX2RAllocatorV?$STLtoGX2RAllocator@D@@ >%  >% @%, A% >%?%B% >%?%C%D% >%?% >%?%a p>%?%cG%H% p>%?%n >%?%l @%  #>%L% >%?%r >%?%t 0>%?%B% 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(u(///(/t/((uu(uu( # (  ((A"A"A"((/#(tu($( A"(A"(((IK([](ik(SU(bd(pr(($&(+-(t(( (wy(~(t(24(9;(@B(##(p#6 *pVFTable spare )nameZ)$_TypeDescriptor$_extraBytes_14U$_TypeDescriptor$_extraBytes_14@@  2R600AddrLibVR600AddrLib@@ )  )) )  )  ) ) ) ) ) ) t) )J]uuuuuuuuuu#uuuu t) ))N]uuuuuuuuuu#uuuu t) ))])R]]uuuuuuuuuu#uuuu t) ))]uuuu t) ))"]uuuuu t) ))* ]uuuuuuu t) ) )]uuuu u) )) t) )]tu t) ) )]uu u) )") u) ) #) )2 uuuuuu]tuuu #) ) &)Buuuuuuuu]tuuuuu #) )()u#  u) )t u) )uuu]uu u) ).) ) )F#uuuuu]tuuuuuuuu ) )1) ) ) uuuu ) )4)"]uuuuuu ) )6) u) )* ]uuuuuutt ]) ) 9) t))B_gb_tiling_config_tU_gb_tiling_config_t@@ Oval <)f6=)gb_tiling_config_uTgb_tiling_config_u@@ )) u) ) u) ) #) )## ))  ) )' ) ). ) )5 ]) t) )  u)/ ) )  ) ) ) )uu# u) )O)uuu ) )Q)]uu# u) )S) t) )2CONFIG_256B_GROUPCONFIG_512B_GROUP2tV)GroupInterleaveW4GroupInterleave@@CONFIG_1KB_ROWCONFIG_2KB_ROWCONFIG_4KB_ROWCONFIG_8KB_ROWCONFIG_1KB_ROW_OPTCONFIG_2KB_ROW_OPTCONFIG_4KB_ROW_OPTCONFIG_8KB_ROW_OPT&tX)RowTilingW4RowTiling@@bCONFIG_128B_SWAPSCONFIG_256B_SWAPSCONFIG_512B_SWAPSCONFIG_1KB_SWAPS.tZ)BankSwapBytesW4BankSwapBytes@@bCONFIG_1KB_SPLITCONFIG_2KB_SPLITCONFIG_4KB_SPLITCONFIG_8KB_SPLIT6t\)SampleSplitBytesW4SampleSplitBytes@@BADDR_PIPEINTERLEAVE_256BADDR_PIPEINTERLEAVE_512B:t^)AddrPipeInterleaveW4AddrPipeInterleave@@bADDR_ROWSIZE_1KBADDR_ROWSIZE_2KBADDR_ROWSIZE_4KB ADDR_ROWSIZE_8KB*t`)AddrRowSizeW4AddrRowSize@@nADDR_BANKSWAP_128BADDR_BANKSWAP_256BADDR_BANKSWAP_512BADDR_BANKSWAP_1KB6tb)AddrBankSwapSizeW4AddrBankSwapSize@@rADDR_SAMPLESPLIT_1KBADDR_SAMPLESPLIT_2KBADDR_SAMPLESPLIT_4KB ADDR_SAMPLESPLIT_8KB:td)AddrSampleSplitSizeW4AddrSampleSplitSize@@*CONFIG_4_BANKCONFIG_8_BANK*tf)BankTilingW4BankTiling@@RCONFIG_1_PIPECONFIG_2_PIPECONFIG_4_PIPECONFIG_8_PIPE*th)PipeTilingW4PipeTiling@@ )  ), k) ))l)m)) #) )' ) ).&uuuuuuuu #) )q)2 ]uuuuuuuuuu #) ) s). #uuuuuuuuu ) ) u): ]#uuuuuuuuuuu ) ) w)* uuuuu]tuu u) ) y) t) ) t) u) u) )) ), )))l) ))/  j)CreateObjn)R600AddrLib)ComputeSurfaceInfo%)ComputeSurfaceAddrFromCoord0)ComputeSurfaceCoordFromAddrJ)ComputeFmaskInfoo)ComputeFmaskAddrFromCoordp)ComputeFmaskCoordFromAddr )HwlComputeSurfaceInfo )HwlComputeSurfaceAddrFromCoord )HwlComputeSurfaceCoordFromAddrL)HwlComputeSliceTileSwizzleM)HwlExtractBankPipeSwizzleN)HwlCombineBankPipeSwizzle@)HwlComputeHtileBppA)HwlComputeHtileBaseAlignB)HwlComputeHtileBytesE)HwlComputeFmaskInfoF)HwlComputeFmaskAddrFromCoordG)HwlComputeFmaskCoordFromAddrH)HwlConvertTileInfoToHW)ComputeSurfaceBankSwappedWidth:)ComputeSurfaceMipLevelTileMode)ComputeSurfaceAlignmentsLinear)ComputeSurfaceAlignmentsMicroTiled)ComputeSurfaceAlignmentsMacroTiled)ComputeSurfaceInfoLinear)ComputeSurfaceInfoMicroTiled)ComputeSurfaceInfoMacroTiled I)ConvertToNonBankSwappedMode K)ComputeFmaskNumPlanesFromNumSamples')ComputeSurfaceAddrFromCoordMicroTiled))ComputeSurfaceAddrFromCoordMacroTiled2)ComputeSurfaceCoordFromAddrMacroTiledr)ComputeFmaskAddrFromCoordMicroTiledt)ComputeFmaskAddrFromCoordMacroTiledv)ComputeFmaskCoordFromAddrMicroTiledx)ComputeFmaskCoordFromAddrMacroTiled5)ComputePixelCoordFromOffsetDepth+)ComputePipeFromCoord/)ComputeBankFromCoord-)ComputePipeFromCoordWoRotation-)ComputeBankFromCoordWoRotation8)ComputeBankFromAddr7)ComputeCoordFromPipeAndBankz)ComputePixelOffsetWithinMicroTile3)HwlComputePixelCoordFromOffsetU)HwlComputeMipLevel-)ComputePixelNumberWithinMicroTileDepth{)HwlGetMaxCmaskBlockMax;)HwlInitGlobalParams?)HwlConvertChipFamily-)HwlComputeXmaskCoordYFrom8Pipe |)IsBankSwappedTileMode })ComputeMacroTileAspectRatio |)IsThickMacroTiled ~)GetTileType!)IsDualPitchAlignNeeded)IsDualBaseAlignNeeded#)ComputeSurfaceTileSlices$)ComputeSurfaceRotationFromTileModeP)GetBankPipeSwizzleR)ExtractBankPipeSwizzleT)ComputeSliceTileSwizzle uHm_swapSize uLm_splitSize)~R600AddrLib)operator=)__vecDelDtor2G&)PR600AddrLibVR600AddrLib@@ u u u  )pipe_tiling bank_tiling % group_size )row_tiling )bank_swaps ( sample_split $backend_mapB)_gb_tiling_config_tU_gb_tiling_config_t@@COMIMAGE_FLAGS_ILONLYCOMIMAGE_FLAGS_32BITREQUIREDCOMIMAGE_FLAGS_IL_LIBRARYCOMIMAGE_FLAGS_STRONGNAMESIGNEDCOMIMAGE_FLAGS_TRACKDEBUGDATACOR_VERSION_MAJOR_V2COR_VERSION_MAJORCOR_VERSION_MINORCOR_DELETED_NAME_LENGTHCOR_VTABLEGAP_NAME_LENGTHNATIVE_TYPE_MAX_CBCOR_ILMETHOD_SECT_SMALL_MAX_DATASIZEIMAGE_COR_MIH_METHODRVAIMAGE_COR_MIH_EHRVAIMAGE_COR_MIH_BASICBLOCKCOR_VTABLE_32BITCOR_VTABLE_64BITCOR_VTABLE_FROM_UNMANAGEDCOR_VTABLE_CALL_MOST_DERIVED IMAGE_COR_EATJ_THUNK_SIZEMAX_CLASS_NAMEMAX_PACKAGE_NAMENt)ReplacesCorHdrNumericDefinesW4ReplacesCorHdrNumericDefines@@ExceptionContinueExecutionExceptionContinueSearchExceptionNestedExceptionExceptionCollidedUnwindBt)_EXCEPTION_DISPOSITIONW4_EXCEPTION_DISPOSITION@@t) ) BSA_AllSA_AssemblySA_Class SA_ConstructorSA_DelegateSA_EnumSA_EventSA_Field@SA_GenericParameterSA_Interface@SA_MethodSA_ModuleSA_ParameterSA_Property SA_ReturnValueSA_StructSA_This.t)SA_AttrTargetW4SA_AttrTarget@@JSA_NoAccessSA_ReadSA_WriteSA_ReadWrite.t)SA_AccessTypeW4SA_AccessType@@.tSA_YesNoMaybeW4SA_YesNoMaybe@@.tSA_AccessTypeW4SA_AccessType@@2 uDeref )Valid )Null ) Tainted )Access #ValidElementsConst # ValidBytesConst (ValidElements 0ValidBytes 8ValidElementsLength @ValidBytesLength #HWritableElementsConst #PWritableBytesConst XWritableElements `WritableBytes hWritableElementsLength pWritableBytesLength #xElementSizeConst ElementSize )NullTerminated )MustCheck Condition6)PostAttributeUPostAttribute@@:_PEB_FREE_BLOCKU_PEB_FREE_BLOCK@@ ) " )Next "Size:)_PEB_FREE_BLOCKU_PEB_FREE_BLOCK@@B !Length !MaximumLength !Buffer:)_UNICODE_STRINGU_UNICODE_STRING@@>_EXCEPTION_RECORDU_EXCEPTION_RECORD@@ ) ##x ExceptionCode "ExceptionFlags )ExceptionRecord ExceptionAddress "NumberParameters ) ExceptionInformation>)_EXCEPTION_RECORDU_EXCEPTION_RECORD@@R_UNWIND_HISTORY_TABLE_ENTRYU_UNWIND_HISTORY_TABLE_ENTRY@@)#f "Count  Search #LowAddress #HighAddress )EntryF)_UNWIND_HISTORY_TABLEU_UNWIND_HISTORY_TABLE@@Bt_EXCEPTION_DISPOSITIONW4_EXCEPTION_DISPOSITION@@*_CONTEXTU_CONTEXT@@ ) )))) ) b_RTL_ACTIVATION_CONTEXT_STACK_FRAMEU_RTL_ACTIVATION_CONTEXT_STACK_FRAME@@ ) 2_LIST_ENTRYU_LIST_ENTRY@@j "Flags "NextCookieSequenceNumber )ActiveFrame )FrameListCacheN) _ACTIVATION_CONTEXT_STACKU_ACTIVATION_CONTEXT_STACK@@B_EXCEPTION_POINTERSU_EXCEPTION_POINTERS@@ ) )) ) " "Flink "Blink2)LIST_ENTRY32ULIST_ENTRY32@@&_M128U_M128@@)#)# #`j !ControlWord !StatusWord  TagWord  Reserved1 !ErrorOpcode "ErrorOffset ! ErrorSelector !Reserved2 "DataOffset !DataSelector !Reserved3 "MxCsr "MxCsr_Mask ) FloatRegisters )XmmRegisters )Reserved4:)_XMM_SAVE_AREA32U_XMM_SAVE_AREA32@@:SA_NoSA_MaybeSA_Yes.t)SA_YesNoMaybeW4SA_YesNoMaybe@@>_RUNTIME_FUNCTIONU_RUNTIME_FUNCTION@@ ) 6_PEB_LDR_DATAU_PEB_LDR_DATA@@ ) f "BeginAddress "EndAddress "HandlerAddress " JumpTarget6)U@@)#* "Count )ScopeRecord2)_SCOPE_TABLEU_SCOPE_TABLE@@N_TEB_ACTIVE_FRAME_CONTEXTU_TEB_ACTIVE_FRAME_CONTEXT@@ ) ) 2 UniqueProcess UniqueThread.)_CLIENT_IDU_CLIENT_ID@@"_TEBU_TEB@@ ) > "LowPart High1Time High2Time6) _KSYSTEM_TIMEU_KSYSTEM_TIME@@"# ) " )Flink )Blink2)_LIST_ENTRYU_LIST_ENTRY@@"#: "Offset #HDC )Buffer6)_GDI_TEB_BATCHU_GDI_TEB_BATCH@@6 )ExceptionRecord )ContextRecordB)_EXCEPTION_POINTERSU_EXCEPTION_POINTERS@@2_SCOPE_TABLEU_SCOPE_TABLE@@ )  ) ) n "CallBx86Eip DeallocationCpu  UseKnownWx86Dll pOleStubInvoked:)_Wx86ThreadStateU_Wx86ThreadState@@6U@@J "LowPart HighPart )u QuadPart.)_LARGE_INTEGERT_LARGE_INTEGER@@6_KSYSTEM_TIMEU_KSYSTEM_TIME@@ )q#"#6t_NT_PRODUCT_TYPEW4_NT_PRODUCT_TYPE@@ "Rt_ALTERNATIVE_ARCHITECTURE_TYPEW4_ALTERNATIVE_ARCHITECTURE_TYPE@@ # "TickCountLowDeprecated "TickCountMultiplier )InterruptTime )SystemTime ) TimeZoneBias !,ImageNumberLow !.ImageNumberHigh )0NtSystemRoot "8MaxStackTraceDepth "<CryptoExponent "@TimeZoneId "DLargePageMinimum )HReserved2 )dNtProductType  hProductTypeIsValid "lNtMajorVersion "pNtMinorVersion 5tProcessorFeatures "Reserved1 "Reserved3 )TimeSlip )AlternativeArchitecture `SystemExpirationDate "SuiteMask  KdDebuggerEnabled )ActiveConsoleId )DismountCount "ComPlusPackage "LastSystemRITEventTickCount "NumberOfPhysicalPages  SafeBootMode "TraceLogging #Fill0 c"SystemCall ) TickCount ) TickCountQuad>$)0_KUSER_SHARED_DATAU_KUSER_SHARED_DATA@@6U@@J "LowPart "HighPart )u #QuadPart2)_ULARGE_INTEGERT_ULARGE_INTEGER@@ "Length  Initialized SsHandle )InLoadOrderModuleList ) InMemoryOrderModuleList )0InInitializationOrderModuleList @EntryInProgress6)H_PEB_LDR_DATAU_PEB_LDR_DATA@@ uDeref )Valid )Null ) Tainted )Access #ValidElementsConst # ValidBytesConst (ValidElements 0ValidBytes 8ValidElementsLength @ValidBytesLength #HWritableElementsConst #PWritableBytesConst XWritableElements `WritableBytes hWritableElementsLength pWritableBytesLength #xElementSizeConst ElementSize )NullTerminated Condition2)PreAttributeUPreAttribute@@B_DISPATCHER_CONTEXTU_DISPATCHER_CONTEXT@@ ) F_UNWIND_HISTORY_TABLEU_UNWIND_HISTORY_TABLE@@ )  #ControlPc #ImageBase )FunctionEntry #EstablisherFrame # TargetIp )(ContextRecord )0LanguageHandler 8HandlerData )@HistoryTableB )H_DISPATCHER_CONTEXTU_DISPATCHER_CONTEXT@@BStandardDesignNEC98x86EndAlternativesRt)_ALTERNATIVE_ARCHITECTURE_TYPEW4_ALTERNATIVE_ARCHITECTURE_TYPE@@R_RTL_USER_PROCESS_PARAMETERSU_RTL_USER_PROCESS_PARAMETERS@@ * F_RTL_CRITICAL_SECTIONU_RTL_CRITICAL_SECTION@@ * "# " ""#"#:_UNICODE_STRINGU_UNICODE_STRING@@J_ACTIVATION_CONTEXT_DATAU_ACTIVATION_CONTEXT_DATA@@  *  * F_ASSEMBLY_STORAGE_MAPU_ASSEMBLY_STORAGE_MAP@@  * "#  InheritedAddressSpace  ReadImageFileExecOptions  BeingDebugged  SpareBool Mutant ImageBaseAddress )Ldr * ProcessParameters (SubSystemData 0ProcessHeap *8FastPebLock @SparePtr1 HSparePtr2 "PEnvironmentUpdateCount XKernelCallbackTable *`SystemReserved *dExecuteOptions *dSpareBits )hFreeList "pTlsExpansionCounter xTlsBitmap *TlsBitmapBits ReadOnlySharedMemoryBase ReadOnlySharedMemoryHeap ReadOnlyStaticServerData AnsiCodePageData OemCodePageData UnicodeCaseTableData "NumberOfProcessors "NtGlobalFlag `CriticalSectionTimeout #HeapSegmentReserve #HeapSegmentCommit #HeapDeCommitTotalFreeThreshold #HeapDeCommitFreeBlockThreshold "NumberOfHeaps "MaximumNumberOfHeaps ProcessHeaps GdiSharedHandleTable ProcessStarterHelper "GdiDCAttributeList *LoaderLock "OSMajorVersion "OSMinorVersion ! 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@f ui6.T@sqrtf::3@A# .m128d_f64*2.__m128dU__m128d@@A Ad #i2.T@sqrt::3@_FpFormatFp32_FpFormatFp64_FpFormatFp80_FpFormatFp128_FpFormatI16_FpFormatI32_FpFormatI64_FpFormatU16_FpFormatU32 _FpFormatU64 _FpFormatBcd80 _FpFormatCompare _FpFormatString2 t/_FPIEEE_FORMATW4_FPIEEE_FORMAT@@ *W./_U32ARRAYU_U32ARRAY@@ *W"/_U64U_U64@@&/_FP128U_FP128@@ u J_FPIEEE_EXCEPTION_FLAGSU_FPIEEE_EXCEPTION_FLAGS@@6_FPIEEE_VALUEU_FPIEEE_VALUE@@ $ RoundingMode j!Precision /Operation /Cause /Enable / Status  /Operand1  /0Operand2  /PResult6  /p_FPIEEE_RECORDU_FPIEEE_RECORD@@r Inexact Underflow Overflow ZeroDivide InvalidOperationJ /_FPIEEE_EXCEPTION_FLAGSU_FPIEEE_EXCEPTION_FLAGS@@ +W&/_FPQ64U_FPQ64@@&_FP80U_FP80@@&_FP128U_FP128@@"_I64U_I64@@"_U64U_U64@@&_BCD80U_BCD80@@._U32ARRAYU_U32ARRAY@@&_FPQ64U_FPQ64@@Z @Fp32Value AFp64Value /Fp80Value /Fp128Value I16Value tI32Value /I64Value !U16Value uU32Value /U64Value /Bcd80Value pStringValue tCompareValue /U32ArrayValue Q64Value /Fpq64Value./T@@ u> /Value OperandValid /Format6/ _FPIEEE_VALUEU_FPIEEE_VALUE@@"/_I64U_I64@@V ttype pname Aarg1 Aarg2 A retval./(_exceptionU_exception@@!#  /W& / _BCD80U_BCD80@@& / _FP80U_FP80@@* pt#ttt@@t@ #/>.T@_handle_errorf::3@"ttpAAA#A&/u#t(/* pt#tttAAtA */>.T@_handle_error::3@# 6.T@floorf::3@6.T@floorf::7@._exceptionU_exception@@ 0/  1/t2/#" 4/lng Adbl5/_dblT_dbl@@AtA7/tAtA:/j_FpRoundNearest_FpRoundMinusInfinity_FpRoundPlusInfinity_FpRoundChopped>t/uAA#A@/ttAA#AB/ttAAA#AD/6_FPIEEE_RECORDU_FPIEEE_RECORD@@ F/ "G/#tttH/G/#ttAAJ/G/#tt@@L/uA#tN/tuAAA#AP/p/& uopcode pnameBS/U@_get_fname::2@T/#uuutV/ wP1Home wP2Home wP3Home wP4Home w Alignment w(Return w0Handler w8Establisher "@NlgCode X/DCsFramep Z/  * >HeapManager::BlockUBlock@HeapManager@@ ]/ 2HeapManagerVHeapManager@@ _/ \/e. _/`/a/ _/`/- _/`/ \/pOpNew e.pOpDelete]/Block ^/head ^/tail # blockLeftb/Constructorc/getMemoryd/Destructor2 e/(HeapManagerVHeapManager@@TOK_basedLpTOK_cdeclTOK_pascalTOK_stdcallTOK_thiscallTOK_fastcallTOK_cocallTOK_ptr64TOK_restrict TOK_unaligned TOK__last" tg/TokensW4Tokens@@`#X`#JDN_validDN_truncatedDN_invalidDN_error*tk/DNameStatusW4DNameStatus@@.ReplicatorVReplicator@@ m/ &DNameVDName@@ o/  o/p/ o/p/ o/  s/ o/p/t/*tDNameStatusW4DNameStatus@@ v/ o/p/w/p o/p/y/ o/p/ o/ |/, }/ o/p/~/ o/p/ o/p/Jq/r/u/x/z/{//// |/  to// v/o// o/p/ o/, /o/p/ po// po//] po//.// po// o/o//w/ o/o//t/ o/o// o/o//~/ o/o//*///// /o/p/~/ /o/p/w/ /o/p/t/ /o/p/ /o/p/*/////*/////.DNameNodeVDNameNode@@ /  v/ / o/p// o/p/ /DName/isValid/isEmpty/status/clearStatus/setPtrRef/isPtrRef/isUDC/setIsUDC/isUDTThunk/setIsUDTThunk/isArray/setIsArray/isNoTE/setIsNoTE/isPinPtr/setIsPinPtr/isComArray/setIsComArray/isVCallThunk/setIsVCallThunk/length/getLastChar/getString/dbGetString/operator+/operator+=/operator|=/operator= /node /stat isIndir isAUDC isAUDTThunk isArrayType NoTE pinPtr comArray vcallThunk/append/doPchar&>&/DNameVDName@@*charNodeVcharNode@@ /  / /, / /// //// /  t// p// p//] /, ////~/ pme/charNode/length/getLastChar/getString/operator=*&/charNodeVcharNode@@.pcharNodeVpcharNode@@ /  / /, / /// //// /  t// p// p//] /, ///// pme tmyLen/pcharNode/length/getLastChar/getString/operator=. &/pcharNodeVpcharNode@@2UnDecoratorVUnDecorator@@ /  / /, / /// o//00 o///00 o/// o// t/ o//~/ o//t/}/p}/t o/// / /]t o///}/}/p o///}/t o///}/}/ o/// o//.pt[/" ///"tTokensW4Tokens@@ / // p///operator= m/ArgListn/pArgList m/XZNameListn/pZNameListn/pTemplateArgListgNamenamepoutputStringtmaxStringLength"disableFlags0fExplicitTemplateParams0fGetTemplateArgumentList /getDecoratedName /getSymbolName /getZName /getOperatorName /getScope /getScopedName /getSignedDimension /getDimension /getNumberOfDimensions /getTemplateName /getTemplateArgumentList /getTemplateConstant /composeDeclaration /getTypeEncoding /getBasedType /getECSUName /getEnumType /getCallingConvention /getReturnType /getDataType /getPrimaryDataType/getDataIndirectType /getExtendedDataIndirectType /getBasicDataType /getECSUDataType /getPtrRefType /getPtrRefDataType /getArrayType /getFunctionIndirectType /getArgumentTypes /getArgumentList /getThrowTypes /getLexicalFrame /getStorageConvention /getThisType /getPointerType /getPointerTypeArray /getReferenceType /getExternalDataType /getSegmentName /getDisplacement /getCallIndex /getGuardNumber /getVfTableType /getVbTableType /getVdispMapType /getVCallThunkType /getStringEncoding[/m_pGetParameter/UnDecorator /doUnderScore /doMSKeywords /doPtr64 /doFunctionReturns /doAllocationModel /doAllocationLanguage /doThisTypes /doAccessSpecifiers /doThrowTypes /doMemberTypes /doReturnUDTModel /do32BitNear /doNameOnly /doTypeOnly /haveTemplateParameters /doEcsu /doNoIdentCharCheck /doEllipsis /UScore/operator char *2Tf/UnDecoratorVUnDecorator@@ m/  m/ /, / m///s/#P m// /  tm// m/, /m//~/ o/m///operator= tindex /dNameBuffer/Replicator/isFull/operator+=/operator[].&/XReplicatorVReplicator@@.pDNameNodeVpDNameNode@@ /  / /, / /// //t/// /  t// p// p//] /, 0///~/ s/me/pDNameNode/length/getLastChar/getString0operator=.&0pDNameNodeVpDNameNode@@*pairNodeVpairNode@@ 0  0 0, 0 000// 00 0 0 0 0  t0 0 p0 0 p0 0] 0, 0000/ /left /right tmyLen 0pairNode0length0getLastChar0getString0operator=* &0 pairNodeVpairNode@@:DNameStatusNodeVDNameStatusNode@@ 0  0 0, 0 000 00w/00 0  00w/ 0  t00 p00 p00] 0, #0000/ v/me t myLen0DNameStatusNode 0make 0length!0getLastChar"0getString$0operator=: &%0DNameStatusNodeVDNameStatusNode@@ /  / (0, )0 /'0*0 /'0+0,0 (0  t/.0 p/.0 p/.0] /, 20/'0*0v -0DNameNode/0length00getLastChar10getString30operator=.&40DNameNodeVDNameNode@@ ]/  ]/606 ^/next N+memBlock70Block> 80HeapManager::BlockUBlock@HeapManager@@pt\/e.!p:0"pt\/e.[/"p<0p#Pp#d _/,#@0tA0p}/o/C0v/}/o/E0}/o/G0ppptpI00#@upuM0u$+n uattributes tpmfnUnwind tpForwardCompat t pCatchableTypeArray2P0_s_ThrowInfoU_s_ThrowInfo@@VEHExceptionRecord::EHParametersUEHParameters@EHExceptionRecord@@ "ExceptionCode "ExceptionFlags )ExceptionRecord ExceptionAddress "NumberParametersR0EHParameters R0 params>S0@EHExceptionRecordUEHExceptionRecord@@2_s_ThrowInfoU_s_ThrowInfo@@ U0 V0 j "magicNumber pExceptionObject W0pThrowInfo pThrowImageBaseVX0 EHExceptionRecord::EHParametersUEHParameters@EHExceptionRecord@@#te.Z0t+>EHExceptionRecordUEHExceptionRecord@@ ]0 #te.e._0u)a0 b0  u  d0magicNumber 4!bbtFlags tmaxState tdispUnwindMap u nTryBlocks tdispTryBlockMap unIPMapEntries tdispIPtoStateMap tdispUwindHelp t dispESTypeList t$EHFlags2 e0(_s_FuncInfoU_s_FuncInfo@@ ControlPc ImageBase )FunctionEntry #EstablisherFrame # TargetIp )(ContextRecord 0LanguageHandler 8HandlerData @HistoryTableB g0H_xDISPATCHER_CONTEXTU_xDISPATCHER_CONTEXT@@n ttryLow ttryHigh tcatchHigh t nCatches tdispHandlerArrayBi0_s_TryBlockMapEntryU_s_TryBlockMapEntry@@r uadjectives tdispType tdispCatchObj t dispOfHandler tdispFrame6k0_s_HandlerTypeU_s_HandlerType@@.FrameInfoUFrameInfo@@ m0 . pExceptionObject n0pNext.o0FrameInfoUFrameInfo@@B_xDISPATCHER_CONTEXTU_xDISPATCHER_CONTEXT@@ q0 2_s_FuncInfoU_s_FuncInfo@@ s0 t0 #r0u0##v06_s_HandlerTypeU_s_HandlerType@@ x0 y0 B_s_TryBlockMapEntryU_s_TryBlockMapEntry@@ {0 |0 ))~0r0u0t0u0t}00#r0u00^0#)r0)0")^0#)r0u0tt0"^0#)r0u0"#t0"#u0ttuur0}00n0n00 n00* #^0)#tu0r0  0" tIp tState>0IptoStateMapEntryUIptoStateMapEntry@@u0r0t0>IptoStateMapEntryUIptoStateMapEntry@@ 0 u0r0t0t0#r0u0t0 * tt@ 0t0 ~type_infooperator==operator!=beforenameraw_name _m_data _m_d_nametype_infooperator= _Name_base _Type_info_dtor _Name_base_internal _Type_info_dtor_internal_type_info_dtor_internal_method_name_internal_method__vecDelDtor.&02type_infoVtype_info@@pt!0p#6 *pVFTable spare 0nameZ0,$_TypeDescriptor$_extraBytes_28U$_TypeDescriptor$_extraBytes_28@@6_s__ThrowInfoU_s__ThrowInfo@@ 0 0 00^0 0 0 . tnCount tdispTypeArray60_s_ESTypeListU_s_ESTypeList@@"PMDUPMD@@v uproperties tpType 0thisDisplacement tsizeOrOffset tcopyFunction:0_s_CatchableTypeU_s_CatchableType@@"D PMDUPMD@@* ttoState taction>0_s_UnwindMapEntryU_s_UnwindMapEntry@@> tnCatchableTypes ,arrayOfCatchableTypesF0_s_CatchableTypeArrayU_s_CatchableTypeArray@@6,TypeDescriptorUTypeDescriptor@@&^0#)r0u0t# )0&^0#)r0u0 t#06_s_ESTypeListU_s_ESTypeList@@ 0 0 :_s_CatchableTypeU_s_CatchableType@@ 0 0 &^0#)r0u0tt#0z00W0t06 ^0#)r0u0z00}0t#  0 )0 ^00)^0tt0^0z00t00 0 0,000tt0tj ^0  ) e.0 [0 0#te.0^00 0 0 0)t0_RTC_CHKSTK_RTC_CVRT_LOSS_INFO_RTC_CORRUPT_STACK_RTC_UNINIT_LOCAL_USE_RTC_CORRUPTED_ALLOCA_RTC_ILLEGAL6t0_RTC_ErrorNumberW4_RTC_ErrorNumber@@t#6t_RTC_ErrorNumberW4_RTC_ErrorNumber@@ 000tt0 j*j*0 g*g*0j*6g*6:_RTC_ALLOCA_NODEU_RTC_ALLOCA_NODE@@ 0 R tguard1 0next # allocaSize Q+guard2:0 _RTC_ALLOCA_NODEU_RTC_ALLOCA_NODE@@2_RTC_vardescU_RTC_vardesc@@ 0 * tvarCount 1variables61_RTC_framedescU_RTC_framedesc@@2 taddr tsize pname21_RTC_vardescU_RTC_vardesc@@6_RTC_framedescU_RTC_framedesc@@ 1 11 0 0# 1 110 1 S_COMPILES_REGISTER_16tS_CONSTANT_16tS_UDT_16tS_SSEARCHS_ENDS_SKIPS_CVRESERVE S_OBJNAME_ST S_ENDARG S_COBOLUDT_16t S_MANYREG_16t S_RETURNS_ENTRYTHISS_BPREL16S_LDATA16S_GDATA16S_PUB16S_LPROC16S_GPROC16S_THUNK16S_BLOCK16S_WITH16 S_LABEL16 S_CEXMODEL16 S_VFTABLE16 S_REGREL16S_BPREL32_16tS_LDATA32_16tS_GDATA32_16tS_PUB32_16tS_LPROC32_16tS_GPROC32_16tS_THUNK32_STS_BLOCK32_STS_WITH32_ST S_LABEL32_ST S_CEXMODEL32 S_VFTABLE32_16t S_REGREL32_16t S_LTHREAD32_16tS_GTHREAD32_16tS_SLINK32S_LPROCMIPS_16tS_GPROCMIPS_16tS_PROCREF_STS_DATAREF_STS_ALIGNS_LPROCREF_STS_OEMS_TI16_MAXS_REGISTER_STS_CONSTANT_STS_UDT_STS_COBOLUDT_STS_MANYREG_STS_BPREL32_STS_LDATA32_STS_GDATA32_ST S_PUB32_ST S_LPROC32_ST S_GPROC32_ST S_VFTABLE32 S_REGREL32_STS_LTHREAD32_STS_GTHREAD32_STS_LPROCMIPS_STS_GPROCMIPS_STS_FRAMEPROCS_COMPILE2_STS_MANYREG2_STS_LPROCIA64_STS_GPROCIA64_STS_LOCALSLOT_STS_PARAMSLOT_STS_ANNOTATIONS_GMANPROC_STS_LMANPROC_STS_RESERVED1S_RESERVED2S_RESERVED3S_RESERVED4 S_LMANDATA_ST!S_GMANDATA_ST"S_MANFRAMEREL_ST#S_MANREGISTER_ST$S_MANSLOT_ST%S_MANMANYREG_ST&S_MANREGREL_ST'S_MANMANYREG2_ST(S_MANTYPREF)S_UNAMESPACE_STS_ST_MAXS_OBJNAMES_THUNK32S_BLOCK32S_WITH32S_LABEL32S_REGISTERS_CONSTANTS_UDT S_COBOLUDT S_MANYREG S_BPREL32 S_LDATA32 S_GDATA32S_PUB32S_LPROC32S_GPROC32S_REGREL32S_LTHREAD32S_GTHREAD32S_LPROCMIPSS_GPROCMIPSS_COMPILE2S_MANYREG2S_LPROCIA64S_GPROCIA64S_LOCALSLOTS_SLOTS_PARAMSLOTS_LMANDATAS_GMANDATAS_MANFRAMERELS_MANREGISTER S_MANSLOT!S_MANMANYREG"S_MANREGREL#S_MANMANYREG2$S_UNAMESPACE%S_PROCREF&S_DATAREF'S_LPROCREF(S_ANNOTATIONREF)S_TOKENREF*S_GMANPROC+S_LMANPROC,S_TRAMPOLINE-S_MANCONSTANT.S_ATTR_FRAMEREL/S_ATTR_REGISTER0S_ATTR_REGREL1S_ATTR_MANYREG2S_SEPCODE3S_LOCAL4S_DEFRANGE5S_DEFRANGE26S_SECTION7S_COFFGROUP8S_EXPORT9S_CALLSITEINFO:S_FRAMECOOKIE;S_DISCARDED<S_COMPILE3=S_ENVBLOCK>S_RECTYPE_MAX=S_RECTYPE_LAST>S_RECTYPE_PAD*t1SYM_ENUM_eW4SYM_ENUM_e@@:vdbOnevdbXdataCurvdbPdataCur*t1VerDataBlobW4VerDataBlob@@2vliOnevliTwovliCur*t1VerLinkInfoW4VerLinkInfo@@0uCV_ALLREG_ERR1uCV_ALLREG_TEB2uCV_ALLREG_TIMER3uCV_ALLREG_EFAD14uCV_ALLREG_EFAD25uCV_ALLREG_EFAD36uCV_ALLREG_VFRAME7uCV_ALLREG_HANDLE8uCV_ALLREG_PARAMS9uCV_ALLREG_LOCALS:uCV_ALLREG_TID;uCV_ALLREG_ENVCV_R68_TT1@CV_R68_BAD0ACV_R68_BAD1BCV_R68_BAD2CCV_R68_BAD3DCV_R68_BAD4ECV_R68_BAD5FCV_R68_BAD6GCV_R68_BAD7HCV_R68_BAC0ICV_R68_BAC1JCV_R68_BAC2KCV_R68_BAC3LCV_R68_BAC4MCV_R68_BAC5NCV_R68_BAC6OCV_R68_BAC7CV_M4_NOREG CV_M4_IntZERO CV_M4_IntAT CV_M4_IntV0 CV_M4_IntV1CV_M4_IntA0CV_M4_IntA1CV_M4_IntA2CV_M4_IntA3CV_M4_IntT0CV_M4_IntT1CV_M4_IntT2CV_M4_IntT3CV_M4_IntT4CV_M4_IntT5CV_M4_IntT6CV_M4_IntT7CV_M4_IntS0CV_M4_IntS1CV_M4_IntS2CV_M4_IntS3CV_M4_IntS4CV_M4_IntS5 CV_M4_IntS6!CV_M4_IntS7"CV_M4_IntT8#CV_M4_IntT9$CV_M4_IntKT0%CV_M4_IntKT1&CV_M4_IntGP'CV_M4_IntSP(CV_M4_IntS8)CV_M4_IntRA*CV_M4_IntLO+CV_M4_IntHI2CV_M4_Fir3CV_M4_Psr<CV_M4_FltF0=CV_M4_FltF1>CV_M4_FltF2?CV_M4_FltF3@CV_M4_FltF4ACV_M4_FltF5BCV_M4_FltF6CCV_M4_FltF7DCV_M4_FltF8ECV_M4_FltF9FCV_M4_FltF10GCV_M4_FltF11HCV_M4_FltF12ICV_M4_FltF13JCV_M4_FltF14KCV_M4_FltF15LCV_M4_FltF16MCV_M4_FltF17NCV_M4_FltF18OCV_M4_FltF19PCV_M4_FltF20QCV_M4_FltF21RCV_M4_FltF22SCV_M4_FltF23TCV_M4_FltF24UCV_M4_FltF25VCV_M4_FltF26WCV_M4_FltF27XCV_M4_FltF28YCV_M4_FltF29ZCV_M4_FltF30[CV_M4_FltF31\CV_M4_FltFsrCV_ALPHA_NOREG CV_ALPHA_FltF0 CV_ALPHA_FltF1 CV_ALPHA_FltF2 CV_ALPHA_FltF3CV_ALPHA_FltF4CV_ALPHA_FltF5CV_ALPHA_FltF6CV_ALPHA_FltF7CV_ALPHA_FltF8CV_ALPHA_FltF9CV_ALPHA_FltF10CV_ALPHA_FltF11CV_ALPHA_FltF12CV_ALPHA_FltF13CV_ALPHA_FltF14CV_ALPHA_FltF15CV_ALPHA_FltF16CV_ALPHA_FltF17CV_ALPHA_FltF18CV_ALPHA_FltF19CV_ALPHA_FltF20CV_ALPHA_FltF21 CV_ALPHA_FltF22!CV_ALPHA_FltF23"CV_ALPHA_FltF24#CV_ALPHA_FltF25$CV_ALPHA_FltF26%CV_ALPHA_FltF27&CV_ALPHA_FltF28'CV_ALPHA_FltF29(CV_ALPHA_FltF30)CV_ALPHA_FltF31*CV_ALPHA_IntV0+CV_ALPHA_IntT0,CV_ALPHA_IntT1-CV_ALPHA_IntT2.CV_ALPHA_IntT3/CV_ALPHA_IntT40CV_ALPHA_IntT51CV_ALPHA_IntT62CV_ALPHA_IntT73CV_ALPHA_IntS04CV_ALPHA_IntS15CV_ALPHA_IntS26CV_ALPHA_IntS37CV_ALPHA_IntS48CV_ALPHA_IntS59CV_ALPHA_IntFP:CV_ALPHA_IntA0;CV_ALPHA_IntA1<CV_ALPHA_IntA2=CV_ALPHA_IntA3>CV_ALPHA_IntA4?CV_ALPHA_IntA5@CV_ALPHA_IntT8ACV_ALPHA_IntT9BCV_ALPHA_IntT10CCV_ALPHA_IntT11DCV_ALPHA_IntRAECV_ALPHA_IntT12FCV_ALPHA_IntATGCV_ALPHA_IntGPHCV_ALPHA_IntSPICV_ALPHA_IntZEROJCV_ALPHA_FpcrKCV_ALPHA_FirLCV_ALPHA_PsrMCV_ALPHA_FltFsrNCV_ALPHA_SoftFpcrCV_PPC_GPR0CV_PPC_GPR1CV_PPC_GPR2CV_PPC_GPR3CV_PPC_GPR4CV_PPC_GPR5CV_PPC_GPR6CV_PPC_GPR7 CV_PPC_GPR8 CV_PPC_GPR9 CV_PPC_GPR10 CV_PPC_GPR11 CV_PPC_GPR12CV_PPC_GPR13CV_PPC_GPR14CV_PPC_GPR15CV_PPC_GPR16CV_PPC_GPR17CV_PPC_GPR18CV_PPC_GPR19CV_PPC_GPR20CV_PPC_GPR21CV_PPC_GPR22CV_PPC_GPR23CV_PPC_GPR24CV_PPC_GPR25CV_PPC_GPR26CV_PPC_GPR27CV_PPC_GPR28CV_PPC_GPR29CV_PPC_GPR30 CV_PPC_GPR31!CV_PPC_CR"CV_PPC_CR0#CV_PPC_CR1$CV_PPC_CR2%CV_PPC_CR3&CV_PPC_CR4'CV_PPC_CR5(CV_PPC_CR6)CV_PPC_CR7*CV_PPC_FPR0+CV_PPC_FPR1,CV_PPC_FPR2-CV_PPC_FPR3.CV_PPC_FPR4/CV_PPC_FPR50CV_PPC_FPR61CV_PPC_FPR72CV_PPC_FPR83CV_PPC_FPR94CV_PPC_FPR105CV_PPC_FPR116CV_PPC_FPR127CV_PPC_FPR138CV_PPC_FPR149CV_PPC_FPR15:CV_PPC_FPR16;CV_PPC_FPR17<CV_PPC_FPR18=CV_PPC_FPR19>CV_PPC_FPR20?CV_PPC_FPR21@CV_PPC_FPR22ACV_PPC_FPR23BCV_PPC_FPR24CCV_PPC_FPR25DCV_PPC_FPR26ECV_PPC_FPR27FCV_PPC_FPR28GCV_PPC_FPR29HCV_PPC_FPR30ICV_PPC_FPR31JCV_PPC_FPSCRKCV_PPC_MSRLCV_PPC_SR0MCV_PPC_SR1NCV_PPC_SR2OCV_PPC_SR3PCV_PPC_SR4QCV_PPC_SR5RCV_PPC_SR6SCV_PPC_SR7TCV_PPC_SR8UCV_PPC_SR9VCV_PPC_SR10WCV_PPC_SR11XCV_PPC_SR12YCV_PPC_SR13ZCV_PPC_SR14[CV_PPC_SR15cCV_PPC_PCdCV_PPC_MQeCV_PPC_XERhCV_PPC_RTCUiCV_PPC_RTCLlCV_PPC_LRmCV_PPC_CTRnCV_PPC_COMPAREoCV_PPC_COUNTvCV_PPC_DSISRwCV_PPC_DARzCV_PPC_DEC}CV_PPC_SDR1~CV_PPC_SRR0CV_PPC_SRR1tCV_PPC_SPRG0uCV_PPC_SPRG1vCV_PPC_SPRG2wCV_PPC_SPRG3CV_PPC_ASR~CV_PPC_EARCV_PPC_PVRtCV_PPC_BAT0UuCV_PPC_BAT0LvCV_PPC_BAT1UwCV_PPC_BAT1LxCV_PPC_BAT2UyCV_PPC_BAT2LzCV_PPC_BAT3U{CV_PPC_BAT3L|CV_PPC_DBAT0U}CV_PPC_DBAT0L~CV_PPC_DBAT1UCV_PPC_DBAT1LCV_PPC_DBAT2UCV_PPC_DBAT2LCV_PPC_DBAT3UCV_PPC_DBAT3LCV_PPC_PMR0CV_PPC_PMR1CV_PPC_PMR2CV_PPC_PMR3CV_PPC_PMR4CV_PPC_PMR5CV_PPC_PMR6CV_PPC_PMR7CV_PPC_PMR8CV_PPC_PMR9CV_PPC_PMR10CV_PPC_PMR11 CV_PPC_PMR12!CV_PPC_PMR13"CV_PPC_PMR14#CV_PPC_PMR154CV_PPC_DMISS5CV_PPC_DCMP6CV_PPC_HASH17CV_PPC_HASH28CV_PPC_IMISS9CV_PPC_ICMP:CV_PPC_RPATCV_PPC_HID0UCV_PPC_HID1VCV_PPC_HID2WCV_PPC_HID3XCV_PPC_HID4YCV_PPC_HID5ZCV_PPC_HID6[CV_PPC_HID7\CV_PPC_HID8]CV_PPC_HID9^CV_PPC_HID10_CV_PPC_HID11`CV_PPC_HID12aCV_PPC_HID13bCV_PPC_HID14cCV_PPC_HID15CV_JAVA_PCCV_SH3_NOREG CV_SH3_IntR0 CV_SH3_IntR1 CV_SH3_IntR2 CV_SH3_IntR3CV_SH3_IntR4CV_SH3_IntR5CV_SH3_IntR6CV_SH3_IntR7CV_SH3_IntR8CV_SH3_IntR9CV_SH3_IntR10CV_SH3_IntR11CV_SH3_IntR12CV_SH3_IntR13CV_SH3_IntFpCV_SH3_IntSp&CV_SH3_Gbr'CV_SH3_Pr(CV_SH3_Mach)CV_SH3_Macl2CV_SH3_Pc3CV_SH3_Sr<CV_SH3_BarA=CV_SH3_BasrA>CV_SH3_BamrA?CV_SH3_BbrA@CV_SH3_BarBACV_SH3_BasrBBCV_SH3_BamrBCCV_SH3_BbrBDCV_SH3_BdrBECV_SH3_BdmrBFCV_SH3_BrcrKCV_SH_FpscrLCV_SH_FpulPCV_SH_FpR0QCV_SH_FpR1RCV_SH_FpR2SCV_SH_FpR3TCV_SH_FpR4UCV_SH_FpR5VCV_SH_FpR6WCV_SH_FpR7XCV_SH_FpR8YCV_SH_FpR9ZCV_SH_FpR10[CV_SH_FpR11\CV_SH_FpR12]CV_SH_FpR13^CV_SH_FpR14_CV_SH_FpR15`CV_SH_XFpR0aCV_SH_XFpR1bCV_SH_XFpR2cCV_SH_XFpR3dCV_SH_XFpR4eCV_SH_XFpR5fCV_SH_XFpR6gCV_SH_XFpR7hCV_SH_XFpR8iCV_SH_XFpR9jCV_SH_XFpR10kCV_SH_XFpR11lCV_SH_XFpR12mCV_SH_XFpR13nCV_SH_XFpR14oCV_SH_XFpR15CV_ARM_NOREG CV_ARM_R0 CV_ARM_R1 CV_ARM_R2 CV_ARM_R3CV_ARM_R4CV_ARM_R5CV_ARM_R6CV_ARM_R7CV_ARM_R8CV_ARM_R9CV_ARM_R10CV_ARM_R11CV_ARM_R12CV_ARM_SPCV_ARM_LRCV_ARM_PCCV_ARM_CPSRCV_IA64_NOREGCV_IA64_Br0CV_IA64_Br1CV_IA64_Br2CV_IA64_Br3CV_IA64_Br4CV_IA64_Br5CV_IA64_Br6CV_IA64_Br7CV_IA64_P0CV_IA64_P1CV_IA64_P2CV_IA64_P3CV_IA64_P4CV_IA64_P5CV_IA64_P6CV_IA64_P7CV_IA64_P8CV_IA64_P9CV_IA64_P10CV_IA64_P11CV_IA64_P12CV_IA64_P13CV_IA64_P14CV_IA64_P15CV_IA64_P16CV_IA64_P17CV_IA64_P18CV_IA64_P19CV_IA64_P20CV_IA64_P21CV_IA64_P22CV_IA64_P23CV_IA64_P24CV_IA64_P25CV_IA64_P26CV_IA64_P27CV_IA64_P28CV_IA64_P29CV_IA64_P30CV_IA64_P31CV_IA64_P32CV_IA64_P33CV_IA64_P34CV_IA64_P35CV_IA64_P36CV_IA64_P37CV_IA64_P38CV_IA64_P39CV_IA64_P40CV_IA64_P41CV_IA64_P42CV_IA64_P43CV_IA64_P44CV_IA64_P45CV_IA64_P46CV_IA64_P47CV_IA64_P48CV_IA64_P49CV_IA64_P50CV_IA64_P51CV_IA64_P52CV_IA64_P53CV_IA64_P54CV_IA64_P55CV_IA64_P56CV_IA64_P57CV_IA64_P58CV_IA64_P59CV_IA64_P60CV_IA64_P61CV_IA64_P62CV_IA64_P63CV_IA64_Preds@CV_IA64_IntH0ACV_IA64_IntH1BCV_IA64_IntH2CCV_IA64_IntH3DCV_IA64_IntH4ECV_IA64_IntH5FCV_IA64_IntH6GCV_IA64_IntH7HCV_IA64_IntH8ICV_IA64_IntH9JCV_IA64_IntH10KCV_IA64_IntH11LCV_IA64_IntH12MCV_IA64_IntH13NCV_IA64_IntH14OCV_IA64_IntH15CV_IA64_IpCV_IA64_UmaskCV_IA64_CfmCV_IA64_PsrCV_IA64_NatsCV_IA64_Nats2CV_IA64_Nats3CV_IA64_IntR0CV_IA64_IntR1CV_IA64_IntR2CV_IA64_IntR3CV_IA64_IntR4CV_IA64_IntR5CV_IA64_IntR6CV_IA64_IntR7CV_IA64_IntR8 CV_IA64_IntR9 CV_IA64_IntR10 CV_IA64_IntR11 CV_IA64_IntR12 CV_IA64_IntR13CV_IA64_IntR14CV_IA64_IntR15CV_IA64_IntR16CV_IA64_IntR17CV_IA64_IntR18CV_IA64_IntR19CV_IA64_IntR20CV_IA64_IntR21CV_IA64_IntR22CV_IA64_IntR23CV_IA64_IntR24CV_IA64_IntR25CV_IA64_IntR26CV_IA64_IntR27CV_IA64_IntR28CV_IA64_IntR29CV_IA64_IntR30CV_IA64_IntR31 CV_IA64_IntR32!CV_IA64_IntR33"CV_IA64_IntR34#CV_IA64_IntR35$CV_IA64_IntR36%CV_IA64_IntR37&CV_IA64_IntR38'CV_IA64_IntR39(CV_IA64_IntR40)CV_IA64_IntR41*CV_IA64_IntR42+CV_IA64_IntR43,CV_IA64_IntR44-CV_IA64_IntR45.CV_IA64_IntR46/CV_IA64_IntR470CV_IA64_IntR481CV_IA64_IntR492CV_IA64_IntR503CV_IA64_IntR514CV_IA64_IntR525CV_IA64_IntR536CV_IA64_IntR547CV_IA64_IntR558CV_IA64_IntR569CV_IA64_IntR57:CV_IA64_IntR58;CV_IA64_IntR59<CV_IA64_IntR60=CV_IA64_IntR61>CV_IA64_IntR62?CV_IA64_IntR63@CV_IA64_IntR64ACV_IA64_IntR65BCV_IA64_IntR66CCV_IA64_IntR67DCV_IA64_IntR68ECV_IA64_IntR69FCV_IA64_IntR70GCV_IA64_IntR71HCV_IA64_IntR72ICV_IA64_IntR73JCV_IA64_IntR74KCV_IA64_IntR75LCV_IA64_IntR76MCV_IA64_IntR77NCV_IA64_IntR78OCV_IA64_IntR79PCV_IA64_IntR80QCV_IA64_IntR81RCV_IA64_IntR82SCV_IA64_IntR83TCV_IA64_IntR84UCV_IA64_IntR85VCV_IA64_IntR86WCV_IA64_IntR87XCV_IA64_IntR88YCV_IA64_IntR89ZCV_IA64_IntR90[CV_IA64_IntR91\CV_IA64_IntR92]CV_IA64_IntR93^CV_IA64_IntR94_CV_IA64_IntR95`CV_IA64_IntR96aCV_IA64_IntR97bCV_IA64_IntR98cCV_IA64_IntR99dCV_IA64_IntR100eCV_IA64_IntR101fCV_IA64_IntR102gCV_IA64_IntR103hCV_IA64_IntR104iCV_IA64_IntR105jCV_IA64_IntR106kCV_IA64_IntR107lCV_IA64_IntR108mCV_IA64_IntR109nCV_IA64_IntR110oCV_IA64_IntR111pCV_IA64_IntR112qCV_IA64_IntR113rCV_IA64_IntR114sCV_IA64_IntR115tCV_IA64_IntR116uCV_IA64_IntR117vCV_IA64_IntR118wCV_IA64_IntR119xCV_IA64_IntR120yCV_IA64_IntR121zCV_IA64_IntR122{CV_IA64_IntR123|CV_IA64_IntR124}CV_IA64_IntR125~CV_IA64_IntR126CV_IA64_IntR127CV_IA64_FltF0CV_IA64_FltF1CV_IA64_FltF2CV_IA64_FltF3CV_IA64_FltF4CV_IA64_FltF5CV_IA64_FltF6CV_IA64_FltF7CV_IA64_FltF8 CV_IA64_FltF9 CV_IA64_FltF10 CV_IA64_FltF11 CV_IA64_FltF12 CV_IA64_FltF13CV_IA64_FltF14CV_IA64_FltF15CV_IA64_FltF16CV_IA64_FltF17CV_IA64_FltF18CV_IA64_FltF19CV_IA64_FltF20CV_IA64_FltF21CV_IA64_FltF22CV_IA64_FltF23CV_IA64_FltF24CV_IA64_FltF25CV_IA64_FltF26CV_IA64_FltF27CV_IA64_FltF28CV_IA64_FltF29CV_IA64_FltF30CV_IA64_FltF31 CV_IA64_FltF32!CV_IA64_FltF33"CV_IA64_FltF34#CV_IA64_FltF35$CV_IA64_FltF36%CV_IA64_FltF37&CV_IA64_FltF38'CV_IA64_FltF39(CV_IA64_FltF40)CV_IA64_FltF41*CV_IA64_FltF42+CV_IA64_FltF43,CV_IA64_FltF44-CV_IA64_FltF45.CV_IA64_FltF46/CV_IA64_FltF470CV_IA64_FltF481CV_IA64_FltF492CV_IA64_FltF503CV_IA64_FltF514CV_IA64_FltF525CV_IA64_FltF536CV_IA64_FltF547CV_IA64_FltF558CV_IA64_FltF569CV_IA64_FltF57:CV_IA64_FltF58;CV_IA64_FltF59<CV_IA64_FltF60=CV_IA64_FltF61>CV_IA64_FltF62?CV_IA64_FltF63@CV_IA64_FltF64ACV_IA64_FltF65BCV_IA64_FltF66CCV_IA64_FltF67DCV_IA64_FltF68ECV_IA64_FltF69FCV_IA64_FltF70GCV_IA64_FltF71HCV_IA64_FltF72ICV_IA64_FltF73JCV_IA64_FltF74KCV_IA64_FltF75LCV_IA64_FltF76MCV_IA64_FltF77NCV_IA64_FltF78OCV_IA64_FltF79PCV_IA64_FltF80QCV_IA64_FltF81RCV_IA64_FltF82SCV_IA64_FltF83TCV_IA64_FltF84UCV_IA64_FltF85VCV_IA64_FltF86WCV_IA64_FltF87XCV_IA64_FltF88YCV_IA64_FltF89ZCV_IA64_FltF90[CV_IA64_FltF91\CV_IA64_FltF92]CV_IA64_FltF93^CV_IA64_FltF94_CV_IA64_FltF95`CV_IA64_FltF96aCV_IA64_FltF97bCV_IA64_FltF98cCV_IA64_FltF99dCV_IA64_FltF100eCV_IA64_FltF101fCV_IA64_FltF102gCV_IA64_FltF103hCV_IA64_FltF104iCV_IA64_FltF105jCV_IA64_FltF106kCV_IA64_FltF107lCV_IA64_FltF108mCV_IA64_FltF109nCV_IA64_FltF110oCV_IA64_FltF111pCV_IA64_FltF112qCV_IA64_FltF113rCV_IA64_FltF114sCV_IA64_FltF115tCV_IA64_FltF116uCV_IA64_FltF117vCV_IA64_FltF118wCV_IA64_FltF119xCV_IA64_FltF120yCV_IA64_FltF121zCV_IA64_FltF122{CV_IA64_FltF123|CV_IA64_FltF124}CV_IA64_FltF125~CV_IA64_FltF126CV_IA64_FltF127 CV_IA64_ApKR0 CV_IA64_ApKR1 CV_IA64_ApKR2 CV_IA64_ApKR3 CV_IA64_ApKR4 CV_IA64_ApKR5 CV_IA64_ApKR6 CV_IA64_ApKR7 CV_IA64_AR8 CV_IA64_AR9 CV_IA64_AR10 CV_IA64_AR11 CV_IA64_AR12 CV_IA64_AR13 CV_IA64_AR14 CV_IA64_AR15 CV_IA64_RsRSC CV_IA64_RsBSP CV_IA64_RsBSPSTORE CV_IA64_RsRNAT CV_IA64_AR20 CV_IA64_StFCR CV_IA64_AR22 CV_IA64_AR23 CV_IA64_EFLAG CV_IA64_CSD CV_IA64_SSD CV_IA64_CFLG CV_IA64_StFSR CV_IA64_StFIR CV_IA64_StFDR CV_IA64_AR31 CV_IA64_ApCCV! CV_IA64_AR33" CV_IA64_AR34# CV_IA64_AR35$ CV_IA64_ApUNAT% CV_IA64_AR37& CV_IA64_AR38' CV_IA64_AR39( CV_IA64_StFPSR) CV_IA64_AR41* CV_IA64_AR42+ CV_IA64_AR43, CV_IA64_ApITC- CV_IA64_AR45. CV_IA64_AR46/ CV_IA64_AR470 CV_IA64_AR481 CV_IA64_AR492 CV_IA64_AR503 CV_IA64_AR514 CV_IA64_AR525 CV_IA64_AR536 CV_IA64_AR547 CV_IA64_AR558 CV_IA64_AR569 CV_IA64_AR57: CV_IA64_AR58; CV_IA64_AR59< CV_IA64_AR60= CV_IA64_AR61> CV_IA64_AR62? CV_IA64_AR63@ CV_IA64_RsPFSA CV_IA64_ApLCB CV_IA64_ApECC CV_IA64_AR67D CV_IA64_AR68E CV_IA64_AR69F CV_IA64_AR70G CV_IA64_AR71H CV_IA64_AR72I CV_IA64_AR73J CV_IA64_AR74K CV_IA64_AR75L CV_IA64_AR76M CV_IA64_AR77N CV_IA64_AR78O CV_IA64_AR79P CV_IA64_AR80Q CV_IA64_AR81R CV_IA64_AR82S CV_IA64_AR83T CV_IA64_AR84U CV_IA64_AR85V CV_IA64_AR86W CV_IA64_AR87X CV_IA64_AR88Y CV_IA64_AR89Z CV_IA64_AR90[ CV_IA64_AR91\ CV_IA64_AR92] CV_IA64_AR93^ CV_IA64_AR94_ CV_IA64_AR95` CV_IA64_AR96a CV_IA64_AR97b CV_IA64_AR98c CV_IA64_AR99d CV_IA64_AR100e CV_IA64_AR101f CV_IA64_AR102g CV_IA64_AR103h CV_IA64_AR104i CV_IA64_AR105j CV_IA64_AR106k CV_IA64_AR107l CV_IA64_AR108m CV_IA64_AR109n CV_IA64_AR110o CV_IA64_AR111p CV_IA64_AR112q CV_IA64_AR113r CV_IA64_AR114s CV_IA64_AR115t CV_IA64_AR116u CV_IA64_AR117v CV_IA64_AR118w CV_IA64_AR119x CV_IA64_AR120y CV_IA64_AR121z CV_IA64_AR122{ CV_IA64_AR123| CV_IA64_AR124} CV_IA64_AR125~ CV_IA64_AR126 CV_IA64_AR127 CV_IA64_CPUID0 CV_IA64_CPUID1 CV_IA64_CPUID2 CV_IA64_CPUID3 CV_IA64_CPUID4CV_IA64_ApDCRCV_IA64_ApITMCV_IA64_ApIVACV_IA64_CR3CV_IA64_CR4CV_IA64_CR5CV_IA64_CR6CV_IA64_CR7CV_IA64_ApPTA CV_IA64_ApGPTA CV_IA64_CR10 CV_IA64_CR11 CV_IA64_CR12 CV_IA64_CR13CV_IA64_CR14CV_IA64_CR15CV_IA64_StIPSRCV_IA64_StISRCV_IA64_CR18CV_IA64_StIIPCV_IA64_StIFACV_IA64_StITIRCV_IA64_StIIPACV_IA64_StIFSCV_IA64_StIIMCV_IA64_StIHACV_IA64_CR26CV_IA64_CR27CV_IA64_CR28CV_IA64_CR29CV_IA64_CR30CV_IA64_CR31 CV_IA64_CR32!CV_IA64_CR33"CV_IA64_CR34#CV_IA64_CR35$CV_IA64_CR36%CV_IA64_CR37&CV_IA64_CR38'CV_IA64_CR39(CV_IA64_CR40)CV_IA64_CR41*CV_IA64_CR42+CV_IA64_CR43,CV_IA64_CR44-CV_IA64_CR45.CV_IA64_CR46/CV_IA64_CR470CV_IA64_CR481CV_IA64_CR492CV_IA64_CR503CV_IA64_CR514CV_IA64_CR525CV_IA64_CR536CV_IA64_CR547CV_IA64_CR558CV_IA64_CR569CV_IA64_CR57:CV_IA64_CR58;CV_IA64_CR59<CV_IA64_CR60=CV_IA64_CR61>CV_IA64_CR62?CV_IA64_CR63@CV_IA64_SaLIDACV_IA64_SaIVRBCV_IA64_SaTPRCCV_IA64_SaEOIDCV_IA64_SaIRR0ECV_IA64_SaIRR1FCV_IA64_SaIRR2GCV_IA64_SaIRR3HCV_IA64_SaITVICV_IA64_SaPMVJCV_IA64_SaCMCVKCV_IA64_CR75LCV_IA64_CR76MCV_IA64_CR77NCV_IA64_CR78OCV_IA64_CR79PCV_IA64_SaLRR0QCV_IA64_SaLRR1RCV_IA64_CR82SCV_IA64_CR83TCV_IA64_CR84UCV_IA64_CR85VCV_IA64_CR86WCV_IA64_CR87XCV_IA64_CR88YCV_IA64_CR89ZCV_IA64_CR90[CV_IA64_CR91\CV_IA64_CR92]CV_IA64_CR93^CV_IA64_CR94_CV_IA64_CR95`CV_IA64_CR96aCV_IA64_CR97bCV_IA64_CR98cCV_IA64_CR99dCV_IA64_CR100eCV_IA64_CR101fCV_IA64_CR102gCV_IA64_CR103hCV_IA64_CR104iCV_IA64_CR105jCV_IA64_CR106kCV_IA64_CR107lCV_IA64_CR108mCV_IA64_CR109nCV_IA64_CR110oCV_IA64_CR111pCV_IA64_CR112qCV_IA64_CR113rCV_IA64_CR114sCV_IA64_CR115tCV_IA64_CR116uCV_IA64_CR117vCV_IA64_CR118wCV_IA64_CR119xCV_IA64_CR120yCV_IA64_CR121zCV_IA64_CR122{CV_IA64_CR123|CV_IA64_CR124}CV_IA64_CR125~CV_IA64_CR126CV_IA64_CR127CV_IA64_Pkr0CV_IA64_Pkr1CV_IA64_Pkr2CV_IA64_Pkr3CV_IA64_Pkr4CV_IA64_Pkr5CV_IA64_Pkr6CV_IA64_Pkr7CV_IA64_Pkr8 CV_IA64_Pkr9 CV_IA64_Pkr10 CV_IA64_Pkr11 CV_IA64_Pkr12 CV_IA64_Pkr13CV_IA64_Pkr14CV_IA64_Pkr15CV_IA64_Rr0CV_IA64_Rr1CV_IA64_Rr2CV_IA64_Rr3CV_IA64_Rr4CV_IA64_Rr5CV_IA64_Rr6CV_IA64_Rr7CV_IA64_PFD0CV_IA64_PFD1CV_IA64_PFD2CV_IA64_PFD3CV_IA64_PFD4CV_IA64_PFD5CV_IA64_PFD6CV_IA64_PFD7CV_IA64_PFD8 CV_IA64_PFD9 CV_IA64_PFD10 CV_IA64_PFD11 CV_IA64_PFD12 CV_IA64_PFD13CV_IA64_PFD14CV_IA64_PFD15CV_IA64_PFD16CV_IA64_PFD17CV_IA64_PFC0CV_IA64_PFC1CV_IA64_PFC2CV_IA64_PFC3CV_IA64_PFC4CV_IA64_PFC5CV_IA64_PFC6CV_IA64_PFC7CV_IA64_PFC8 CV_IA64_PFC9 CV_IA64_PFC10 CV_IA64_PFC11 CV_IA64_PFC12 CV_IA64_PFC13CV_IA64_PFC14CV_IA64_PFC15 CV_IA64_TrI0 CV_IA64_TrI1 CV_IA64_TrI2 CV_IA64_TrI3 CV_IA64_TrI4 CV_IA64_TrI5 CV_IA64_TrI6 CV_IA64_TrI7 CV_IA64_TrD0 CV_IA64_TrD1 CV_IA64_TrD2 CV_IA64_TrD3 CV_IA64_TrD4 CV_IA64_TrD5 CV_IA64_TrD6 CV_IA64_TrD7!CV_IA64_DbI0!CV_IA64_DbI1!CV_IA64_DbI2!CV_IA64_DbI3!CV_IA64_DbI4!CV_IA64_DbI5!CV_IA64_DbI6!CV_IA64_DbI7!CV_IA64_DbD0!CV_IA64_DbD1!CV_IA64_DbD2!CV_IA64_DbD3!CV_IA64_DbD4!CV_IA64_DbD5!CV_IA64_DbD6!CV_IA64_DbD7CV_TRI_NOREG CV_TRI_D0 CV_TRI_D1 CV_TRI_D2 CV_TRI_D3CV_TRI_D4CV_TRI_D5CV_TRI_D6CV_TRI_D7CV_TRI_D8CV_TRI_D9CV_TRI_D10CV_TRI_D11CV_TRI_D12CV_TRI_D13CV_TRI_D14CV_TRI_D15CV_TRI_A0CV_TRI_A1CV_TRI_A2CV_TRI_A3CV_TRI_A4CV_TRI_A5 CV_TRI_A6!CV_TRI_A7"CV_TRI_A8#CV_TRI_A9$CV_TRI_A10%CV_TRI_A11&CV_TRI_A12'CV_TRI_A13(CV_TRI_A14)CV_TRI_A15*CV_TRI_E0+CV_TRI_E2,CV_TRI_E4-CV_TRI_E6.CV_TRI_E8/CV_TRI_E100CV_TRI_E121CV_TRI_E142CV_TRI_EA03CV_TRI_EA24CV_TRI_EA45CV_TRI_EA66CV_TRI_EA87CV_TRI_EA108CV_TRI_EA129CV_TRI_EA14:CV_TRI_PSW;CV_TRI_PCXI<CV_TRI_PC=CV_TRI_FCX>CV_TRI_LCX?CV_TRI_ISP@CV_TRI_ICRACV_TRI_BIVBCV_TRI_BTVCCV_TRI_SYSCONDCV_TRI_DPRx_0ECV_TRI_DPRx_1FCV_TRI_DPRx_2GCV_TRI_DPRx_3DCV_TRI_CPRx_0ECV_TRI_CPRx_1FCV_TRI_CPRx_2GCV_TRI_CPRx_3DCV_TRI_DPMx_0ECV_TRI_DPMx_1FCV_TRI_DPMx_2GCV_TRI_DPMx_3DCV_TRI_CPMx_0ECV_TRI_CPMx_1FCV_TRI_CPMx_2GCV_TRI_CPMx_3HCV_TRI_DBGSSRICV_TRI_EXEVTJCV_TRI_SWEVTKCV_TRI_CREVTLCV_TRI_TRnEVTMCV_TRI_MMUCONNCV_TRI_ASIOCV_TRI_TVAPCV_TRI_TPAQCV_TRI_TPXRCV_TRI_TFACV_AM33_NOREG CV_AM33_E0 CV_AM33_E1 CV_AM33_E2 CV_AM33_E3CV_AM33_E4CV_AM33_E5CV_AM33_E6CV_AM33_E7CV_AM33_A0CV_AM33_A1CV_AM33_A2CV_AM33_A3CV_AM33_D0CV_AM33_D1 CV_AM33_D2!CV_AM33_D3(CV_AM33_FS0)CV_AM33_FS1*CV_AM33_FS2+CV_AM33_FS3,CV_AM33_FS4-CV_AM33_FS5.CV_AM33_FS6/CV_AM33_FS70CV_AM33_FS81CV_AM33_FS92CV_AM33_FS103CV_AM33_FS114CV_AM33_FS125CV_AM33_FS136CV_AM33_FS147CV_AM33_FS158CV_AM33_FS169CV_AM33_FS17:CV_AM33_FS18;CV_AM33_FS19<CV_AM33_FS20=CV_AM33_FS21>CV_AM33_FS22?CV_AM33_FS23@CV_AM33_FS24ACV_AM33_FS25BCV_AM33_FS26CCV_AM33_FS27DCV_AM33_FS28ECV_AM33_FS29FCV_AM33_FS30GCV_AM33_FS31PCV_AM33_SPQCV_AM33_PCRCV_AM33_MDRSCV_AM33_MDRQTCV_AM33_MCRHUCV_AM33_MCRLVCV_AM33_MCVFWCV_AM33_EPSWXCV_AM33_FPCRYCV_AM33_LIRZCV_AM33_LARCV_M32R_NOREG CV_M32R_R0 CV_M32R_R1 CV_M32R_R2 CV_M32R_R3CV_M32R_R4CV_M32R_R5CV_M32R_R6CV_M32R_R7CV_M32R_R8CV_M32R_R9CV_M32R_R10CV_M32R_R11CV_M32R_R12CV_M32R_R13CV_M32R_R14CV_M32R_R15CV_M32R_PSWCV_M32R_CBRCV_M32R_SPICV_M32R_SPUCV_M32R_SPOCV_M32R_BPC CV_M32R_ACHI!CV_M32R_ACLO"CV_M32R_PCCV_SHMEDIA_NOREG CV_SHMEDIA_R0 CV_SHMEDIA_R1 CV_SHMEDIA_R2 CV_SHMEDIA_R3CV_SHMEDIA_R4CV_SHMEDIA_R5CV_SHMEDIA_R6CV_SHMEDIA_R7CV_SHMEDIA_R8CV_SHMEDIA_R9CV_SHMEDIA_R10CV_SHMEDIA_R11CV_SHMEDIA_R12CV_SHMEDIA_R13CV_SHMEDIA_R14CV_SHMEDIA_R15CV_SHMEDIA_R16CV_SHMEDIA_R17CV_SHMEDIA_R18CV_SHMEDIA_R19CV_SHMEDIA_R20CV_SHMEDIA_R21 CV_SHMEDIA_R22!CV_SHMEDIA_R23"CV_SHMEDIA_R24#CV_SHMEDIA_R25$CV_SHMEDIA_R26%CV_SHMEDIA_R27&CV_SHMEDIA_R28'CV_SHMEDIA_R29(CV_SHMEDIA_R30)CV_SHMEDIA_R31*CV_SHMEDIA_R32+CV_SHMEDIA_R33,CV_SHMEDIA_R34-CV_SHMEDIA_R35.CV_SHMEDIA_R36/CV_SHMEDIA_R370CV_SHMEDIA_R381CV_SHMEDIA_R392CV_SHMEDIA_R403CV_SHMEDIA_R414CV_SHMEDIA_R425CV_SHMEDIA_R436CV_SHMEDIA_R447CV_SHMEDIA_R458CV_SHMEDIA_R469CV_SHMEDIA_R47:CV_SHMEDIA_R48;CV_SHMEDIA_R49<CV_SHMEDIA_R50=CV_SHMEDIA_R51>CV_SHMEDIA_R52?CV_SHMEDIA_R53@CV_SHMEDIA_R54ACV_SHMEDIA_R55BCV_SHMEDIA_R56CCV_SHMEDIA_R57DCV_SHMEDIA_R58ECV_SHMEDIA_R59FCV_SHMEDIA_R60GCV_SHMEDIA_R61HCV_SHMEDIA_R62ICV_SHMEDIA_R63JCV_SHMEDIA_TR0KCV_SHMEDIA_TR1LCV_SHMEDIA_TR2MCV_SHMEDIA_TR3NCV_SHMEDIA_TR4OCV_SHMEDIA_TR5PCV_SHMEDIA_TR6QCV_SHMEDIA_TR7RCV_SHMEDIA_TR8SCV_SHMEDIA_TR9TCV_SHMEDIA_TR10UCV_SHMEDIA_TR11VCV_SHMEDIA_TR12WCV_SHMEDIA_TR13XCV_SHMEDIA_TR14YCV_SHMEDIA_TR15CV_SHMEDIA_FR0CV_SHMEDIA_FR1CV_SHMEDIA_FR2CV_SHMEDIA_FR3CV_SHMEDIA_FR4CV_SHMEDIA_FR5CV_SHMEDIA_FR6CV_SHMEDIA_FR7CV_SHMEDIA_FR8CV_SHMEDIA_FR9CV_SHMEDIA_FR10CV_SHMEDIA_FR11CV_SHMEDIA_FR12CV_SHMEDIA_FR13CV_SHMEDIA_FR14CV_SHMEDIA_FR15CV_SHMEDIA_FR16CV_SHMEDIA_FR17CV_SHMEDIA_FR18CV_SHMEDIA_FR19CV_SHMEDIA_FR20CV_SHMEDIA_FR21CV_SHMEDIA_FR22CV_SHMEDIA_FR23CV_SHMEDIA_FR24CV_SHMEDIA_FR25CV_SHMEDIA_FR26CV_SHMEDIA_FR27CV_SHMEDIA_FR28CV_SHMEDIA_FR29CV_SHMEDIA_FR30CV_SHMEDIA_FR31CV_SHMEDIA_FR32CV_SHMEDIA_FR33CV_SHMEDIA_FR34CV_SHMEDIA_FR35CV_SHMEDIA_FR36CV_SHMEDIA_FR37CV_SHMEDIA_FR38CV_SHMEDIA_FR39CV_SHMEDIA_FR40CV_SHMEDIA_FR41CV_SHMEDIA_FR42CV_SHMEDIA_FR43CV_SHMEDIA_FR44CV_SHMEDIA_FR45CV_SHMEDIA_FR46CV_SHMEDIA_FR47CV_SHMEDIA_FR48CV_SHMEDIA_FR49CV_SHMEDIA_FR50CV_SHMEDIA_FR51CV_SHMEDIA_FR52CV_SHMEDIA_FR53CV_SHMEDIA_FR54CV_SHMEDIA_FR55CV_SHMEDIA_FR56CV_SHMEDIA_FR57CV_SHMEDIA_FR58CV_SHMEDIA_FR59CV_SHMEDIA_FR60CV_SHMEDIA_FR61CV_SHMEDIA_FR62CV_SHMEDIA_FR63CV_SHMEDIA_DR0CV_SHMEDIA_DR2CV_SHMEDIA_DR4CV_SHMEDIA_DR6CV_SHMEDIA_DR8 CV_SHMEDIA_DR10 CV_SHMEDIA_DR12CV_SHMEDIA_DR14CV_SHMEDIA_DR16CV_SHMEDIA_DR18CV_SHMEDIA_DR20CV_SHMEDIA_DR22CV_SHMEDIA_DR24CV_SHMEDIA_DR26CV_SHMEDIA_DR28CV_SHMEDIA_DR30 CV_SHMEDIA_DR32"CV_SHMEDIA_DR34$CV_SHMEDIA_DR36&CV_SHMEDIA_DR38(CV_SHMEDIA_DR40*CV_SHMEDIA_DR42,CV_SHMEDIA_DR44.CV_SHMEDIA_DR460CV_SHMEDIA_DR482CV_SHMEDIA_DR504CV_SHMEDIA_DR526CV_SHMEDIA_DR548CV_SHMEDIA_DR56:CV_SHMEDIA_DR58<CV_SHMEDIA_DR60>CV_SHMEDIA_DR62CV_SHMEDIA_FV0CV_SHMEDIA_FV4CV_SHMEDIA_FV8 CV_SHMEDIA_FV12CV_SHMEDIA_FV16CV_SHMEDIA_FV20CV_SHMEDIA_FV24CV_SHMEDIA_FV28 CV_SHMEDIA_FV32$CV_SHMEDIA_FV36(CV_SHMEDIA_FV40,CV_SHMEDIA_FV440CV_SHMEDIA_FV484CV_SHMEDIA_FV528CV_SHMEDIA_FV56<CV_SHMEDIA_FV60CV_SHMEDIA_MTRX0CV_SHMEDIA_MTRX16 CV_SHMEDIA_MTRX320CV_SHMEDIA_MTRX48CV_SHMEDIA_CR0CV_SHMEDIA_CR1CV_SHMEDIA_CR2CV_SHMEDIA_CR3CV_SHMEDIA_CR4CV_SHMEDIA_CR5CV_SHMEDIA_CR6CV_SHMEDIA_CR7CV_SHMEDIA_CR8CV_SHMEDIA_CR9CV_SHMEDIA_CR10CV_SHMEDIA_CR11CV_SHMEDIA_CR12CV_SHMEDIA_CR13CV_SHMEDIA_CR14CV_SHMEDIA_CR15CV_SHMEDIA_CR16CV_SHMEDIA_CR17CV_SHMEDIA_CR18CV_SHMEDIA_CR19CV_SHMEDIA_CR20CV_SHMEDIA_CR21CV_SHMEDIA_CR22CV_SHMEDIA_CR23CV_SHMEDIA_CR24CV_SHMEDIA_CR25CV_SHMEDIA_CR26CV_SHMEDIA_CR27CV_SHMEDIA_CR28CV_SHMEDIA_CR29CV_SHMEDIA_CR30CV_SHMEDIA_CR31CV_SHMEDIA_CR32CV_SHMEDIA_CR33CV_SHMEDIA_CR34CV_SHMEDIA_CR35CV_SHMEDIA_CR36CV_SHMEDIA_CR37CV_SHMEDIA_CR38CV_SHMEDIA_CR39CV_SHMEDIA_CR40CV_SHMEDIA_CR41CV_SHMEDIA_CR42CV_SHMEDIA_CR43CV_SHMEDIA_CR44CV_SHMEDIA_CR45CV_SHMEDIA_CR46CV_SHMEDIA_CR47CV_SHMEDIA_CR48CV_SHMEDIA_CR49CV_SHMEDIA_CR50CV_SHMEDIA_CR51CV_SHMEDIA_CR52CV_SHMEDIA_CR53CV_SHMEDIA_CR54CV_SHMEDIA_CR55CV_SHMEDIA_CR56 CV_SHMEDIA_CR57 CV_SHMEDIA_CR58 CV_SHMEDIA_CR59 CV_SHMEDIA_CR60 CV_SHMEDIA_CR61CV_SHMEDIA_CR62CV_SHMEDIA_CR63CV_SHMEDIA_FPSCRCV_SHMEDIA_GBRZCV_SHMEDIA_MACL[CV_SHMEDIA_MACHCV_SHMEDIA_PR\CV_SHMEDIA_TCV_SHMEDIA_FPUL]CV_SHMEDIA_PCCV_SHMEDIA_SRCV_AMD64_ALCV_AMD64_CLCV_AMD64_DLCV_AMD64_BLCV_AMD64_AHCV_AMD64_CHCV_AMD64_DHCV_AMD64_BH CV_AMD64_AX CV_AMD64_CX CV_AMD64_DX CV_AMD64_BX CV_AMD64_SPCV_AMD64_BPCV_AMD64_SICV_AMD64_DICV_AMD64_EAXCV_AMD64_ECXCV_AMD64_EDXCV_AMD64_EBXCV_AMD64_ESPCV_AMD64_EBPCV_AMD64_ESICV_AMD64_EDICV_AMD64_ESCV_AMD64_CSCV_AMD64_SSCV_AMD64_DSCV_AMD64_FSCV_AMD64_GS CV_AMD64_FLAGS!CV_AMD64_RIP"CV_AMD64_EFLAGSPCV_AMD64_CR0QCV_AMD64_CR1RCV_AMD64_CR2SCV_AMD64_CR3TCV_AMD64_CR4XCV_AMD64_CR8ZCV_AMD64_DR0[CV_AMD64_DR1\CV_AMD64_DR2]CV_AMD64_DR3^CV_AMD64_DR4_CV_AMD64_DR5`CV_AMD64_DR6aCV_AMD64_DR7bCV_AMD64_DR8cCV_AMD64_DR9dCV_AMD64_DR10eCV_AMD64_DR11fCV_AMD64_DR12gCV_AMD64_DR13hCV_AMD64_DR14iCV_AMD64_DR15nCV_AMD64_GDTRoCV_AMD64_GDTLpCV_AMD64_IDTRqCV_AMD64_IDTLrCV_AMD64_LDTRsCV_AMD64_TRCV_AMD64_ST0CV_AMD64_ST1CV_AMD64_ST2CV_AMD64_ST3CV_AMD64_ST4CV_AMD64_ST5CV_AMD64_ST6CV_AMD64_ST7CV_AMD64_CTRLCV_AMD64_STATCV_AMD64_TAGCV_AMD64_FPIPCV_AMD64_FPCSCV_AMD64_FPDOCV_AMD64_FPDSCV_AMD64_ISEMCV_AMD64_FPEIPCV_AMD64_FPEDOCV_AMD64_MM0CV_AMD64_MM1CV_AMD64_MM2CV_AMD64_MM3CV_AMD64_MM4CV_AMD64_MM5CV_AMD64_MM6CV_AMD64_MM7CV_AMD64_XMM0CV_AMD64_XMM1CV_AMD64_XMM2CV_AMD64_XMM3CV_AMD64_XMM4CV_AMD64_XMM5CV_AMD64_XMM6CV_AMD64_XMM7CV_AMD64_XMM0_0CV_AMD64_XMM0_1CV_AMD64_XMM0_2CV_AMD64_XMM0_3CV_AMD64_XMM1_0CV_AMD64_XMM1_1CV_AMD64_XMM1_2CV_AMD64_XMM1_3CV_AMD64_XMM2_0CV_AMD64_XMM2_1CV_AMD64_XMM2_2CV_AMD64_XMM2_3CV_AMD64_XMM3_0CV_AMD64_XMM3_1CV_AMD64_XMM3_2CV_AMD64_XMM3_3CV_AMD64_XMM4_0CV_AMD64_XMM4_1CV_AMD64_XMM4_2CV_AMD64_XMM4_3CV_AMD64_XMM5_0CV_AMD64_XMM5_1CV_AMD64_XMM5_2CV_AMD64_XMM5_3CV_AMD64_XMM6_0CV_AMD64_XMM6_1CV_AMD64_XMM6_2CV_AMD64_XMM6_3CV_AMD64_XMM7_0CV_AMD64_XMM7_1CV_AMD64_XMM7_2CV_AMD64_XMM7_3CV_AMD64_XMM0LCV_AMD64_XMM1LCV_AMD64_XMM2LCV_AMD64_XMM3LCV_AMD64_XMM4LCV_AMD64_XMM5LCV_AMD64_XMM6LCV_AMD64_XMM7LCV_AMD64_XMM0HCV_AMD64_XMM1HCV_AMD64_XMM2HCV_AMD64_XMM3HCV_AMD64_XMM4HCV_AMD64_XMM5HCV_AMD64_XMM6HCV_AMD64_XMM7HCV_AMD64_MXCSRCV_AMD64_EMM0LCV_AMD64_EMM1LCV_AMD64_EMM2LCV_AMD64_EMM3LCV_AMD64_EMM4LCV_AMD64_EMM5LCV_AMD64_EMM6LCV_AMD64_EMM7LCV_AMD64_EMM0HCV_AMD64_EMM1HCV_AMD64_EMM2HCV_AMD64_EMM3HCV_AMD64_EMM4HCV_AMD64_EMM5HCV_AMD64_EMM6HCV_AMD64_EMM7HCV_AMD64_MM00CV_AMD64_MM01CV_AMD64_MM10CV_AMD64_MM11CV_AMD64_MM20CV_AMD64_MM21CV_AMD64_MM30CV_AMD64_MM31CV_AMD64_MM40CV_AMD64_MM41CV_AMD64_MM50CV_AMD64_MM51CV_AMD64_MM60CV_AMD64_MM61CV_AMD64_MM70CV_AMD64_MM71CV_AMD64_XMM8CV_AMD64_XMM9CV_AMD64_XMM10CV_AMD64_XMM11CV_AMD64_XMM12CV_AMD64_XMM13CV_AMD64_XMM14CV_AMD64_XMM15CV_AMD64_XMM8_0CV_AMD64_XMM8_1CV_AMD64_XMM8_2CV_AMD64_XMM8_3CV_AMD64_XMM9_0 CV_AMD64_XMM9_1 CV_AMD64_XMM9_2 CV_AMD64_XMM9_3 CV_AMD64_XMM10_0 CV_AMD64_XMM10_1CV_AMD64_XMM10_2CV_AMD64_XMM10_3CV_AMD64_XMM11_0CV_AMD64_XMM11_1CV_AMD64_XMM11_2CV_AMD64_XMM11_3CV_AMD64_XMM12_0CV_AMD64_XMM12_1CV_AMD64_XMM12_2CV_AMD64_XMM12_3CV_AMD64_XMM13_0CV_AMD64_XMM13_1CV_AMD64_XMM13_2CV_AMD64_XMM13_3CV_AMD64_XMM14_0CV_AMD64_XMM14_1CV_AMD64_XMM14_2CV_AMD64_XMM14_3 CV_AMD64_XMM15_0!CV_AMD64_XMM15_1"CV_AMD64_XMM15_2#CV_AMD64_XMM15_3$CV_AMD64_XMM8L%CV_AMD64_XMM9L&CV_AMD64_XMM10L'CV_AMD64_XMM11L(CV_AMD64_XMM12L)CV_AMD64_XMM13L*CV_AMD64_XMM14L+CV_AMD64_XMM15L,CV_AMD64_XMM8H-CV_AMD64_XMM9H.CV_AMD64_XMM10H/CV_AMD64_XMM11H0CV_AMD64_XMM12H1CV_AMD64_XMM13H2CV_AMD64_XMM14H3CV_AMD64_XMM15H4CV_AMD64_EMM8L5CV_AMD64_EMM9L6CV_AMD64_EMM10L7CV_AMD64_EMM11L8CV_AMD64_EMM12L9CV_AMD64_EMM13L:CV_AMD64_EMM14L;CV_AMD64_EMM15L<CV_AMD64_EMM8H=CV_AMD64_EMM9H>CV_AMD64_EMM10H?CV_AMD64_EMM11H@CV_AMD64_EMM12HACV_AMD64_EMM13HBCV_AMD64_EMM14HCCV_AMD64_EMM15HDCV_AMD64_SILECV_AMD64_DILFCV_AMD64_BPLGCV_AMD64_SPLHCV_AMD64_RAXICV_AMD64_RBXJCV_AMD64_RCXKCV_AMD64_RDXLCV_AMD64_RSIMCV_AMD64_RDINCV_AMD64_RBPOCV_AMD64_RSPPCV_AMD64_R8QCV_AMD64_R9RCV_AMD64_R10SCV_AMD64_R11TCV_AMD64_R12UCV_AMD64_R13VCV_AMD64_R14WCV_AMD64_R15XCV_AMD64_R8BYCV_AMD64_R9BZCV_AMD64_R10B[CV_AMD64_R11B\CV_AMD64_R12B]CV_AMD64_R13B^CV_AMD64_R14B_CV_AMD64_R15B`CV_AMD64_R8WaCV_AMD64_R9WbCV_AMD64_R10WcCV_AMD64_R11WdCV_AMD64_R12WeCV_AMD64_R13WfCV_AMD64_R14WgCV_AMD64_R15WhCV_AMD64_R8DiCV_AMD64_R9DjCV_AMD64_R10DkCV_AMD64_R11DlCV_AMD64_R12DmCV_AMD64_R13DnCV_AMD64_R14DoCV_AMD64_R15D&:t1CV_HREG_eW4CV_HREG_e@@1PDBIntv80N11PDBIntv70.1PDBIntv70Dep1PDBIntv69r0PDBIntv61D0PDBIntv50aD0PDBIntv600PDBIntv50\ PDBIntv411PDBIntv" t1PDBINTVW4PDBINTV@@2niNilPDB_MAX_PATHcbErrMax&t1PDBConstsW4PDBConsts@@*wtiSymsNB09wtiSymsNB10.t1W4@@.SrcHeaderUSrcHeader@@ 1 1      "cb "ver "sig " cbSource "niFile "niObj "niVirt  srccompress  grFlags 1fVirtual  1pad sPad  pvReserved1  pv64Reserved22!1(SrcHeaderOutUSrcHeaderOut@@2SrcHeaderOutUSrcHeaderOut@@ #1 $1 q# "cb "ver "sig " cbSource  srccompress  grFlags 1fVirtual  1pad &1szNames. '1SrcHeaderWUSrcHeaderW@@.SrcHeaderWUSrcHeaderW@@ )1 *1 "t,1 -1  # "cb "ver "sig " cbSource  srccompress  grFlags 1fVirtual  1pad /1szNames. 01SrcHeaderUSrcHeader@@ZSrcHeaderBlock::U@SrcHeaderBlock@@ #,r tver tcb21 21ft tage 31rgbPad641@SrcHeaderBlockUSrcHeaderBlock@@ZSrcHeaderBlock::U@SrcHeaderBlock@@"EnumUEnum@@.EnumThunkUEnumThunk@@ 81 ! 8191:1 81 <1, =1 8191>1 8191?1@1 81, B18191>1F71;1getA1EnumThunkC1operator=.&D17EnumThunkUEnumThunk@@ #2 !len !leaf F1data*G1TYPTYPEUTYPTYPE@@6 !offColumnStart !offColumnEnd2I1CV_Column_tUCV_Column_t@@*LinkInfoULinkInfo@@.LinkInfoWULinkInfoW@@ L1 M1  qL1N1 L1  L1P1jK1O1SzCwdWO1SzCommandWO1SzOutFileWO1SzLibsWQ1LinkInfoW.R1LinkInfoWULinkInfoW@@&HKEY__UHKEY__@@ T1  BaseAddress AllocationBase "AllocationProtect #RegionSize " State "$Protect "(TypeNV10_MEMORY_BASIC_INFORMATIONU_MEMORY_BASIC_INFORMATION@@  "DbgUDbg@@ Y1  tY1Z1 Y1Z1 Y1Z1 tY1Z19 tY1Z1l. tY1Z1"* tY1Z1a1 Y1  c1  d1 tY1Z1e1 Y1 g1, h1 Y1Z1i1 Y1Z1j1k1 Y1, m1Y1Z1i1 X1lose\1QuerySize]1Reset^1Skip_1 QueryNext`1(Findlearb18Appendb1@ReplaceNextf1HClone\1PQueryElementSizel1Dbgn1operator="&o1DbgUDbg@@ UUUUUUUUUUUUU q1 >1intvN11intvVC70.1intvVC70Dep:ts1PDB::W4@PDB@@"PDBUPDB@@ u1  v1 q#w1 tu1x1"q#w1 tu1z1* ""q#w1 tu1 |1tPOVCW4POVC@@~1+1 1 &1q#w1 tu11q#w1 tu11 tu19 "u1.IPDBErrorUIPDBError@@ 1  v111 1  1 tu11 tu1 tu1 u1  "u11 u11t pu11t"DBIUDBI@@ 1  1 1 tu1111 tu111"TPIUTPI@@ 1  1 1 tu111 tu11&StreamUStream@@ 1  1 1 tu111 71  1  1 tu111*t1 1  1 tu111B_tagSEARCHDEBUGINFOU_tagSEARCHDEBUGINFO@@ 1  1t1 1 11 tu111"" tu111"SrcUSrc@@ 1  1  1 tu111 u11& qu11& tu11"" tu111 u1 1  tu111 tu111tPCCW4PCC@@1+1 1 "1 tu1111 tu111 1, 1 u111 u1111 u1, 1u111 r1t1 y1Open2W {1OpenEx2W }1OpenValidate4 1OpenValidate5 1OpenInStream 1ExportValidateInterface 1ExportValidateImplementation 1QueryImplementationVersionStatic 1QueryInterfaceVersionStatic 1SetErrorHandlerAPI 1SetPDBCloseTimeout 1ShutDownTimeoutManager 1CloseAllTimeoutPDB1QueryInterfaceVersion1QueryImplementationVersion1QueryLastError1QueryPDBName1 QuerySignature1(QueryAge10CreateDBI18OpenDBI1@OpenTpi1HCommit1PClose1XOpenStream1`GetEnumStreamNameMap1hGetRawBytes1pQueryPdbImplementationVersion1xOpenDBIEx1CopyTo1OpenSrc1QueryLastErrorExW1QueryPDBNameExW1QuerySignature21CopyToW1fIsSZPDB1OpenStreamW1CopyToW21ValidateInterface1OpenStreamEx1PDB1operator="-61q1PDBUPDB@@ 1  11& 111 11 1 1, 1 111 1111 1, 1111~ 1QueryLastError1SetLastError1Destroy1IPDBError1operator=.&1IPDBErrorUIPDBError@@CV_CFL_8080CV_CFL_8086CV_CFL_80286CV_CFL_80386CV_CFL_80486CV_CFL_PENTIUMCV_CFL_PENTIUMIICV_CFL_PENTIUMPROCV_CFL_PENTIUMIIICV_CFL_MIPSCV_CFL_MIPSR4000CV_CFL_MIPS16CV_CFL_MIPS32CV_CFL_MIPS64CV_CFL_MIPSICV_CFL_MIPSIICV_CFL_MIPSIIICV_CFL_MIPSIVCV_CFL_MIPSV CV_CFL_M68000!CV_CFL_M68010"CV_CFL_M68020#CV_CFL_M68030$CV_CFL_M680400CV_CFL_ALPHA0CV_CFL_ALPHA_210641CV_CFL_ALPHA_211642CV_CFL_ALPHA_21164A3CV_CFL_ALPHA_212644CV_CFL_ALPHA_21364@CV_CFL_PPC601ACV_CFL_PPC603BCV_CFL_PPC604CCV_CFL_PPC620DCV_CFL_PPCFPECV_CFL_PPCBEPCV_CFL_SH3QCV_CFL_SH3ERCV_CFL_SH3DSPSCV_CFL_SH4TCV_CFL_SHMEDIA`CV_CFL_ARM3aCV_CFL_ARM4bCV_CFL_ARM4TcCV_CFL_ARM5dCV_CFL_ARM5TeCV_CFL_ARM6fCV_CFL_ARM_XMACgCV_CFL_ARM_WMMXpCV_CFL_OMNICV_CFL_IA64CV_CFL_IA64_1CV_CFL_IA64_2CV_CFL_CEECV_CFL_AM33CV_CFL_M32RCV_CFL_TRICORECV_CFL_X64CV_CFL_AMD64CV_CFL_EBCCV_CFL_THUMB.=t1CV_CPU_TYPE_eW4CV_CPU_TYPE_e@@EC_OKEC_USAGEEC_OUT_OF_MEMORYEC_FILE_SYSTEMEC_NOT_FOUNDEC_INVALID_SIGEC_INVALID_AGEEC_PRECOMP_REQUIREDEC_OUT_OF_TI EC_NOT_IMPLEMENTED EC_V1_PDB EC_UNKNOWN_FORMAT EC_FORMAT EC_LIMIT EC_CORRUPTEC_TI16EC_ACCESS_DENIEDEC_ILLEGAL_TYPE_EDITEC_INVALID_EXECUTABLEEC_DBG_NOT_FOUNDEC_NO_DEBUG_INFOEC_INVALID_EXE_TIMESTAMPEC_CORRUPT_TYPEPOOLEC_DEBUG_INFO_NOT_IN_PDBEC_RPCEC_UNKNOWNEC_BAD_CACHE_PATHEC_CACHE_FULLEC_TOO_MANY_MOD_ADDTYPEEC_MAX&t1PDBErrorsW4PDBErrors@@ #1  U11 1 " 9UUUUUUUUUUUUUUUUUUUUUUUUUUUUP 1 1intv:t1DBI::W4@DBI@@ 1  "11"ModUMod@@ 1  1 1 t111 t1111 t111"GSIUGSI@@ 1  1  2 t112!! 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3_Init_locks_dtor3__vecDelDtor:3std::_Init_locksV_Init_locks@std@@2_Init_atexitU_Init_atexit@@ 3  33 33/23~_Init_atexit3__vecDelDtor23_Init_atexitU_Init_atexit@@p#[std::basic_ios >V?$basic_ios@GU?$char_traits@G@std@@@std@@std::basic_istream >V?$basic_istream@GU?$char_traits@G@std@@@std@@std::basic_streambuf >V?$basic_streambuf@GU?$char_traits@G@std@@@std@@std::istreambuf_iterator >V?$istreambuf_iterator@GU?$char_traits@G@std@@@std@@std::num_get > >V?$num_get@GV?$istreambuf_iterator@GU?$char_traits@G@std@@@std@@@std@@ 3  3 3, 3 333 33. 3 30 333333 33std::basic_istream >::_Sentry_baseV_Sentry_base@?$basic_istream@GU?$char_traits@G@std@@@std@@std::basic_istream >::sentryVsentry@?$basic_istream@GU?$char_traits@G@std@@@std@@ 033 33 3, 3 3333 333 333 333 333 333 333 333 333 333 333 333 333 333 3, 333 3  3 3334 334 4  4 333433333333333333344 3,4! 333 4 4 333 4!! 333 4! 3334 !332 4 4344444 333!# 3334 334 334 333e 333 3  34 t33 333 33344 :33 3333 33/33_Myt3_Myios3_Mysb3_Iter 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>V?$basic_streambuf@GU?$char_traits@G@std@@@std@@std::basic_ostream >V?$basic_ostream@GU?$char_traits@G@std@@@std@@ 3  3 4, 4 3~44 3~4 3~43444 3~4 3~4/ 3~4n44 33~44 }4  4 43~44 4  43444 33~43 33444 H3~4K !3~4e !3444 p34# !34 3~43 3~4/r3_Myt}4_Myos3_Mysb _Ctype!char_type<4traits_type!int_type:pos_typeoff_type4basic_ios >4~basic_ios >4clear4setstate4copyfmt4tie4rdbuf4imbue4fill4narrow4widen4init4operator= 3H_Mystrbuf 4P_Tiestr !X_Fillch4__local_vftable_ctor_closure4__vecDelDtor#642`std::basic_ios >V?$basic_ios@GU?$char_traits@G@std@@@std@@std::ostreambuf_iterator >V?$ostreambuf_iterator@GU?$char_traits@G@std@@@std@@std::num_put > >V?$num_put@GV?$ostreambuf_iterator@GU?$char_traits@G@std@@@std@@@std@@ }4  }4 4, 4 }444 }44 }443444 }44std::basic_ostream >::_Sentry_baseV_Sentry_base@?$basic_ostream@GU?$char_traits@G@std@@@std@@std::basic_ostream >::sentryVsentry@?$basic_ostream@GU?$char_traits@G@std@@@std@@ 0}44 }44 }4, 4}443 4}446 4}44 4}44 4}44 4}44 4}449 4}44 4}44/ 4}44 4}44e 4}44 4}44 4}44 4}444 444 4  4 4}44444444444444444444 4}44k4 4}44 4}44 4}4444 :}44 4}444 }44/3}4_Myt3_Myios3_Mysb4_Iter4_Nput4basic_ostream >4~basic_ostream >!int_type:pos_typeoff_type4_Sentry_base4sentry4opfx4osfx4_Osfx4operator<<4put4write4flush4seekp4tellp4operator=4__vecDelDtor+64hstd::basic_ostream >V?$basic_ostream@GU?$char_traits@G@std@@@std@@ 4  4 4, 4 444 44444 44 4  044 4, 4444 44/44sentry4~sentry4operator bool4operator= 0_Ok4__vecDelDtorn4std::basic_ostream >::sentryVsentry@?$basic_ostream@GU?$char_traits@G@std@@@std@@ 4  444 44 44/^4_Sentry_base4~_Sentry_base 4_Myostr4__vecDelDtor 4std::basic_ostream >::_Sentry_baseV_Sentry_base@?$basic_ostream@GU?$char_traits@G@std@@@std@@p#.6 *pVFTable spare 4nameZ4>$_TypeDescriptor$_extraBytes_46U$_TypeDescriptor$_extraBytes_46@@+6std::_Fac_nodeU_Fac_node@std@@ 4 .std::_OutitU_Outit@std@@ 4  444 44344 4, 444 44444 4 4  044J44_Myt!char_type<4traits_type3streambuf_type}4ostream_type_Checked_iterator_category4ostreambuf_iterator >4operator*4operator++4failed 0_Failed 3_Strbuf4std::ostreambuf_iterator >V?$ostreambuf_iterator@GU?$char_traits@G@std@@@std@@B$symbol+sign spacevvaluexnoneNt4std::money_base::W4@money_base@std@@Jstd::money_base::patternUpattern@money_base@std@@6std::money_baseUmoney_base@std@@ 4  4 4, 4 444 4444 44 4, 5444 44/4tpart4pattern5money_base5~money_base5operator=5__dflt_ctor_closure5__local_vftable_ctor_closure5__vecDelDtor6 652std::money_baseUmoney_base@std@@ m+fieldJ5std::money_base::patternUpattern@money_base@std@@ 4 4 4 5 5 4 5 4 5/f 5_Fac_node 5~_Fac_node 4_Next _Facptr 5__vecDelDtor65std::_Fac_nodeU_Fac_node@std@@>std::messages_baseUmessages_base@std@@ 5  5 5, 5 555 5555 55 5, 5555 55/tcatalog5messages_base5~messages_base5operator=5__dflt_ctor_closure5__local_vftable_ctor_closure5__vecDelDtor> 652std::messages_baseUmessages_base@std@@Bno_orderdmymdyymdydmFt5std::time_base::dateorderW4dateorder@time_base@std@@6std::time_baseUtime_base@std@@  5   5 "5, #5  5!5$5  5!5%5&5  5!5  5, )5 5!5$5  5!5/5dateorder'5time_base(5~time_base*5operator=(5__dflt_ctor_closure(5__local_vftable_ctor_closure+5__vecDelDtor6 6,52std::time_baseUtime_base@std@@   405:stdext::exceptionVexception@stdext@@ 25 35, 4555 65 Bstdext::bad_exceptionVbad_exception@stdext@@ 85  85 :5, ;5 8595<5 8595=5>5 8595 :5  85A5 85, C58595<5 8595/25?5bad_exception@5~bad_exceptionB5_DoraiseD5operator=@5__dflt_ctor_closure@5__local_vftable_ctor_closureE5__vecDelDtorB &F5stdext::bad_exceptionVbad_exception@stdext@@ 75 7525H5 25  25J555 25J5K5L5 25, N525J555 25J5 35  25Q5 25Q5 25J5/  I5_Set_raise_handlerM5exceptionO5operator=P5~exceptionR5whatS5_RaiseS5_Doraise _PtrP5__dflt_ctor_closureP5__local_vftable_ctor_closureT5__vecDelDtor: &U5stdext::exceptionVexception@stdext@@:stdext::bad_allocVbad_alloc@stdext@@ W5  W5 Y5, Z5 W5X5[5 W5X5 W5X5\5]5^5 W5X5 Y5  W5a5 W5, c5W5X5[5 W5X5/25_5bad_alloc`5~bad_allocb5_Doraised5operator=`5__local_vftable_ctor_closuree5__vecDelDtor: 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