breakc - Break From Loop Statement by Condition

breakc - Break from loop statement by condition

Calling Format

breakc  status0, status1, mode

Operands

Name Description
status0 Value of status register 0. (The value is either 0 or 1.)
status1 Value of status register 1. (The value is either 0 or 1.)
mode Conditional mode (0: OR, 1: AND, 2: Only status register 0, 3: Only status register 1).

Overview

Forcibly exits a loop control block, conditional on the status register values.
The value specified by status0 (or status1) is tested for equality against the value of status register 0 (or 1). When mode is 0, the result is true when either status register 0 or status register 1 matches its respective operand.
When mode is 1, both status registers must match their respective operands.
When mode is 2, status register 0 must match status0.
When mode is 3, status register 1 must match status1.
When the condition is true, control is forced to exit a loop started by a loop instruction and then jumps to the instruction after the endloop instruction.

The breakc instruction cannot be called between ifb (or ifc) and endif instructions that are nested between loop and endloop instructions.
The breakc instruction also cannot be called immediately prior to an endloop instruction.

Operation

for ( int i = 0, aL = src.init ; i < src.count+1 ; i++, aL += src.step )
{
    ...
    switch ( mode )
    {
        case 0 :
            if ( status0 == Status_register0 || status1 == Status_register1 )
                condition = true;
            break;
        case 1 :
            if ( status0 == Status_register0 && status1 == Status_register1 )
                condition = true;
            break;
        case 2 :
            if ( status0 == Status_register0 )
                condition = true;
            break;
        case 3 :
            if ( status1 == Status_register1 )
                condition = true;
            break;
    }
    if ( condition == true )
        break;
}

Code Example

defi    i0, 10, 0, 1

loop    i0
    add     r0, r0, c0[ aL ]    // Add the total of c0, c1, ... , c9 to r0
    breakc  1,  0,  2           // Break if status register 0 is equal to 1
    nop                         // Cannot issue breakc immediately before endloop
endloop

Revision History

2011/12/20
Initial version.

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