Lines Matching refs:r2
66 ldmia r12, { r1-r2 } // r1: IE, r2: IF in OS_IrqHandler()
67 ands r1, r1, r2 // r1: IE & IF in OS_IrqHandler()
100 @1: ands r2, r1, r3, LSL r0 // Count zero of high bit in OS_IrqHandler()
105 str r2, [ r12, #REG_IF_ADDR - REG_IE_ADDR ] in OS_IrqHandler()
162 mov r2, #OS_THREAD_STATE_READY in OS_IrqHandler_ThreadSwitch()
168 strne r2, [r12, #OS_THREAD_OFFSET_STATE] in OS_IrqHandler_ThreadSwitch()
207 add r2, r12, #OS_THREADINFO_OFFSET_LIST // r2 = &OSi_ThreadInfo.list in OS_IrqHandler_ThreadSwitch()
208 ldr r1, [r2] // r1 = *r2 = TopOfList in OS_IrqHandler_ThreadSwitch()
247 mrs r2, SPSR in OS_IrqHandler_ThreadSwitch()
248 str r2, [ r0, #OS_THREAD_OFFSET_CONTEXT ]! // *r0=context:CPSR in OS_IrqHandler_ThreadSwitch()
260 ldmib sp!, { r2,r3 } // Get R0,R1 // *sp=stack:R1 in OS_IrqHandler_ThreadSwitch()
261 stmib r0!, { r2,r3 } // Put R0,R1 // *r0=context:R1 in OS_IrqHandler_ThreadSwitch()
263 ldmib sp!, { r2,r3,r12,r14 } // Get R2,R3,R12,LR / *sp=stack:LR in OS_IrqHandler_ThreadSwitch()
264 stmib r0!, { r2-r14 }^ // Put R2-R14^ // *r0=context:R14 in OS_IrqHandler_ThreadSwitch()
298 ldr r2, [ r1, #OS_THREAD_OFFSET_CONTEXT ]! // *r1=context:CPSR in OS_IrqHandler_ThreadSwitch()
299 msr SPSR, r2 // Put SPSR in OS_IrqHandler_ThreadSwitch()