194 void DSP_EnableRecvDataInterruptCore(u32 dataNo)  in DSP_EnableRecvDataInterruptCore()  argument
196     SDK_ASSERT(dataNo >= 0 && dataNo <= 2);  in DSP_EnableRecvDataInterruptCore()
198     reg_DSP_PCFG |= (1 << dataNo) << REG_DSP_PCFG_RRIE_SHIFT;  in DSP_EnableRecvDataInterruptCore()
210 void DSP_DisableRecvDataInterruptCore(u32 dataNo)  in DSP_DisableRecvDataInterruptCore()  argument
212     SDK_ASSERT(dataNo >= 0 && dataNo <= 2);  in DSP_DisableRecvDataInterruptCore()
214     reg_DSP_PCFG &= ~((1 << dataNo) << REG_DSP_PCFG_RRIE_SHIFT);  in DSP_DisableRecvDataInterruptCore()
226 BOOL DSP_SendDataIsEmptyCore(u32 dataNo)  in DSP_SendDataIsEmptyCore()  argument
228     SDK_ASSERT(dataNo >= 0 && dataNo <= 2);  in DSP_SendDataIsEmptyCore()
230     return (reg_DSP_PSTS & ((1 << dataNo) << REG_DSP_PSTS_RCOMIM_SHIFT)) ? FALSE : TRUE;  in DSP_SendDataIsEmptyCore()
242 BOOL DSP_RecvDataIsReadyCore(u32 dataNo)  in DSP_RecvDataIsReadyCore()  argument
244     SDK_ASSERT(dataNo >= 0 && dataNo <= 2);  in DSP_RecvDataIsReadyCore()
246     return (reg_DSP_PSTS & ((1 << dataNo) << REG_DSP_PSTS_RRI_SHIFT)) ? TRUE : FALSE;  in DSP_RecvDataIsReadyCore()
259 void DSP_SendDataCore(u32 dataNo, u16 data)  in DSP_SendDataCore()  argument
261     SDK_ASSERT(dataNo >= 0 && dataNo <= 2);  in DSP_SendDataCore()
263     while (reg_DSP_PSTS & ((1 << dataNo) << REG_DSP_PSTS_RCOMIM_SHIFT))  in DSP_SendDataCore()
266     dspData[dataNo].send = data;  in DSP_SendDataCore()
278 u16 DSP_RecvDataCore(u32 dataNo)  in DSP_RecvDataCore()  argument
280     SDK_ASSERT(dataNo >= 0 && dataNo <= 2);  in DSP_RecvDataCore()
282     while (!(reg_DSP_PSTS & ((1 << dataNo) << REG_DSP_PSTS_RRI_SHIFT)))  in DSP_RecvDataCore()
285     return dspData[dataNo].recv;  in DSP_RecvDataCore()