Lines Matching refs:vu32
29 vu32 *p; in MIi_DmaSetParameters()
36 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_SAD_WOFFSET ); in MIi_DmaSetParameters()
51 *p = (vu32)src; in MIi_DmaSetParameters()
52 *(p + 1) = (vu32)dest; in MIi_DmaSetParameters()
53 *(p + 2) = (vu32)ctrl; in MIi_DmaSetParameters()
70 *p = (vu32)MIi_DUMMY_SRC; in MIi_DmaSetParameters()
71 *(p + 1) = (vu32)MIi_DUMMY_DEST; in MIi_DmaSetParameters()
72 *(p + 2) = (vu32)MIi_DUMMY_CNT; in MIi_DmaSetParameters()
98 vu32 *p; in MIi_DmaSetParameters()
105 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_SAD_WOFFSET ); in MIi_DmaSetParameters()
120 *p = (vu32)src; in MIi_DmaSetParameters()
121 *(p + 1) = (vu32)dest; in MIi_DmaSetParameters()
122 *(p + 2) = (vu32)ctrl; in MIi_DmaSetParameters()
155 vu32 *dmaCntp; in MIi_DmaFill32()
195 vu32 *dmaCntp; in MIi_DmaCopy32()
240 vu32 *dmaCntp; in MIi_DmaSend32()
285 vu32 *dmaCntp; in MIi_DmaRecv32()
330 vu32 *dmaCntp; in MIi_DmaPipe32()
375 vu32 *dmaCntp; in MIi_DmaFill16()
415 vu32 *dmaCntp; in MIi_DmaCopy16()
460 vu32 *dmaCntp; in MIi_DmaSend16()
505 vu32 *dmaCntp; in MIi_DmaRecv16()
550 vu32 *dmaCntp; in MIi_DmaPipe16()
1207 vu32 *dmaCntp = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_CNT_WOFFSET ); in MI_IsDmaBusy()
1210 return (BOOL)((*(vu32 *)dmaCntp & REG_MI_DMA0CNT_E_MASK) >> REG_MI_DMA0CNT_E_SHIFT); in MI_IsDmaBusy()
1225 vu32 *dmaCntp = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_CNT_WOFFSET ); in MI_WaitDma()
1235 vu32 *p = MI_DMA_REGADDR( dmaNo, MI_DMA_REG_SAD_WOFFSET ); in MI_WaitDma()
1236 *p = (vu32)MIi_DUMMY_SRC; in MI_WaitDma()
1237 *(p + 1) = (vu32)MIi_DUMMY_DEST; in MI_WaitDma()
1238 *(p + 2) = (vu32)MIi_DUMMY_CNT; in MI_WaitDma()
1256 vu32 *dmaCntp = (vu32*)MI_DMA_REGADDR(dmaNo, MI_DMA_REG_CNT_WOFFSET); in MI_StopDma()
1274 vu32 *p = (vu32 *)MI_DMA_REGADDR(dmaNo, MI_DMA_REG_SAD_WOFFSET); in MI_StopDma()
1275 *p = (vu32)MIi_DUMMY_SRC; in MI_StopDma()
1276 *(p + 1) = (vu32)MIi_DUMMY_DEST; in MI_StopDma()
1277 *(p + 2) = (vu32)MIi_DUMMY_CNT; in MI_StopDma()
1316 vu32 *dmaCntp = (vu32*)MI_DMA_REGADDR(dmaNo, MI_DMA_REG_CNT_WOFFSET); in MI_DmaRestart()
1476 vu32 *p; in MIi_SetDmaSrc16()
1481 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_SAD_WOFFSET ); in MIi_SetDmaSrc16()
1482 *p = (vu32)src; in MIi_SetDmaSrc16()
1486 vu32 *p; in MIi_SetDmaSrc32()
1491 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_SAD_WOFFSET ); in MIi_SetDmaSrc32()
1492 *p = (vu32)src; in MIi_SetDmaSrc32()
1496 vu32 *p; in MIi_SetDmaDest16()
1501 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_DAD_WOFFSET ); in MIi_SetDmaDest16()
1502 *p = (vu32)dest; in MIi_SetDmaDest16()
1506 vu32 *p; in MIi_SetDmaDest32()
1511 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_DAD_WOFFSET ); in MIi_SetDmaDest32()
1512 *p = (vu32)dest; in MIi_SetDmaDest32()
1517 vu32 *p; in MIi_SetDmaSize16()
1522 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_CNT_WOFFSET ); in MIi_SetDmaSize16()
1528 vu32 *p; in MIi_SetDmaSize32()
1533 p = (vu32*)MI_DMA_REGADDR( dmaNo, MI_DMA_REG_CNT_WOFFSET ); in MIi_SetDmaSize32()