Lines Matching refs:r0

84 @1:     clz     r0, r1                  // Count zero of high bit  in OS_IrqHandler()
85 bics r1, r1, r3, LSR r0 in OS_IrqHandler()
89 mov r1, r3, LSR r0 in OS_IrqHandler()
92 rsbs r0, r0, #31 in OS_IrqHandler()
99 mov r0, #0 in OS_IrqHandler()
100 @1: ands r2, r1, r3, LSL r0 // Count zero of high bit in OS_IrqHandler()
101 addeq r0, r0, #1 in OS_IrqHandler()
110 cmp r0, #OS_IRQ_TABLE_MAX in OS_IrqHandler()
114 ldr r0, [ r1, r0, LSL #2 ] in OS_IrqHandler()
117 bx r0 in OS_IrqHandler()
120 bx r0 // Set return address for thread rescheduling in OS_IrqHandler()
146 mov r0, #0 in OS_IrqHandler_ThreadSwitch()
149 strh r0, [r12] // OSi_IrqThreadQueue = 0 in OS_IrqHandler_ThreadSwitch()
152 mov r0, #0 in OS_IrqHandler_ThreadSwitch()
155 str r0, [r12] in OS_IrqHandler_ThreadSwitch()
166 ldr r0, [r12, #OS_THREAD_OFFSET_ID] in OS_IrqHandler_ThreadSwitch()
167 tst r3, r1, LSL r0 // OSi_IrqThreadQueue & (1<<thread->id) in OS_IrqHandler_ThreadSwitch()
211 ldrneh r0, [ r1, #OS_THREAD_OFFSET_STATE ] // r0 = t->state in OS_IrqHandler_ThreadSwitch()
212 cmpne r0, #OS_THREAD_STATE_READY in OS_IrqHandler_ThreadSwitch()
227 ldr r0, [ r12, #OS_THREADINFO_OFFSET_CURRENT ] in OS_IrqHandler_ThreadSwitch()
228 cmp r1, r0 in OS_IrqHandler_ThreadSwitch()
235 stmfd sp!, { r0, r1, r12 } in OS_IrqHandler_ThreadSwitch()
238 ldmfd sp!, { r0, r1, r12 } in OS_IrqHandler_ThreadSwitch()
248 str r2, [ r0, #OS_THREAD_OFFSET_CONTEXT ]! // *r0=context:CPSR in OS_IrqHandler_ThreadSwitch()
252 stmfd sp!, { r0, r1 } in OS_IrqHandler_ThreadSwitch()
253 add r0, r0, #OS_THREAD_OFFSET_CONTEXT in OS_IrqHandler_ThreadSwitch()
254 add r0, r0, #OS_CONTEXT_CP_CONTEXT in OS_IrqHandler_ThreadSwitch()
257 ldmfd sp!, { r0, r1 } in OS_IrqHandler_ThreadSwitch()
261 stmib r0!, { r2,r3 } // Put R0,R1 // *r0=context:R1 in OS_IrqHandler_ThreadSwitch()
264 stmib r0!, { r2-r14 }^ // Put R2-R14^ // *r0=context:R14 in OS_IrqHandler_ThreadSwitch()
265 stmib r0!, { r14 } // Put R14_irq // *r0=context:R15+4 in OS_IrqHandler_ThreadSwitch()
269 stmib r0!, { sp } in OS_IrqHandler_ThreadSwitch()
276 add r0, r1, #OS_THREAD_OFFSET_CONTEXT in OS_IrqHandler_ThreadSwitch()
277 add r0, r0, #OS_CONTEXT_CP_CONTEXT in OS_IrqHandler_ThreadSwitch()
283 ldr r0, =REG_DIVCNT_ADDR in OS_IrqHandler_ThreadSwitch()
285 ldr r1, [ r0 ] in OS_IrqHandler_ThreadSwitch()
302 ldmib r1!, { r0-r14 }^ // Get R0-R14^ // *r1=over written in OS_IrqHandler_ThreadSwitch()
304 stmda sp!, { r0-r3,r12,r14 } // Put R0-R3,R12,LR / *sp=stack:LR in OS_IrqHandler_ThreadSwitch()