Lines Matching refs:r0
91 ldrh r0, [r12, #REG_VCOUNT_OFFSET] in _start()
92 cmp r0, #0 in _start()
100 mov r0, #HW_PSR_SVC_MODE in _start()
101 msr cpsr_c, r0 in _start()
102 ldr r0, =INITi_HW_DTCM in _start()
103 add r0, r0, #0x3fc0 in _start()
104 mov sp, r0 in _start()
107 mov r0, #HW_PSR_IRQ_MODE in _start()
108 msr cpsr_c, r0 in _start()
109 ldr r0, =INITi_HW_DTCM in _start()
110 add r0, r0, #0x3fc0 in _start()
111 sub r0, r0, #HW_SVC_STACK_SIZE in _start()
112 sub sp, r0, #4 // 4 bytes for stack check code in _start()
118 sub r1, r0, r1 in _start()
119 mov r0, #HW_PSR_SYS_MODE in _start()
120 msr cpsr_csfx, r0 in _start()
127 mov r0, #0 in _start()
133 mov r0, #0 in _start()
139 mov r0, #0x0200 in _start()
146 ldr r0, [r1, #20] // r0 = bottom of compressed data in _start()
151 ldr r0, =_start_ModuleParams in _start()
152 ldr r1, [r0, #12] // BSS segment start in _start()
153 ldr r2, [r0, #16] // BSS segment end in _start()
155 mov r0, #0 in _start()
157 strcc r0, [r1], #4 in _start()
164 mcr p15, 0, r0, c7, c10, 4 // Wait writebuffer empty in _start()
173 str r0, [r1, #0] in _start()
179 ldr r0, =OS_IrqHandler in _start()
180 str r0, [r1, #0] in _start()
212 stmltia r1!, {r0} // *((vu32 *)(destp++)) = data in INITi_CpuClear32()
283 #define data r0 in MIi_UncompressBackward()
345 mov r0, #0 in MIi_UncompressBackward()
348 mcr p15, 0, r0, c7, c10, 4 // Wait writebuffer empty in MIi_UncompressBackward()
372 #define ptable r0 in do_autoload()
452 mrc p15, 0, r0, c1, c0, 0 in init_cp15()
458 bic r0, r0, r1 in init_cp15()
459 mcr p15, 0, r0, c1, c0, 0 in init_cp15()
462 mov r0, #0 in init_cp15()
463 mcr p15, 0, r0, c7, c5, 0 // Instruction cache in init_cp15()
464 mcr p15, 0, r0, c7, c6, 0 // Data cache in init_cp15()
467 mcr p15, 0, r0, c7, c10, 4 in init_cp15()
487 #define SET_PROTECTION_A( id, adr, siz ) ldr r0, =(adr|HW_C6_PR_##siz|HW_C6_PR_ENABLE) in init_cp15()
488 #define SET_PROTECTION_B( id, adr, siz ) mcr p15, 0, r0, c6, id, 0 in init_cp15()
523 ldr r0, =SDK_AUTOLOAD_DTCM_START in init_cp15()
524 orr r0, r0, #HW_C6_PR_16KB in init_cp15()
525 orr r0, r0, #HW_C6_PR_ENABLE in init_cp15()
548 mov r0, #HW_C9_TCMR_32MB in init_cp15()
549 mcr p15, 0, r0, c9, c1, 1 in init_cp15()
554 ldr r0, =INITi_HW_DTCM in init_cp15()
555 orr r0, r0, #HW_C9_TCMR_16KB in init_cp15()
556 mcr p15, 0, r0, c9, c1, 0 in init_cp15()
564 mov r0, #REGION_BIT(0,1,0,1,0,0,1,0) in init_cp15()
565 mcr p15, 0, r0, c2, c0, 1 in init_cp15()
573 mov r0, #REGION_BIT(0,1,0,1,0,0,1,0) in init_cp15()
574 mcr p15, 0, r0, c2, c0, 0 in init_cp15()
581 mov r0, #REGION_BIT(0,1,0,1,0,0,0,0) in init_cp15()
582 mcr p15, 0, r0, c3, c0, 0 in init_cp15()
596 ldr r0, =REGION_ACC(RW,RW,NA,RW,NA,RW,RO,NA) in init_cp15()
597 mcr p15, 0, r0, c5, c0, 3 in init_cp15()
611 ldr r0, =REGION_ACC(RW,RW,RW,RW,RW,RW,RO,RW) in init_cp15()
612 mcr p15, 0, r0, c5, c0, 2 in init_cp15()
617 mrc p15, 0, r0, c1, c0, 0 in init_cp15()
622 orr r0, r0, r1 in init_cp15()
623 mcr p15, 0, r0, c1, c0, 0 in init_cp15()