719 #define REG_MI_DMA0CNT_FIELD( e, i, mode, sb, cm, sar, dar, wordcnt ) \  argument
721     ((u32)(e) << REG_MI_DMA0CNT_E_SHIFT) | \
793 #define REG_MI_DMA1CNT_FIELD( e, i, mode, sb, cm, sar, dar, wordcnt ) \  argument
795     ((u32)(e) << REG_MI_DMA1CNT_E_SHIFT) | \
867 #define REG_MI_DMA2CNT_FIELD( e, i, mode, sb, cm, sar, dar, wordcnt ) \  argument
869     ((u32)(e) << REG_MI_DMA2CNT_E_SHIFT) | \
941 #define REG_MI_DMA3CNT_FIELD( e, i, mode, sb, cm, sar, dar, wordcnt ) \  argument
943     ((u32)(e) << REG_MI_DMA3CNT_E_SHIFT) | \
1106 #define REG_MI_NDMA0CNT_FIELD( e, i, cm, im, mode, wordcnt, srl, sar, drl, dar ) \  argument
1108     ((u32)(e) << REG_MI_NDMA0CNT_E_SHIFT) | \
1247 #define REG_MI_NDMA1CNT_FIELD( e, i, cm, im, mode, wordcnt, srl, sar, drl, dar ) \  argument
1249     ((u32)(e) << REG_MI_NDMA1CNT_E_SHIFT) | \
1388 #define REG_MI_NDMA2CNT_FIELD( e, i, cm, im, mode, wordcnt, srl, sar, drl, dar ) \  argument
1390     ((u32)(e) << REG_MI_NDMA2CNT_E_SHIFT) | \
1529 #define REG_MI_NDMA3CNT_FIELD( e, i, cm, im, mode, wordcnt, srl, sar, drl, dar ) \  argument
1531     ((u32)(e) << REG_MI_NDMA3CNT_E_SHIFT) | \
1571 #define REG_MI_MCCNT0_FIELD( e, i, sel, busy, mode, baudrate ) \  argument
1573     ((u32)(e) << REG_MI_MCCNT0_E_SHIFT) | \
1748 #define REG_MI_MCCNT0_A_FIELD( e, i, sel, busy, mode, baudrate ) \  argument
1750     ((u32)(e) << REG_MI_MCCNT0_A_E_SHIFT) | \
1985 #define REG_MI_MCCNT0_B_FIELD( e, i, sel, busy, mode, baudrate ) \  argument
1987     ((u32)(e) << REG_MI_MCCNT0_B_E_SHIFT) | \
2374 #define REG_MI_MBK_A0_FIELD( e, of, m ) \  argument
2376     ((u32)(e) << REG_MI_MBK_A0_E_SHIFT) | \
2397 #define REG_MI_MBK_A1_FIELD( e, of, m ) \  argument
2399     ((u32)(e) << REG_MI_MBK_A1_E_SHIFT) | \
2420 #define REG_MI_MBK_A2_FIELD( e, of, m ) \  argument
2422     ((u32)(e) << REG_MI_MBK_A2_E_SHIFT) | \
2443 #define REG_MI_MBK_A3_FIELD( e, of, m ) \  argument
2445     ((u32)(e) << REG_MI_MBK_A3_E_SHIFT) | \
2534 #define REG_MI_MBK_B0_FIELD( e, of, m ) \  argument
2536     ((u32)(e) << REG_MI_MBK_B0_E_SHIFT) | \
2557 #define REG_MI_MBK_B1_FIELD( e, of, m ) \  argument
2559     ((u32)(e) << REG_MI_MBK_B1_E_SHIFT) | \
2580 #define REG_MI_MBK_B2_FIELD( e, of, m ) \  argument
2582     ((u32)(e) << REG_MI_MBK_B2_E_SHIFT) | \
2603 #define REG_MI_MBK_B3_FIELD( e, of, m ) \  argument
2605     ((u32)(e) << REG_MI_MBK_B3_E_SHIFT) | \
2694 #define REG_MI_MBK_B4_FIELD( e, of, m ) \  argument
2696     ((u32)(e) << REG_MI_MBK_B4_E_SHIFT) | \
2717 #define REG_MI_MBK_B5_FIELD( e, of, m ) \  argument
2719     ((u32)(e) << REG_MI_MBK_B5_E_SHIFT) | \
2740 #define REG_MI_MBK_B6_FIELD( e, of, m ) \  argument
2742     ((u32)(e) << REG_MI_MBK_B6_E_SHIFT) | \
2763 #define REG_MI_MBK_B7_FIELD( e, of, m ) \  argument
2765     ((u32)(e) << REG_MI_MBK_B7_E_SHIFT) | \
2854 #define REG_MI_MBK_C0_FIELD( e, of, m ) \  argument
2856     ((u32)(e) << REG_MI_MBK_C0_E_SHIFT) | \
2877 #define REG_MI_MBK_C1_FIELD( e, of, m ) \  argument
2879     ((u32)(e) << REG_MI_MBK_C1_E_SHIFT) | \
2900 #define REG_MI_MBK_C2_FIELD( e, of, m ) \  argument
2902     ((u32)(e) << REG_MI_MBK_C2_E_SHIFT) | \
2923 #define REG_MI_MBK_C3_FIELD( e, of, m ) \  argument
2925     ((u32)(e) << REG_MI_MBK_C3_E_SHIFT) | \
3014 #define REG_MI_MBK_C4_FIELD( e, of, m ) \  argument
3016     ((u32)(e) << REG_MI_MBK_C4_E_SHIFT) | \
3037 #define REG_MI_MBK_C5_FIELD( e, of, m ) \  argument
3039     ((u32)(e) << REG_MI_MBK_C5_E_SHIFT) | \
3060 #define REG_MI_MBK_C6_FIELD( e, of, m ) \  argument
3062     ((u32)(e) << REG_MI_MBK_C6_E_SHIFT) | \
3083 #define REG_MI_MBK_C7_FIELD( e, of, m ) \  argument
3085     ((u32)(e) << REG_MI_MBK_C7_E_SHIFT) | \