665 #define REG_MI_DMA0SAD_FIELD( dmasrc ) \  argument
667     ((u32)(dmasrc) << REG_MI_DMA0SAD_DMASRC_SHIFT))
739 #define REG_MI_DMA1SAD_FIELD( dmasrc ) \  argument
741     ((u32)(dmasrc) << REG_MI_DMA1SAD_DMASRC_SHIFT))
813 #define REG_MI_DMA2SAD_FIELD( dmasrc ) \  argument
815     ((u32)(dmasrc) << REG_MI_DMA2SAD_DMASRC_SHIFT))
887 #define REG_MI_DMA3SAD_FIELD( dmasrc ) \  argument
889     ((u32)(dmasrc) << REG_MI_DMA3SAD_DMASRC_SHIFT))
987 #define REG_MI_NDMA0SAD_FIELD( dmasrc ) \  argument
989     ((u32)(dmasrc) << REG_MI_NDMA0SAD_DMASRC_SHIFT))
1128 #define REG_MI_NDMA1SAD_FIELD( dmasrc ) \  argument
1130     ((u32)(dmasrc) << REG_MI_NDMA1SAD_DMASRC_SHIFT))
1269 #define REG_MI_NDMA2SAD_FIELD( dmasrc ) \  argument
1271     ((u32)(dmasrc) << REG_MI_NDMA2SAD_DMASRC_SHIFT))
1410 #define REG_MI_NDMA3SAD_FIELD( dmasrc ) \  argument
1412     ((u32)(dmasrc) << REG_MI_NDMA3SAD_DMASRC_SHIFT))