Lines Matching refs:MI_DMA_SRC_INC

81 #define MI_DMA_SRC_INC             (0UL << REG_MI_DMA0CNT_SAR_SHIFT)    // increment source address  macro
108 #define MI_DMA_SINC_DINC_16        ( MI_DMA_SRC_INC | MI_DMA_DEST_INC | MI_DMA_16BIT_BUS )
110 #define MI_DMA_SINC_DFIX_16        ( MI_DMA_SRC_INC | MI_DMA_DEST_FIX | MI_DMA_16BIT_BUS )
112 #define MI_DMA_SINC_DINC_32        ( MI_DMA_SRC_INC | MI_DMA_DEST_INC | MI_DMA_32BIT_BUS )
114 #define MI_DMA_SINC_DFIX_32        ( MI_DMA_SRC_INC | MI_DMA_DEST_FIX | MI_DMA_32BIT_BUS )
134 #define MI_CNT_COPY16(size)        ( MI_DMA_IMM16ENABLE | MI_DMA_SRC_INC | MI_DMA_DEST_INC | ((size…
135 #define MI_CNT_COPY32(size)        ( MI_DMA_IMM32ENABLE | MI_DMA_SRC_INC | MI_DMA_DEST_INC | ((size…
139 #define MI_CNT_SET_COPY16(size)    ( MI_DMA_IMM16DISABLE | MI_DMA_SRC_INC | MI_DMA_DEST_INC | ((siz…
140 #define MI_CNT_SET_COPY32(size)    ( MI_DMA_IMM32DISABLE | MI_DMA_SRC_INC | MI_DMA_DEST_INC | ((siz…
145 #define MI_CNT_SEND16(size)        ( MI_DMA_IMM16ENABLE | MI_DMA_SRC_INC | MI_DMA_DEST_FIX | ((size…
146 #define MI_CNT_SEND32(size)        ( MI_DMA_IMM32ENABLE | MI_DMA_SRC_INC | MI_DMA_DEST_FIX | ((size…
150 #define MI_CNT_SET_SEND16(size)    ( MI_DMA_IMM16DISABLE | MI_DMA_SRC_INC | MI_DMA_DEST_FIX | ((siz…
151 #define MI_CNT_SET_SEND32(size)    ( MI_DMA_IMM32DISABLE | MI_DMA_SRC_INC | MI_DMA_DEST_FIX | ((siz…
179 #  define MI_CNT_HBCOPY16(size)    ( MI_DMA_ENABLE | MI_DMA_TIMING_H_BLANK | MI_DMA_SRC_INC | MI_DM…
180 #  define MI_CNT_HBCOPY32(size)    ( MI_DMA_ENABLE | MI_DMA_TIMING_H_BLANK | MI_DMA_SRC_INC | MI_DM…
186 #define MI_CNT_VBCOPY16(size)      ( MI_DMA_ENABLE | MI_DMA_TIMING_V_BLANK | MI_DMA_SRC_INC | MI_DM…
187 #define MI_CNT_VBCOPY32(size)      ( MI_DMA_ENABLE | MI_DMA_TIMING_V_BLANK | MI_DMA_SRC_INC | MI_DM…
198 #  define MI_CNT_MMCOPY(size)      ( MI_DMA_ENABLE | MI_DMA_TIMING_DISP_MMEM | MI_DMA_SRC_INC | MI_…
203 #  define MI_CNT_GXCOPY(size)      ( MI_DMA_ENABLE | MI_DMA_TIMING_GXFIFO | MI_DMA_SRC_INC | MI_DMA…