Lines Matching refs:MI_DMA_32BIT_BUS
74 #define MI_DMA_32BIT_BUS (1UL << REG_MI_DMA0CNT_SB_SHIFT) // 32bit width macro
112 #define MI_DMA_SINC_DINC_32 ( MI_DMA_SRC_INC | MI_DMA_DEST_INC | MI_DMA_32BIT_BUS )
113 #define MI_DMA_SFIX_DINC_32 ( MI_DMA_SRC_FIX | MI_DMA_DEST_INC | MI_DMA_32BIT_BUS )
114 #define MI_DMA_SINC_DFIX_32 ( MI_DMA_SRC_INC | MI_DMA_DEST_FIX | MI_DMA_32BIT_BUS )
115 #define MI_DMA_SFIX_DFIX_32 ( MI_DMA_SRC_FIX | MI_DMA_DEST_FIX | MI_DMA_32BIT_BUS )
118 #define MI_DMA_IMM32ENABLE ( MI_DMA_ENABLE | MI_DMA_TIMING_IMM | MI_DMA_32BIT_BUS )
120 #define MI_DMA_IMM32DISABLE ( MI_DMA_DISABLE | MI_DMA_TIMING_IMM | MI_DMA_32BIT_BUS )
180 …LANK | MI_DMA_SRC_INC | MI_DMA_DEST_RELOAD | MI_DMA_CONTINUOUS_ON | MI_DMA_32BIT_BUS | ((size)/4) )
187 …ENABLE | MI_DMA_TIMING_V_BLANK | MI_DMA_SRC_INC | MI_DMA_DEST_INC | MI_DMA_32BIT_BUS | ((size)/4) )
193 …MA_ENABLE | MI_DMA_TIMING_CARD | MI_DMA_SRC_FIX | MI_DMA_DEST_INC | MI_DMA_32BIT_BUS | ((size)/4) )
198 …MING_DISP_MMEM | MI_DMA_SRC_INC | MI_DMA_DEST_FIX | MI_DMA_CONTINUOUS_ON | MI_DMA_32BIT_BUS | (4) )
203 …_ENABLE | MI_DMA_TIMING_GXFIFO | MI_DMA_SRC_INC | MI_DMA_DEST_FIX | MI_DMA_32BIT_BUS | ((size)/4) )