Lines Matching refs:x0

19 	main		(RWX) : ORIGIN = 0x02000000,   LENGTH = 0x0 >  main.sbin
20 	ITCM		(RWX) : ORIGIN = 0x01ff8000, LENGTH = 0x0 >> main.sbin
21 	DTCM		(RWX) : ORIGIN = 0x023e0000, LENGTH = 0x0 >> main.sbin
22 	binary.AUTOLOAD_INFO		(RWX) : ORIGIN = 0, LENGTH = 0x0 >> main.sbin
23 	binary.STATIC_FOOTER		(RWX) : ORIGIN = 0, LENGTH = 0x0 >> main.sbin
25 	main_defs	(RW)  : ORIGIN = AFTER(main), LENGTH = 0x0 > main_defs.sbin
26 	main_table	(RW)  : ORIGIN = AFTER(main), LENGTH = 0x0 > main_table.sbin
27 	main_overlay_1		(RWXO): ORIGIN = AFTER(main), LENGTH = 0x0 > main_overlay_1.sbin
28 	main_overlay_2		(RWXO): ORIGIN = AFTER(main), LENGTH = 0x0 > main_overlay_2.sbin
29 	main_itcm_1		(RWXO): ORIGIN = AFTER(ITCM), LENGTH = 0x0 > main_itcm_1.sbin
30 	main_dtcm_1		(RWXO): ORIGIN = AFTER(DTCM), LENGTH = 0x0 > main_dtcm_1.sbin
31 	main_dtcm_2		(RWXO): ORIGIN = AFTER(DTCM), LENGTH = 0x0 > main_dtcm_2.sbin
32 	MAIN_EX		(RWXO): ORIGIN = 0x02400000, LENGTH = 0x0 > MAIN_EX.sbin
33 	MAIN_EX_2		(RWXO): ORIGIN = AFTER(MAIN_EX), LENGTH = 0x0 > MAIN_EX_2.sbin
34 	dummy.MAIN_EX		(RW)  : ORIGIN = 0x023e0000, LENGTH = 0x0
35 	arena.MAIN			(RW)  : ORIGIN = AFTER(main,main_overlay_1,main_overlay_2), LENGTH = 0x0
36 	arena.MAIN_EX		(RW)  : ORIGIN = AFTER(dummy.MAIN_EX,MAIN_EX,MAIN_EX_2), LENGTH = 0x0
37 	arena.ITCM		(RW)  : ORIGIN = AFTER(ITCM,main_itcm_1), LENGTH = 0x0
38 	arena.DTCM		(RW)  : ORIGIN = AFTER(DTCM,main_dtcm_1,main_dtcm_2), LENGTH = 0x0
39 	binary.MODULE_FILES		(RW)  : ORIGIN = 0x0, LENGTH = 0x0     > component.files
40 	check.ITCM			(RWX) : ORIGIN = 0x0, LENGTH = 0x08000 > itcm.check
41 	check.DTCM			(RW)  : ORIGIN = 0x0, LENGTH = 0x04000 > dtcm.check