sgn dest, src0, src1, src2
| Name | Registers |
|---|---|
| dest |
An output register or temporary register. |
| src0 |
A temporary register or input register. |
| src1 |
A temporary register. Cannot specify swizzling or the negative sign. |
| src2 |
A temporary register. Cannot specify swizzling or the negative sign. |
You cannot specify the same register for src1 and src2.
You cannot specify the same register for src0 and src1.
The calculation process uses src1 and src2.
Stores a value of 1, 0, or -1 in dest when src0 is positive, zero, or negative, respectively.
for ( each component )
{
if ( src0.component < 0 )
dest.component = -1
else if ( src0.component == 0 )
dest.component = 0
else
dest.component = 1
}
slt src1, src0, -src0 slt src2, -src0, src0 add dest, src2, -src1
sgn r0, v1, r2, r3
| 1 | 2 | 3 | 4 | 5 | 6 | 7 | ||
|---|---|---|---|---|---|---|---|---|
| slt | read | SLT | write | |||||
| slt | read | SLT | write | |||||
| add | STALL | read | ADD | post | write | |||
CONFIDENTIAL