Assembler Reference

Hardware Specifications

• Vertex Shader Processor
• Features
• Stage Structure
• Arithmetic Unit Structure
• Register Set
• Post-Vertex Cache

Resources

• Program RAM
• Registers
• The precision of floating point number-type registers
• Input registers
• Temporary registers
• Floating-point constant registers
• Address registers
• Boolean registers
• Integer registers
• Loop counter registers
• Output registers
• Status registers

Syntax

• Assembler Instruction Coding
• Masking Output Components
• Swizzling (Rearranging Input Components)
• Adding the Negative Sign ( - ) to Input Components
• Offsetting the Input Operand Register Index
• Labels
• Reserved Words

Instructions

• Preprocessor Pseudo-Instructions
• #include
• #define
• #undef
• #ifdef, #ifndef, #if, #else, #elif, #endif
• #error
• #pragma bind_symbol( )
• #pragma output_map( )
• #line
• Define Instructions
• def
• defb
• defi
• Arithmetic Instructions
• add
• dp3
• dp4
• dph
• dst
• exp
• flr
• litp
• log
• mad
• max
• min
• mov
• mova
• mul
• nop
• rcp
• rsq
• sge
• slt
• Macro Instructions
• sub
• abs
• crs
• frc
• lrp
• m3x2
• m3x3
• m3x4
• m4x3
• m4x4
• nrm
• pow
• sgn
• sincos
• Flow Control Instructions
• call
• callb
• callc
• jpb
• jpc
• ret
• ifb
• ifc
• else
• endif
• loop
• endloop
• breakc
• cmp
• end

Limitations Due to Shader Specifications

• Limitations Due to Shader Specifications
• Starting and Stopping a Shader
• Number of Steps
• Number of Swizzling and Masking Patterns
• Limitations on Control Instructions
• Registers That Cannot be Used Simultaneously
• Calculation Results of Exceptional Processing
• Limitations on the Output of Illegal Data

Instructions That Cannot be Called Twice Consecutively

• Instructions That Cannot be Called Twice Consecutively
• Consecutive Calls to else, endif, ret, and endloop
• Consecutive Calls to mova
• Calling jpc/jpb immediately before an else, endif, ret, or endloop
• Calling breakc immediately before an endloop

Instruction Latency

• Instruction Latency
• Latency of Arithmetic Instructions and the cmp Instruction
• Latency of Branch Instructions
• Output Order of Calculation Results
• Stalling Due to Calculation Result Output Timing Conflicts
• Stalling Due to Arithmetic Unit Conflicts
• Stalling Due to Instruction Dependencies
• Unconditional Stalls

Shader Implementations That Result in Illegal Operations

• Shader Implementations That Result in Illegal Operations
• Illegal Operations Caused by the mova Instruction
• Executing mova Immediately Before the Last Instruction
• Executing mova Both Before and After Certain Instructions
• Executing a Branch Instruction Immediately After a Stall Caused by a mova Instruction
• Illegal Operations Caused by Executing Instructions in Particular Order

CONFIDENTIAL